Determination of junction depths for phosphorous diffused in silicon

Heavily n-doped epitaxially grown Si layers are of great importance for source/drain (S/D) application in advanced node nMOS devices. For contact resistivity reduction, the dopant activation level is very important. Various techniques are being used to evaluate dopant activation in Si:P layers. Among these two methods are Scanning Spreading Resistance Microscopy (SSRM) and Differential Hall Effect Metrology (DHEM). SSRM uses an atomic force microscope equipped with a hard conductive probe that is scanned in contact mode on the cross-sectioned sample’s surface and measures spreading resistance. Measured resistance values as a function of depth are converted into resistivity and carrier concentration depth profiles using calibration measurements and conversion relationships. DHEM provides depth profiles of mobility, resistivity and carrier concentration through a semiconductor layer by making successive sheet resistance (Rs) and Hall voltage measurements using Hall effect/Van der Pauw techniques, as the electrically active thickness of the layer is reduced through successive oxidation steps. Controlled oxidation is achieved by electrochemical anodization. Data collected can then be processed to yield the depth profiles. In this contribution we have carried out SSRM and DHEM measurements on Si:P epi layers subjected to different processing conditions including annealing and ohmic contact fabrication. Secondary Ion Mass Spectrometry (SIMS) was used to measure the total (active + inactive) dopant profiles through the films. Effects of these processes on dopant diffusion and activation were studied and the results from DHEM and SSRM were compared.In-situ phosphorus (P) doped Si epi-layers were grown over 300mm diameter boron doped monitor wafers. While one set was kept as the reference, a second set was treated by a spike-annealing process at 1000 °C. In a third set a Ti/TiN contact fabrication process was carried out and the contact was removed before analysis. In the fourth set contact process was applied to the spike annealed wafer before removal of the Ti/TiN layers. Bulk sheet resistance measurements were made using 4-point probe (4PP) for all the samples. SSRM measurements were carried out at IMEC. Cross-shaped Van der Pauw test-patterns were formed on 8mmx8mm areas on the samples and DHEM measurements were performed at ALP. Figure below shows the dopant depth profiles obtained by SIMS and the carrier concentration profiles from DHEM and SSRM techniques for samples D02 (as deposited Si:P) and D03 (spike annealed). One can make some general observations from the data in this figure. The total dopant concentration as measured by SIMS is ~ 1.4E21/cm3. There is only a small difference in the total dopant distribution profiles (SIMS) between the as deposited sample and the spike annealed sample. However, the spike annealed sample shows much higher dopant activation as measured by DHEM. Carrier concentration is ~2.5x higher in sample D03 (~5E20/cm3) compared to sample D02 (~2E20/cm3). Activation levels measured by SSRM, however, are lower for both samples, and the peak carrier concentration value increases only slightly upon spike annealing, going from ~2E20/cm3 in sample D02 to ~2.2E20/cm3 in sample D03. DHEM clearly indicates the sharp interface between the p-type substrate and the n-type epi-layer and its depth calibration agrees well with the expected thicknesses of the epi layers. The tail of the SSRM data is much more graded. Data from other samples will be presented and discussed in the final manuscript. Figure 1

High detection sensitivity in bulk analysis or depth profiling by secondary ion mass spectrometry (SIMS) can only be achieved, for positively charged ions, if the nearsurface regions of the sputter eroded sample are fully oxidized. Using oxygen primary ions, a stationary oxidation state is established after some time of bombardment during which period the sputtering yield decreases and the ionization probability increases. The physical and chemical processes occurring during the transient period are reviewed with emphasis on the results for impurity analysis in silicon, i.e. the matrix material that has been studied most thoroughly in the past. The transient decrease in sputtering yield gives rise to a depth scale offset and an associated apparent shift of impurity profiles towards the surface. The effect is largest at normal beam incidence, ca. 1 nm /keV (O + 2 ), in which case silicon is fully oxidized. The transition depth, i.e. the depth sputtered before achieving a stable ion yield is about twice as large and increases as the impact angle is turned away from normal. The shift and the depth scale offset can be measured safely using thin (delta) layers of isotopically pure tracers, for example 30 Si in 28 Si. Boron delta layers can serve as secondary standards because this impurity behaves almost the same as the host silicon atoms. The profile shift observed with other common dopants may contain contributions due to unidirectional relocation, often driven by segregation away from the surface. At O + 2 energies below about 0.7 keV the transition depths fall below the thickness of typical native oxides, so that the transient changes in sputtering yield and ionization probability can disappear. The transient phenomena may be described by a simple sputtering-oxidation model that connects the depth scale offset to other observable parameters like the initial and final sputtering yield, the transition fluence and the oxide thickness.

With emerging three-dimensional device architectures for advanced silicon devices such as fin field-effect-transistors (FinFETs), new metrology challenges are faced to characterize dopants. The ratio of dopant concentration in the top surface and sidewalls of FinFETs may differ significantly, thereby influencing the performance of these devices. In this work, a methodology involving secondary ion mass spectrometry (SIMS) is presented to study the dose conformality in fins. However, SIMS is limited to probe the quantitative chemical dopant concentration (i.e., top/sidewall of fins). The fraction of the active dopant concentration determining the performance of FinFETs would still be unknown. Additionally, the concept based on SIMS is unable to provide information on the lateral junction depth. Thus, to obtain the unknown active dopant concentration and their spatial distribution, the authors extend their study by measuring the cross section of the fins with scanning spreading resistance microscopy and extracting the quantitative active carrier concentration in the fins.

The complementary metal-oxide-semiconductor (CMOS) industry continues to push the boundaries of what is possible. Along with this, secondary ion mass spectrometry (SIMS) depth profiling continues to support CMOS R&D and high volume manufacturing (due to its unparalleled sensitivity and detection limits over predefined volumes and within acceptable time periods). New developments in SIMS are also being realized to support the move of the CMOS industry from planar structures to three-dimensional (3D) structures. This article presents a perspective of existing SIMS research areas for beyond one-dimensional structural analysis along with potential future SIMS implementation and data processing scenarios. The topics covered include: (1) existing SIMS depth profiling approaches for 3D structures, (2) in-fab SIMS deployment, (3) data analysis of in-fab SIMS derived depth profiles from 3D structures via pattern recognition, and (4) hybrid characterization approaches. With SIMS depth profiling of optimized (for SIMS) 3D structures already demonstrated, the remaining topics may serve to extend these and other capabilities and open new application areas for SIMS.

Purpose The purpose of this paper was the development of a model enabling precise determination of phosphorus concentration profile in the emitter layer of a silicon solar cell on the basis of diffusion doping process duration and temperature. Fick’s second law, which is fundamental for describing the diffusion process, was assumed as the basis for the model. Design/methodology/approach To establish a theoretical model of the process of phosphorus diffusion in silicon, real concentration profiles measured using the secondary ion mass spectrometry (SIMS) method were used. Samples with the phosphorus dopant source applied onto monocrystalline silicon surface were placed in the heat zone of the open quartz tube furnace, where the diffusion process took place in the temperature of 880°C-940°C. The measured real concentration profiles of these samples became template profiles for the model in development. Findings The model was developed based on phenomena described in the literature, such as the influence of the electric field of dopant ionized atoms and the influence of dopant atom concentration nearing the maximum concentration on the value of diffusion coefficient. It was proposed to divide the diffusion area into low and high dopant concentration region. Originality/value A model has been established which enabled obtaining a high level of consistency between the phosphorus concentration profile developed theoretically and the real profile measured using the SIMS method. A coefficient of diffusion of phosphorus in silicon dependent on dopant concentration was calculated. Additionally, a function describing the boundary between the low and high dopant concentration regions was determined.

The characterization of ultrashallow junctions after implantation and subsequent rapid thermal processing (RTP) annealing is usually done in two ways. The sheet resistance of the junction is measured with a four-point probe and junction depth and dose are evaluated via secondary ion mass spectrometry (SIMS). After ultralow energy beamline implantation in a Varian VIISta 80 single wafer high current implanter the subsequent spike anneal for maximum activation and minimal diffusion was carried out on a Mattson 3000 Plus equipped with the flash-anneal controller. Junction depth profiling was done to monitor the influence of implant conditions and RTP annealing parameters. Measurements of junction depth, total dose, activated dose and uniformity were carried out on FEI Quadrupole SIMS tools. Queued measurements were performed on full wafers and small samples. Calibration of both junction depth and retained dose will be discussed. At very low beam energies (250 eV, oxygen, normal incidence) valuable information about depth profile shape, near surface concentration, and activated dose were obtained.

Ultra-shallow junction layers are required for deep submicron CMOS and quantum devices. Low-temperature (320 °C) molecular-beam epitaxy was used to form highly conductive, ultra-shallow layers in silicon using boron delta doping. The as-grown junction depths, determined with secondary ion mass spectrometry, ranged from 7 nm to 18 nm. A minimum resistivity of 3 x 10 -4 Ω-cm was obtained when the delta-doped layers were spaced 2.5 nm apart. The sheet resistances of the epitaxial layers, plotted as a function of junction depth, followed the theoretical curve for a box-doped layer having a boron doping concentration equal to the solid solubility limit, 6 x 10 20 /cm 3 . Minimal change was detected in either the atomic profiles or the resistivity after a 10 s rapid thermal anneal (RTA) or a 10 min furnace anneal (FA) up to 700 °C. The sheet resistances of the as-grown shallow junctions are substantially less than those obtained by ion implantation. Only after the 800 °C FA did the MBE-grown layers degrade to have as large a sheet resistance as the best ion implanted layers.

Sb surface segregation and doping during Si(100) molecular beam epitaxy at low temperature have been studied by depth profiling with secondary ion mass spectrometry, x-ray photoelectron spectroscopy, and conductivity measurements. We find that at a growth temperature near 320 °C complete donor activation and doping densities near 5×1020 cm−3 are obtainable. For temperatures between 320–500 °C, measurements point to the existence of distinct surface segregation regimes. For dilute surface and bulk Sb concentrations the measurements reveal a region where the surface segregation is constant and bulk and surface concentrations are linearly related. For bulk concentrations near the solid solubility limit, the surface segregation increases rapidly with increasing bulk concentration for temperatures between 350–450 °C. Finally, for Sb-saturated surfaces the surface segregation actually decreases, and doping levels exceeding the solid solubility limit are possible.

The retrograde p-well CMOS technology utilizes a single high-energy boron implant to produce a self-aligned channel stop and an extremely shallow, low sheet-resistance p-well while maintaining controllable, low n-channel threshold voltages. Conventional CMOS technologies are limited by Gaussian profiles where surface concentration, sheet resistance, and junction depth are directly coupled and low threshold voltages require either deep junctions or high sheet resistance. The retrograde p-well peak charge resides 1µ below the surface which lowers npn-beta from conventional values of 500-1000 to 30- 50 and allows spacing between n- and p-channel devices to be reduced from 12-15µ to 3-6µ. This all-implanted CMOS technology has been developed, fully characterized and modeled for devices with electrical channel lengths below 2µ. Ring oscillators have, a 700psec. stage delay and a 1K RAM test structure shows a 3.7 times density improvement, lower latch-up susceptibility, lower defect density, and higher performance than the same RAM conventionally processed.

According to the recently released 1999 National Technology Roadmap for Semiconductors, the SID extension junction will be in the range of a few tens of nanometers for the up coming 180 nm and 130 nm nodes. Although the junctions have to become shallower, a decreasing sheet resistance is required. The formation of ultra-shallow junctions is mainly influenced by three important parameters, these are: dose and energy control during ion implantation, a controlled gaseous ambient during RTA (rapid thermal anneal), and a controlled and reproducible thermal budget during RTA. The requirements for production tools have become progressively more stringent, but the crystal off-orientation of the wafer surface condition as an issue in reproducible USJ formation has been neglected. In Si wafer production, the exact [100] orientation of the wafer surface is determined by the ingot sawing accuracy and typically done with a tolerance of +0.1/spl deg/. Prior to this experiment, however, the influence of such a variance in the wafer off-orientations on the junction characteristics had not been investigated. For our experiments repeatable "off-axis" from [100] sliced 200 mm silicon wafers were implanted with /sup 11/B/sup +/, /sup 75/As/sup +/ or /sup 31/P/sup +/ at a tilt and twist angle of 0/spl deg/ to investigate the effects on junction depth and sheet resistance. The acceleration voltage varied between 500 eV (/sup 11/B/sup +/) and 5 keV (/sup 75/As/sup +/). The off-orientation varied between exact 0/spl deg/ and the channeling-reduction-angle for boron of 7.00 (e.g. 0.35/spl deg/, 1.0/spl deg/, 4.0/spl deg/). Species depending data of as-implanted distributions as well as soak time (1050/spl deg/C 10 s) and flash annealed (with a ramp rate of 350 Ws) wafers are presented and the influences of the off-oriented sliced wafers on junction depth and sheet resistance are discussed.

The techniques of chemical staining, spreading resistance, and secondary-ion mass spectrometry (SIMS) have been used in the determination of the depth of diffused and ion-implanted junctions in an effort to estimate the accuracy of the staining method. Computer simulations were also used to study the behaviour of charge carriers in the semiconductor under illumination, and the accuracy of the junction depth obtained from raw spreading resistance data. It was observed that it is possible to measure junction depth reproducibly, to within 200 Å of the metallurgical junction depth, by carefully controlling the surface preparation of the sample and the lighting conditions under which the staining takes place.

Non-contact, non-intrusive Photo-Carrier Radiometry (PCR) was used for monitoring nano-depth junctions in industrial-grade silicon wafers. The silicon wafers were implanted with arsenic to the dose of 5E10 14 cm -2 . The junction depth was in the 30 nm to 100 nm range. Quantitative results for PCR sensitivity to the junction depth and implantation energies are presented. This laser-based carrier-wave technique monitors harmonically photo-excited and recombining carriers and shows great potential advantages for the characterization of multiple semiconductor processes such as ion implantation, ultra shallow junction (USJ) depth determination and other Si wafer process steps.

Accurate knowledge of the dopant surface concentration of ultrashallow junctions is very important, especially since high surface concentrations are often encountered and these could have serious consequences on device performance. Our group has studied several different analytical techniques to understand the boron surface concentration of plasma-doped p+–n junctions that are about 60 nm deep. Secondary ion mass spectrometry has been performed with both oxygen and cesium primary ions. The O+2 secondary ion mass spectrometry was carried out both in vacuo and with an oxygen bleed to minimize surface ion yield transients. In addition, the surface boron concentration has been measured by resonance ionization mass spectrometry and Auger electron spectroscopy. Finally, the surface electrical carrier concentration of these p+–n junctions has been determined by spreading resistance profiling, differential Hall effect profiling, and microwave surface impedance profiling. A comparison of the surface results of these various measurement techniques will be presented and discussed in this article.

As semiconductor devices continue to shrink, metallic contamination on silicon surfaces becomes to have a detrimental impact on ULSI device performance and yield [1]. Several gettering techniques have been proposed, and one of the intrinsic gettering techniques is gettering using BMDs (bulk micro defects, oxygen precipitates) in silicon. In this technique, the total surface area of the BMDs is known to affect the gettering efficiency [2, 3]. However, the depth profiles of metals gettered by the BMDs have not been reported. We have experimentally demonstrated the depth profiles of metals gettered by BMDs in silicon wafers with different densities and sizes of BMDs. CZ-Si (100) wafers A, B, and C with different densities and sizes of BMDs were prepared by C- or N-doping and annealing. These wafers were quantitatively contaminated with Cr, Fe, and Cu. The surface concentrations were 2 × 1015 atoms/cm2. The wafers were then annealed at 1000 ºC for 30 min. The surface of the wafers was finally cleaned to remove residual metals. The BMDs in the wafers were measured by laser scattering tomography. The metal concentration at the depths from the surface to 50 μm of the wafers was analyzed using secondary ion mass spectrometry (SIMS). 50-70 nm diameter BMDs are uniformly distributed at a depth of more than 10 μm in wafer A. The deviation of the diameter of BMDs changes from 50-60 nm to 120nm at a depth of more than 13 μm in wafer B. The densities of the BMDs of wafer A and B are more than 6.2 × 109 cm-3 and 3.5 × 109 cm-3 saturated at depths of 10 μm and 13 μm, respectively. Figure 1 shows a sharp rise in the total surface areas of BMDs produced by the densities and sizes at a depth of around 10 μm and 13 μm and then the total surface area of the BMDs is saturated for wafer A, while it slightly rises with increasing depth. This means that the denuded zones of wafer A and B are 10 μm and 13 μm, respectively. The SIMS depth profiles of the metals in the wafers show that Cr, Fe, and Cu concentrations are extremely low at the depth from the surface to 10 μm and 13 μm, while the concentrations are highest at around the depth where the total surface area of the BMDs sharply rises, and the concentrations then decrease with increasing depth, regardless of the BMD size and density profiles, as shown in Fig. 1. The critical surface area of the BMD (S = 4πr2 NBMD d) for effective gettering was observed to be approximately 2 x 10-2, where 4π r2 is each BMD surface area, NBMD is the BMD density, and d is the wafer thickness. This value agrees well with an example in the literature [2, 3]. The total surface area of the BMDs of wafer C at the depth from the surface to 50μm is less than 2 x 10-2, and no metals were detected using SIMS. Modified wafer A with a denuded zone of 2 μm instead of 10 μm also gives the peak of Cr concentration at the depth where the surface area of BMD sharply rises and the Cr concentration at the peak gives approximately a fifth of that of wafer A. It should be noted that although the size or density of the BMDs is dispersed uniformly through the wafers or slightly increases with depth, more metals are gettered at around the depth where the total surface area of the BMDs sharply increases. It is considered that metals diffused in the deeper regions are dispersedly gettered by each BMD in deeper regions during cooling, while metals diffused in the denuded zone (DZ) are gettered by BMDs near the DZ during cooling. For effective gettering by the BMDs, sufficient total surface area of the BMDs should be close to the DZ. Reference [1] K. Saga, et.al, ECS Journal of Solid State Science and Technology, 4 (5) P131-P136 (2015). [2] K. Sueoka, ECS Journal of The Electrochemical Society, 152 (10) G731-G735 (2005).[3] D. Kot, et, al, ECS Transactions, vol.16 no.6, 207-218 (2008). Figure 1

We have investigated the limits on sheet resistance, junction depth and abruptness using ultra low energy As implants and RTA annealing. We report on anomalous diffusion of 1 keV arsenic implants where the same RTA anneal can result in a deeper junction compared to a 5 keV implant of similar dose. A range of anneal times and temperatures in an RTA from 1020C to 1175C, including spike anneals, have been studied. The effect of junction abruptness in reducing the external resistance of the S/D extension for these 5 and 1 keV As implants has been investigated. We show that because of a trade off between junction depth and sheet resistance limits, 1 keV As implants and RTA anneals cannot meet the technology roadmap requirements beyond 2005, though the junction abruptness will meet the requirements till 2011.