Effects of Quantization Noise and Distortion in EPWM Transmitters for OFDM Signal Amplification

Multi-carrier systems such as Orthogonal Frequency Division Multiplexing (OFDM) require linear amplification and have low power efficiency because of high peak-to-average power ratio (PAPR). In an Envelope Pulse-Width Modulation (EPWM) transmitter, the envelope component of a linear modulation wave is converted to a PWM signal by a delta-sigma (Delta-Sigma) modulator while the phase component modulates the carrier signal. The distortion-free amplitude multiplexing of the PWM and PM signals enables the power amplifier to achieve maximum power efficiency. In this paper, EPWM transmitter characteristics such as noise power spectral density and SNR will be analyzed. The application of the EPWM transmitter to OFDM signals will also be explored. From the simulation results, the Delta-Sigma modulator with an oversampling ratio of 32 provides sufficient in-band SNR and adjacent channel power ratio required for the IEEE 802.11a OFDM system.

Sigma delta modulation is a popular technique for high-resolution analog-to-digital conversion and digital-to-analog conversion. We investigate chaotic phenomena in multibit first-order sigma-delta modulators. Particular attention is placed on the occurrence of periodic orbits or limit cycles. These may result in idle tones audible to the listener when sigma-delta modulation is used for audio signal processing. One suggested method of eliminating idle tones is the operation of a sigma delta modulator in the chaotic regime. Unfortunately, chaotic modulation of a first order sigma delta modulator is a poor system for signal processing. We show that minor variations on a traditional first order sigma-delta modulator, together with a multibit implementation, may be used to produce an effective, stable chaotic modulator that accurately encodes the input and helps remove the presence of idle tones. (c) 2001 American Institute of Physics.

In this paper, we propose a systematic approach to designing a highly efficient two-stage power amplifier (PA) with improved linearity. Investigation into the sources of nonlinearity in gallium nitride (GaN) high electron mobility transistors (HEMT) has been essential prior to the development of the two-stage PA design with improved linearity. A prototype was designed and fabricated using 45W and 6W packaged CREE transistors as the main and driver stages respectively. A peak efficiency of about 70% was obtained, using a continuous wave stimulus, over a bandwidth of 200MHz. When driven with a 20MHz WCDMA signal, at 800MHz, an adjacent channel leakage power ratio (ACLR) of 46dBc and an error vector magnitude (EVM) of about 1.5% were recorded at a peak output power of 39dBm without the use of digital pre-distortion (DPD). These results represent an improvement of about 10dB in ACLR and 2% in EVM for the two-stage PA using nonlinear driver as compare to those obtained using a linear driver.

A novel third order delta sigma modulator (DSM) is presented. The third order loop filter in the proposed DSM shares one opamp among three integrator stages through an optimal operation timing, which makes use of load capacitance differences between integrator stages. The power dissipation of the proposed DSM is much lower than conventional third order DSM because power consuming blocks in the DSM are only one opamp and a comparator. The proposed DSM, designed on 0.35µm CMOS process under 3.3V supply achieves 1mW power dissipation with 100-11kHz band width and 96dB SQNR.

A design of a 5.6 GHz frequency synthesizer with switched bias LIT VCO and low noise on‐chip LDO regulator for 5G applications

Foreseen requirements and use cases of future beyond fifth-generation (B5G) and sixth-generation (6G) mobile networks have shown that current mobile networks implementations must be reconsidered. Analog radio-over-fiber (ARoF) is a prospective solution for future mobile fronthaul of certain applications where current solutions fall short to fulfill future demands on bandwidth and power consumption. This paper provides a complete New-Radio (NR) conformance testing of ARoF fronthaul links in full accordance with the 3rd Generation Partnership Project (3GPP) technical specifications. We experimentally verified that the adjacent channel leakage power ratio (ACLR) and the error vector magnitude (EVM) transmitter requirements are fulfilled validating ARoF links as a suitable solution for next-generation mobile fronthaul. Wireless transmissions results are also provided.

There is developed the simulation model of single bit third order sigma-delta modulator. It provides investigation of the influence of components' parameters on modulator's error. It is presented results of investigation of integrator's nonlinearity on integral nonlinearity of this modulator. The presented results provides purposeful selecting of correction function for correction nonlinear error of analog to digital converters based on presented modulator. Also the proposed methodology provides opportunity of parametric optimization in development of sigma-delta modulators.

The fact that VCO-ADCs produce noise-shaped quantization noise suggests that a link between frequency modulation and Sigma-Delta modulation should exist. The connection between a VCO-ADC and a first-order Sigma-Delta modulator has been already explained using Pulse Frequency Modulation. In this article, we attempt to extend this explanation to a generic Sigma-Delta modulator. We show that the link between Sigma-Delta modulation and Pulse Frequency Modulation relies in a sampling invariance property that defines the equivalence between both entities. This equivalence property, allows to go beyond the white quantization noise model of a Sigma-Delta modulator, revealing the origin of some nonlinear phenomena. We first predict spurious tones which cannot be explained by circuit non linearity. Multi-bit and single-bit modulators are shown to belong to a same generic class of systems. Finally, quantizer overload is analyzed using our model. The results are applied to Continuous-Time Sigma-Delta modulators of orders one, two and three and then extended to a generic case.

The article proposes and demonstrates the real time Sigma Delta Radio over Fibre (ΣΔ-RoF) system implementation focusing 5G cloud/centrali%ed radio access network (CRAN) fronthaul implementations. The ΣΔ-RoF has been demonstrated by using 2nd order Sigma-Delta Modulation (SDM). The benchmark has been validated for 20-MH% LTE signal with 256 quadrature amplitude modulation having a carrier frequency o f 3.5 GH% with 5 km o f Standard Single Mode Fibre. Moreover, it is shown that by keeping the complexity low as Analog Radio Rover Fibre System (A-RoF), ΣΔ-RoF outperforms the A-RoF. The performance is presented by reporting adjacent channel leakage ratio and error vector magnitude. It can be inferred that ΣΔ-RoF corroborates the required range o f the 5G C-RAN fronthaul networks and can be a propitious candidate for future mobile haul applications.

An architecture for a second-order Sigma Delta modulator is proposed. It is part of an ongoing analysis of the stability of multiloop modulators. This modulator features an increased number of parameters, allowing a designer to swap an increase in stability for a reduction in the signal-to-noise ratio (SNR) for small inputs. The tradeoff, compared to a traditional modulator, is an increase in the complexity of the integrator closest to the comparator. Simulation results are presented that demonstrate the ability to design modulators with superior stability compared to a standard second-order modulator and the ability to design modulators with superior SNR performance over most of the input amplitude range compared to a standard second-order modulator. >

The author discusses multistage modulators, digital processing of pulse density modulation signals, algorithms, testing, modeling nonidealities and stability. Diagrams are given for: an N/sup th/ order sigma delta modulator, a multistage closed loop modulator, a first order digital sigma delta modulator, and a low pass digital comb filter.

The parallelism between a first-order sigma-delta modulator and a VCO-based ADC allows to calculate the DFT of the sigma delta sequence using Pulse Frequency Modulation theory. This paper exploits this parallelism to propose a more general model that links continuous time sigma delta modulators of an arbitrary order with Pulse Frequency Modulators. This novel point of view also predicts the spectral contents of a sigma delta encoded sequence beyond the white quantization noise model. The quantization noise can be split in two components, a deterministic one representing the carrier harmonic sidebands of a Pulse Frequency Encoded signal and a noise shaped pseudorandom signal representing the sampling operation. We seize these findings to propose a conjecture on the stability of a sigma delta modulator.

This paper presents a precision wide range Delta Sigma ADC SC1601 (SC1601 is the product number of ADC) with programmable gain amplifier (PGA) and programmable output data rate features. The ADC offers four fully differential input channels. Each channel can be programmed with a gain of 1 to 128 in binary steps i.e. in powers of 2. The ADC uses a second order delta sigma modulator (DSM) followed by a digital sinc\(^3\) filter. The output data rate of the ADC is also programmable from 312.5 Hz to 2.5 kHz either to achieve higher accuracy or higher speed. The ADC also offers on chip offset and gain calibration features to reduce the offset and gain errors. The serial interface of ADC is SPI\(^{TM}\) compatible. The SC1601 ADC is fabricated in 0.18 \(\upmu \)m CMOS process at Semi-Conductor Laboratory (SCL). The total power consumption of the ADC is 4 mW and it consumes total silicon area of 2.25 mm\(^2\). SC1601 ADC achieves a maximum ENOB of 19.15 bits at a data rate of 312.5 Hz with a full scale range of 1.22 V. The ADC requires a supply voltage of 3.3 V and 1.8 V and can operate in a wide temperature range of −55\(^{\circ }\)C to 125\(^{\circ }\)C. SC1601 ADC is developed for the satellite launch vehicle telemetry system.KeywordsDelta sigma modulatorAnalog multiplexerProgrammable gain amplifierDigital filter

Sigma-Delta modulators (SDMs) are capable of shaping the quantization noise out of a specific frequency band defined by their noise transfer function (NTF). A single-bit output SDM pose further advantages in applications that would typically require a multi-bit DAC, since then only a single-bit DAC is required, which is much easier to design and is inherently linear in comparison to a multi-bit one. Look-ahead SDMs have been proposed to enhance the signal-to-noise-and-distortion-ratio (SNDR) and the output bandwidth of conventional single-bit SDMs. Multi-Step Look-Ahead sigma-delta modulators (MSLA SDMs) further reduce the hardware complexity required for the implementation of typical look-ahead SDMs while maintaining their performance advantages. In this work the architecture and the benefits of the MSLA SDMs are showcased. Finally the advantages of the MSLA SDMs over single-bit conventional ones are demonstrated and several hardware implementation choices for design optimization are discussed.

This paper presents the link-level performance of downlink non-orthogonal multiple access (NOMA) with successive interference cancellation (SIC) receiver, considering the influence of error vector magnitude (EVM). In our evaluations, for the case of a 1-by-2 transmission and the number of NOMA multiplexed users is two, we clarify the performance of NOMA for cell-center user equipment (UE) with codeword level SIC (CWIC) receiver and the performance of the cell-edge UE, which does not apply SIC. Based on link-level performance evaluations, we show that the performance of CWIC receiver is almost the same as that of ideal SIC when the allocated transmit power ratio to cell-center UE is less than 0.35, the modulation and coding scheme (MCS) of cell-center UE is 16QAM (R = 0.51) or 64QAM (R = 0.47), and the MCS of cell-edge UE is QPSK (R = 0.51). Furthermore, we also show that, when EVM value is 4 % and the allocated power ratio to cell-center UE is between 0.2 and 0.37, the level of degradation due to the influence of EVM is below 0.6 dB, which is almost the same level of degradation as that of orthogonal frequency division multiple access (OFDMA) for the EVM value required by 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE). On the other hand, we show that the influence of EVM is marginal for cell-edge UE compared to cell-center UE. However, when the cell-center UE uses a higher order modulation such as 64QAM, we show that the required SNR of cell-edge UE increases due to the increase in inter-user interference. Based on these results, we clarify that it is important for the base station (BS) to take into account the target BLER and influence of EVM when selecting the MCS and allocated transmit power ratio of NOMA UEs.