EMI reduction in randomized boost rectifier

This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by field programmable gate array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400 V nominal output voltage and 220 Vrms nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device

The paper proposes a digital based control method which can be used on power factor correction (PFC) circuit to improve converter power factor (P.F.) at light load conditions. A major contributor to a non-unity P.F. is the need of input capacitor to alleviate differential mode electromagnetic interference (EMI) conducted back to the AC source. At light load, the overall system impedance (EMI filter and PFC circuit) becomes more capacitive which leads to large phase difference between voltage and current and results in a low power factor. A digital phase locked loop base vector cancellation (DPLLVC) technique is proposed in this digest to improve the light load P.F. This technique improves upon the previously proposed Phase Leading Filter Current Compensation (PLFCC) technique as it no longer requires a derivative of the input voltage, which can add noise. In addition to DPLLVC technique, a tracking error compensation scheme is added to further improve the PF under light loads. The scheme is tested and results reported on a 3.3KW Gallium-Nitride (GaN) based Totem Pole bridgeless PFC (TTPL PFC) design. With DPLLVC and tracking error compensation techniques, over 37% P.F. improvement is observed when compared to the results with PLFCC technique at 2% load.

Power Line Communication (PLC) technologies are being used in many applications and offer the advantage of utilizing existing power cables for both power and data transmission, thus minimizing cost and complexity. Nevertheless, PLC technology requires further investigation to solve possible co-existence issues. Indeed, recent studies confirmed that alternative modulation schemes such as Random Pulse Width Modulation (RPWM), applied to switching-mode power converters to minimize conducted emissions, detrimentally interfere with the PLC system. This paper presents an experimental test campaign aimed at investigating the effects of RPWM on the G3-PLC system, with the final goal of understanding the conditions under which RPWM schemes can be considered as an effective alternative to conventional Pulse Width Modulation (PWM) in applications involving PLC systems. In details, the effects of different RPWM parameters such as switching frequency, modulation index, and Random Number Update Rate (RNUR) on the G3-PLC is investigated. In addition, different RPWM schemes such as Random Frequency Modulation (RFM) and Random Pulse Position Modulation (RPPM) are compared in terms of performance so as to highlight which RPWM is best suited to assure coexistence with PLC systems. The impact of RPWM on the communication channel is evaluated in terms of Frame Error Rate (FER), Channel Capacity, and Channel Capacity Loss metrics. Experimental results confirmed that randomly modulated converters with switching frequencies near the G3-PLC bandwidth cause more significant disturbance and possible coexistence issues than the switching frequencies out of this range. Results also show that the modulation index and the RNUR of RPWM have a direct effect on the communication channel. Moreover, a trade-off between Electromagnetic Interference (EMI) reduction and coexistence issues is observed: RFM, which is very effective for EMI reduction, is found to be very disruptive for G3-PLC, compared to alternative random modulation techniques such as RPPM.

This paper addresses improved electromagnetic compatibility (EMC) in switched-mode power converters (SMPCs), without using electromagnetic interference (EMI) filters. A practical solution is proposed for minimizing conductive EMI in a pulsewidth modulated (PWM), and random PWM dc-dc power converters. A comparative investigation is performed into the use of different random modulation schemes (driven by the DSP-2 board with the TMS320C32) as against the normal PWM. The effectiveness of randomization on spreading those dominating frequencies that normally exist in constant frequency PWM schemes is evaluated by power spectral density (PSD) estimations in the low-frequency range. Some parasitical- and topology-based EMI sources in devices are presented and frequency analysis is shown by using the discrete Fourier transform (DFT). SPICE simulations are also used to verify practical solutions for eliminating negative EMI sources and achieving EMC improvements. Finally, levels of conductive EMI are estimated with DFT, and experimentally verified to comply with the CISPR 25 (or EN 55025) regulations. Moreover, it is clearly shown, that limited speed PWM driving of the power switches with appropriate snubber circuits guarantees reduced conductive EMI. When considering the price and high EMC, in the final solution the power converter is driven by the mu-controller PIC16F876 with limited numerical and peripheral capabilities, where only normal PWM and randomized PWM can be implemented

Pulse Width Modulation (PWM) techniques are vital for voltage source inverters (VSIs) to deliver high-quality, controlled outputs. The output voltage harmonic spectrum reveals the distinct performance of different PWM algorithms. Conventional PWM methods focus on enhancing performance parameters such as increasing the fundamental component, reducing total harmonic distortion (THD), minimizing switching losses, and selectively eliminating harmonics. In modern applications, additional challenges such as harmonic power dispersion and electromagnetic interference mitigation are also critical. This paper primarily addresses the enhancement of harmonic power dispersion through random PWM (RPWM) techniques. Unlike traditional deterministic PWM strategies, RPWM generates non-deterministic harmonic profiles, effectively spreading harmonic energy across a wider frequency range and thereby reducing acoustic noise in drive applications. A set of carrier-based RPWM techniques is proposed to improve VSI performance. These are implemented on a field-programmable gate array (FPGA) platform, confirming high-speed operation, less power dissipation, and efficient hardware utilization. The effectiveness of the FPGA implementation is validated through MATLAB–Simulink co-simulation, demonstrating the proposed RPWM methods' superiority in harmonic power dispersion and system performance.

This paper proposes fuzzy based Random Pulse Width Modulation (RPWM) technique to trim down the overriding harmonic clusters in the output current's spectrum. Asynchronous Motor is fed by PWM inverter and current is controlled by Field Oriented Control (FOC) algorithm. When an inverter with constant switching frequency is used, it would result in narrow-band harmonics. These harmonic clusters can make acoustic noises and Electromagnetic Interference (EMI). In order to diminish the noises and EMI consequence of these harmonic clusters, adaptive fuzzy controller based random-switching PWM strategies have been introduced. The concept of RPWM technique is to spread the original narrow-band harmonic throughout a wide range of frequencies. Acoustic noises and EMI are reduced uniformly in output current's spectrum. Proposed switching pattern is compared with conventional switching pattern that is proposed earlier. Simulation results of conventional and proposed method are obtained by using MATLAB/Simulink Software.

In the system of permanent magnet synchronous motor (PMSM) driven by indirect matrix converter (IMC), SVPWM technology is used in the inverter stage, which causes that the output current generates high-frequency harmonics around the integral multiples carrier frequency, thus generating high-frequency noise and electromagnetic interference. In order to suppress the high-frequency harmonics of output current in IMC-PMSM, a Markov chain random asymmetrical SVPWM (MRA-SVPWM) method is proposed in this paper. Although random PWM (RPWM) technology have some effect to reduce the harmonic amplitude. There are still some inherent defects. Markov chain with non-aftereffect is applied to random switching frequency PWM in order to improve the performance of RPWM. Meanwhile, MRA-SVPWM changes the switching state by adjusting the vectors order and thus changes the coefficient of the harmonic. A better suppression performance around the integer multiples carrier frequency is achieved. Meanwhile, the principle of harmonic suppression is analyzed by using three-dimensional Fourier. Finally, the effectiveness of the proposed algorithm is verified by experiments.

A power factor correction (PFC) circuit is an essential requirement for AC-DC conversion to meet the strict grid quality standards. High efficiency and increased power density requirements have driven the industry towards bridgeless PFC circuits as a viable solution for front end rectification. Inherent electro magnetic interference (EMI) issues of an H-Bridge PFC topology has hindered the adaptation of this circuit. In this paper, a duty compensation method is proposed to reduce the harmonic content generated by switch node of an H-Bridge topology. The proposed control technique reduces the generated harmonics without addition of any hardware components helping to meet high power density requirements. A 1kW SiC-based laboratory prototype is designed to verify the proposed control technique. The experimental results show that an input power factor of 0.99 with a conversion efficiency of 96.5% and total harmonic distortion (THD) of 2.05 % can be achieved.

Conventional critical conduction mode (CRM) control for many boost-derived power factor correction (PFC) circuits forms triangular inductor current. For three-level boost (TLB) converter, the conventional method is unattractive because losses increase but waveform quality remains unchanged, compared to other topologies. In order to obtain higher efficiency and improved waveform qualities, this article focuses on the distinctive structure of TLB and its inherent degree-of-freedom (DOF) in current-slope shaping. Based on the DOF, a new CRM control for TLB PFC is proposed and analyzed. Detailed design and digital implementation method are also provided. Different from conventional methods, the proposed CRM control divides each switching cycle into three parts including common on-time of two switches, additional on-time of one switch and common off-time. Accordingly, TLB inductor current is synthesized in quadrangular forms. The analyses and experimental results confirm that switching frequency and peak input current of TLB can be reduced by the proposed control. Due to the reductions, efficiency, total harmonic distortion, and quality of input current are improved with practically unchanged power factor.

Plug-in hybrid electric vehicles (PHEVs) consist of a front-end boost rectifier, which incorporates a power factor correction (PFC) circuit for battery charging. Bridgeless interleaved (BLIL) PFC boost converter topology is proved as a standard PFC converter as it has high efficiency, reduced input current ripple, and reduced electromagnetic interference (EMI). This paper proposes a digital nonlinear control technique that employs a resettable integrator to shape the input current of the converter in phase with the input voltage to achieve high input power factor. This control approach rejects power source and load perturbations better than linear feedback control methods. This is accomplished by summing up the sensed input current of a BLIL converter with a fictitious current synthesized with the input voltage. In this work, a BLIL converter is analyzed for its input power factor improvement, voltage stress across the devices, and dynamic response under variable supply and load conditions using simulation. The hardware is tested for a 300 W BLIL boost converter to validate the simulated results. The performance of the proposed controller is compared with that of conventional average current mode control. The experiment and simulation results prove that the resettable integrator controller shows a better performance than the conventional controller.

The use of a bi-directional buck-boost cascade converter in electric vehicles allows the suitable control of both motoring and regenerative braking operations. Based on the bidirectional buck-boost cascade converter, the random pulse width modulation (RPWM) scheme is implemented to reduce the conducted electromagnetic interference (EMI). Compared with the fixed frequency PWM (FPWM), the proposed RPWM scheme can suppress the peaky EMI as well as provide the bidirectional power transfer capability. Simulation and experimental results are given to support the validity.

This paper presents stability improvement in an on-board battery charger for electric vehicles. The on-board battery charger consist a power factor correction (PFC) circuit and phase shift full-bridge converter. The PFC circuit regulates the DC-link voltage using the voltage and current controller. It also corrects the power factor of an input current. The full-bridge converter has control of the output voltage and current using the DC-link voltage for a battery charging. This paper proposes the design technique using a small signal model of the PFC circuit. The design method of type-three controller for a full-bridge converter is also proposed. A simulation has been performed on the on-board battery charger and their results are presented to verify the validity of the proposed system.

Brushless dc (BLDC) motor drives have gained significant attention due to their merits such as high efficiency, high dynamic response, high reliability etc. From the literatures, it is understood that there has been remarkable developments evolved in application of the feedback controllers for both the BLDC motor drive's speed and current loops. The recent investigation and innovations in the pulse width modulation (PWM) methods are not encompassed in BLDC drives. The conventional PWM results mechanical vibration and acoustic noise, and limit the application scope the BLDC drives. This is due to the incapability of deterministic PWM in spreading the harmonic power. This paper presents random pulse width modulation (RPWM) for BLDC motor drive with better harmonic power distribution. The randomness is introduced in carrier wave by toggling between triangular wave (+fc) and its inverted form (-fc). The performance of the proposed RPWM is validated by using MATLAB software and results such as harmonic spread factor (HSF), total harmonic distortion (THD), and acoustic noise spectrum are presented. The comparison of results with the conventional PWM demonstrates the superiority of the proposed PWM.

The methodology identifies potential EMI (electromagnetic interference) problems using results from field operations, historical data bases, and analytical modeling. Operational expertise, engineering analysis, and testing are used to characterize and prioritize the potential EMI problems. Results can be used to resolve potential EMI during the development and acquisition of new systems and to develop engineering fixes and operational workarounds for systems already employed. The analytic modeling portion of the methodology is a predictive process that uses progressive refinement of the analysis and the operational electronic environment to eliminate noninterfering equipment pairs, defer further analysis on pairs lacking operational significance, and resolve the remaining EMI problems. Tests are conducted on equipment pairs to ensure that the analytical models provide a realistic description of the predicted interference. >

In this paper, an optimized random PWM strategy for multilevel inverters is presented. The proposed optimized pulse width modulation scheme provides an improved performance over random pulse width modulation schemes for multilevel power converters. The total harmonic distortion is taken as the performance index for optimization. The harmonic distortion is optimized using the principle of Genetic algorithm. Simulation results of optimized PWM scheme for a three-level and five-level inverter are presented in this paper. An algorithm for generating the optimized switching sequence for n-level inverter is also proposed.