Duty compensated reduced harmonic control for a single-phase H-bridge PFC converter

The paper proposes a digital based control method which can be used on power factor correction (PFC) circuit to improve converter power factor (P.F.) at light load conditions. A major contributor to a non-unity P.F. is the need of input capacitor to alleviate differential mode electromagnetic interference (EMI) conducted back to the AC source. At light load, the overall system impedance (EMI filter and PFC circuit) becomes more capacitive which leads to large phase difference between voltage and current and results in a low power factor. A digital phase locked loop base vector cancellation (DPLLVC) technique is proposed in this digest to improve the light load P.F. This technique improves upon the previously proposed Phase Leading Filter Current Compensation (PLFCC) technique as it no longer requires a derivative of the input voltage, which can add noise. In addition to DPLLVC technique, a tracking error compensation scheme is added to further improve the PF under light loads. The scheme is tested and results reported on a 3.3KW Gallium-Nitride (GaN) based Totem Pole bridgeless PFC (TTPL PFC) design. With DPLLVC and tracking error compensation techniques, over 37% P.F. improvement is observed when compared to the results with PLFCC technique at 2% load.

Electronic devices such as SMPS, UPS, rectifier and electronic ballast primarily require DC power supply. Electronic switching devices draw highly distorted input current (spikes with respect to the line voltage) for a short duration, due to their non-linear nature. This results in interference with other electrical equipment, increase in Total Harmonic Distortion (THD) and poor Power Factor (PF), which further results in poor output voltage regulation. Power factor correction (PFC) circuits are being increasingly used to mitigate the problems associated with poor power factor. This paper discusses an Active Power Factor Correction (APFC) technique using voltage feed forward and voltage feedback loop. It is based upon current wave shaping technique to get the source current in phase with the input voltage. Current wave shaping is achieved by implementing voltage control loop and current control loop. This paper explains the development of boost converter as a power factor correction controller, operating in continuous conduction mode (CCM). The boost converter is also designed to regulate the output voltage. The prototype of boost active PFC has been developed for single-phase rectifier, supplying load of 80W at 400V DC. Analysis has been carried out for different load conditions which prove that the PF can be improved from 0.6 to 0.98∼0.99 with THD reduction.

In order to reduce the high frequency (HF) disturbances in the frequency range of 2 kHz to 150 kHz, recommendations for the design of future active power factor correction (PFC) circuits that are used in typical household devices are presented in this paper. The design recommendations are based on laboratory measurements which are performed on two PFC circuits with different switching frequencies and on an interleaved PFC circuit with varying switching frequency. Here, two different scenarios are considered (with and without classical designed grid side filter). Additionally, the two topologies of these PFC circuits and the corresponding control strategies are described in detail regarding the HF emission characteristics.

This paper presents stability improvement in an on-board battery charger for electric vehicles. The on-board battery charger consist a power factor correction (PFC) circuit and phase shift full-bridge converter. The PFC circuit regulates the DC-link voltage using the voltage and current controller. It also corrects the power factor of an input current. The full-bridge converter has control of the output voltage and current using the DC-link voltage for a battery charging. This paper proposes the design technique using a small signal model of the PFC circuit. The design method of type-three controller for a full-bridge converter is also proposed. A simulation has been performed on the on-board battery charger and their results are presented to verify the validity of the proposed system.

Plug-in hybrid electric vehicles (PHEVs) consist of a front-end boost rectifier, which incorporates a power factor correction (PFC) circuit for battery charging. Bridgeless interleaved (BLIL) PFC boost converter topology is proved as a standard PFC converter as it has high efficiency, reduced input current ripple, and reduced electromagnetic interference (EMI). This paper proposes a digital nonlinear control technique that employs a resettable integrator to shape the input current of the converter in phase with the input voltage to achieve high input power factor. This control approach rejects power source and load perturbations better than linear feedback control methods. This is accomplished by summing up the sensed input current of a BLIL converter with a fictitious current synthesized with the input voltage. In this work, a BLIL converter is analyzed for its input power factor improvement, voltage stress across the devices, and dynamic response under variable supply and load conditions using simulation. The hardware is tested for a 300 W BLIL boost converter to validate the simulated results. The performance of the proposed controller is compared with that of conventional average current mode control. The experiment and simulation results prove that the resettable integrator controller shows a better performance than the conventional controller.

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn- on of part power switch and soft turn- off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis.

Constant duty cycle controlled discontinuous conduction mode (DCM) flyback power factor correction (PFC) converter has the advantage of high power factor (PF) and the disadvantage of low efficiency. While, constant on-time (COT) controlled critical conduction mode (CRM) flyback PFC converter has the exact opposite features, besides its switching frequency varies in a line cycle, and the variation range is very large, which complicates the electromagnetic interference (EMI) design. In order to obtain both benefits of these two control methods, an adaptive off-time (AOT) control technique for DCM flyback PFC converter is proposed in this paper. By utilizing the output voltage and the amplitude of line voltage to adjust the off-time of the main switch, the magnetizing current of transformer exactly operates in CRM when the rectified input voltage gets the peak. Thus, the root-mean-square (RMS) current of the main switch and the diode, as well as the conduction loss can be effectively reduced, and high efficiency can be obtained. The proposed control technique also can achieve theoretical unity PF over universal input voltage range of 90~264VAC. Moreover, its variation range of switching frequency is greatly reduced compared to that of COT control. A 60W prototype has been fabricated and tested in the laboratory and experimental results are presented to verify the effectiveness of the proposed method.

Low frequency harmonics injection into AC power supply and small power factor are the main disadvantages of conventional rectifiers. By using the high power factor correction circuits (HPFCC) the input current has a sinusoidal form and is in phase with the power supply voltage. By solving the problem of power factor with high frequency switching current mode control, another problem arises-that of high frequency harmonics generated in radio-frequency (RF) range by the converter. Therefore the problem of electromagnetic interference (EMI) must be appropriately treated as well. This paper deals with randomized pulse width modulation (RPWM) strategy for the boost rectifier. The randomized modulation principle is introduced in an ordinary PWM control unit which is widely used in unity power factor correction circuits. Introduction of the RPWM results in smaller increases of the total harmonic distortion (THD) in the input current and consequently neglected decreasing of the power factor. On the other hand, this approach causes the high-order harmonics spectral components to be significantly reduced and dispersed around ordinary spectral lines, which means reduced conducted EMI as well.

Most of the consumer electronic loads require DC input, so requirement of smart home appliances with Power factor Correction (PFC) circuits is increasing day by day. PFC circuits are necessary to maintain good power quality supplied by grid. Usually, boost converter based PFC circuit is used which is followed by buck converter to supply load. In this context, a new non isolated simultaneous buck boost DC output power factor correction rectifier topology is discussed which can interface an AC source to two DC loads. From the two DC outputs, one DC output voltage is higher and one is lower than the peak AC input. The operation of the rectifier and its operating modes are explained. Control algorithm of the topology to enforce output voltage regulation and power factor correction is discussed. The proposed topology along with its control is experimentally validated using a prototype.

The focus of this paper is on zero-crossing current distortion that commonly occurs in active power factor correction (PFC) circuits. Initially, it derives several equations which quantify the zero-crossing error. Then it proposes a new switching scheme which drastically mitigates the problem. Finally, it shows the effectiveness of the proposed method using simulation results. An H-bridge PFC topology is used.

Electric Vehicles (EVs) are gaining importance in many countries in the world as they are clean and cheap mode of transportation. The main issue with EVs is the charging time. Among many methods, pulse charging is one of the methods used for fast charging of Electric Vehicles. To overcome the issue of poor power factor on the source side introduced by diode bridge rectifier, a Power Factor Correction (PFC) circuit is used. The current in the inductor of PFC circuit and the voltage of its capacitor is controlled appropriately to ensure required performance. Conventional control methods in addition with pulsed charging leads to voltage swell and swell at the DC bus due to the presence of multiple energy storage elements. This paper suggests a Modified Control Scheme for PFC circuit to overcome the problem of voltage variation and keep the DC bus voltage variation within a tolerable limit.

Conventional critical conduction mode (CRM) control for many boost-derived power factor correction (PFC) circuits forms triangular inductor current. For three-level boost (TLB) converter, the conventional method is unattractive because losses increase but waveform quality remains unchanged, compared to other topologies. In order to obtain higher efficiency and improved waveform qualities, this article focuses on the distinctive structure of TLB and its inherent degree-of-freedom (DOF) in current-slope shaping. Based on the DOF, a new CRM control for TLB PFC is proposed and analyzed. Detailed design and digital implementation method are also provided. Different from conventional methods, the proposed CRM control divides each switching cycle into three parts including common on-time of two switches, additional on-time of one switch and common off-time. Accordingly, TLB inductor current is synthesized in quadrangular forms. The analyses and experimental results confirm that switching frequency and peak input current of TLB can be reduced by the proposed control. Due to the reductions, efficiency, total harmonic distortion, and quality of input current are improved with practically unchanged power factor.

This paper proposes a three-phase power factor correction (PFC) for a three-phase induction motor (IM) drive under normal and abnormal supply voltage conditions. A new technique of PFC based on a positive sequence components method is introduced. The PFC circuit uses a SEPIC converter with a single switch, which needs only one control signal. The PFC control method with the proposed technique provides nearly sinusoidal supply currents maintaining a high power factor under different supply voltage conditions. Furthermore, the PFC method maintains DC bus voltage at the desired value. The regulated DC voltage feeds a four-switch inverter of the three-phase IM drive system. Mathematical analysis of the equivalent circuits based on operation modes of the SEPIC converter is introduced. The performance of the proposed technique is evaluated under ideal and non-ideal supply voltage conditions. The results are analyzed in terms of reduction in the THD of supply currents and improvement of power factor. System validation performed in simulation and experiment has shown the effectiveness of the proposed system under different supply voltage conditions.

A high-frequency electronic ballast with high power factor and low harmonic distortion for driving two 36 W fluorescent lamps is presented in this paper. The power factor correction (PFC) is required to shape the input line current. Also, the low-pass filter at the mains is used to reduce the harmonic distortion and to reduce the radio frequency interference (RFI) injected from the high-frequency electronic ballast into the mains. Experimental results have been obtained for the circuit of electronic ballast. The experimental measurements show that the proposed electronic ballast has features of continuous line current, adequate power factor correction and reasonable total harmonic distortion (THD).

In the last decade, the amount of electronic equipment connected to the AC line has been increased; this equipment presents low values of power factor (PF) and high total harmonic distortion (THD) due to their nonlinear behavior. The personal computer (PC) is one piece of electronic equipment that has these problems, the main reason being because it was decided to develop a switching mode power supply (SMPS), for the PC, with power factor correction (PFC). In this paper, the experimental results of the SMPS prototype for PC applications, which includes a PFC feature, are presented. Analysis of the design compromises that must be kept in mind in order to develop a SMPS with PFC has been included. This analysis evaluates the compromises that must be considered when in the design of a SMPS with PFC, we try to obtain the best power factor (PF), total harmonic distortion (THD) and construction cost.