Equivalent circuit model of the IC-Stripline coupling to IC package

In automotive industry, providing an integrated circuit (IC) with high level of features, reduced die size and high Electro Static Discharge (ESD) and Electro Magnetic Compatibility (EMC) performances is the key to have design wins and considerable market share. ESD structures, occupying a significant place within the IC, are designed taking into account two main criteria’s: high ESD performances and a reduced size. Their integration inside an IC has to consider their behavior during EMC tests. This paper illustrates two case studies where the ESD structures used, despite their good ESD performance, led to EMC performance degradation. A deep study is made in each case and various solutions are proposed and discussed.

To bring automotive integrated circuits (ICs) to market, manufacturers must subject their products to numerous electromagnetic compatibility (EMC) tests such as electromagnetic immunity and emission tests, or electrostatic discharge (ESD) tests. These tests need EMC test boards that meet the requirements of the specific standards. However, the current need to increase the frequency range of EMC tests poses a challenge in designing standard-compliant test boards. In this paper, we address this issue by introducing a modular and reusable IC level EMC test system. We demonstrate the system’s effectiveness with an example of two frequently used and conducted EMC tests: the direct power injection (DPI) immunity test and the 150Ω\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$150\\,\\mathrm{\\Omega}$$\\end{document} electromagnetic emission measurement. The two test setups are constructed and validated using the presented modules. It is shown how the frequency range can be expanded while minimizing costs and design efforts for the EMC test board design.

For the deployment of Wireless Sensor Networks (WSN) in nuclear reactor environment to monitor and measure the plant parameters, the WSN nodes should be rugged, able to withstand high temperature, radiation and should be qualified in the environmental tests, Electromagnetic compatibility (EMC) and seismic tests as per the international standards. Hence Industrial grade wireless sensor networking nodes which meet the required specifications have been designed and developed. The nodes after successful development and functionality testing have been subjected to EMC tests at EMI/EMC Lab in Indira Gandhi Centre for Atomic Research (IGCAR). Subsequently they have been successfully qualified for EMC tests at SAMEER (Society for Applied Microwave Electronic Engineering and Research), chennai. This paper describes briefly about the design and development of nodes, measures taken for EMC qualification of nodes, qualification tests done and the test results.

This paper focuses the application of absorbing material in Integrated Circuits (IC), proposed that IC package coated absorbing material inside can suppress the electromagnetic interference (EMI) in IC chip which caused by the outside complex electromagnetic environment, as well as reducing the electromagnetic radiation caused by chip itself. This proposal is well demonstrated by finite difference time-domain (FDTD) method. Two different configurations of thin absorbing material coating, “Single” and “Double”, are studied in this paper. In the first of simulation, the complex electromagnetic environment is modeled as the Gaussian incident plane wave; in the second, two adjacent pins are chosen as signal port and ground port, to simulate the electromagnetic radiation caused by chip. Finally, to analyze the performance of absorbing material by comparing shielding effectiveness (SE). The analysis process can provide for IC chip electromagnetic compatibility (EMC).

Transverse ElectroMagnetic (TEM) cell measurements are often used to evaluate the potential of ICs to cause radiated emissions in printed circuit boards. These measurements are a function of the unbalanced current on package power pins, for example, where more current enters one side of an IC than another, and the displacement current caused by capacitive coupling from the power grid mesh to the septum of the TEM cell. The relationship between unbalanced currents and TEM cell measurements is derived in this paper. A distributed model of the on-die power delivery network is developed to show that unbalanced currents may be caused by an asymmetric power pin arrangement, by an imbalance in package impedance, or by an imbalance in the impedance of the on-die power delivery network. To validate results, the magnitude and phase of high-frequency power-pin currents were measured on a test chip. Experiments showed that results could be used to guide modifications to the chip's connection to the printed circuit board power structure to minimize unbalanced currents and, thus, to minimize TEM cell measurements.

A TEM cell is a rectangular or square coaxial transmission line tapered at each end to form a closed cell. The one end of the cell can be fed with a signal generator and the other end can be terminated by a resistor load equal to the characteristic impedance of the line (Crawford, IEEE Trans Electromagn Compat 16(4):189–195, 1974) [1]. Between the inner conductor (the septum) and the top and bottom plates, a field propagates from the source to the termination as a planar field in free space. Transverse electromagnetic (TEM) cells are used to generate uniform EM waves in a shielded space. The cell has a tapering section at each end, so that the rectangular coaxial transmission line is able to adapt to standard coaxial connectors (Tippet and Chang, Radiation characteristics of dipole sources located inside a rectangular, coaxial transmission line, 1976) [2]. TEM cells are used for Radiated emission and Radiated immunity testing of small products, for biomedical experiments, and for calibration of RF probes/sensors. The wave propagation inside the cell is similar to far-field plane propagation in free space and the wave has an impedance of free space, i.e., 377 Ω [1]. The cutoff frequency of the cell depends upon its dimensions. This is the limitation of the cell because this constrains the size of a product and we can test within the cell. The TEM cell designed is considered to be of an open type.

The need for compact models of Integrated circuits (IC) is a well-recognized problem in electronics cooling simulations of electronic systems. Simplified thermal models have been reported in the literature to simulate the transient thermal behavior of IC devices. Most of the simplification approaches require a pre-determined topology of a resistance-capacitance (RC) network. Multigrid technique allows for automatically constructing both the topology and characteristics of the reduced-order or compact models of devices (primarily IC packages) for use in system-level simulations. In this study, we report an approach where the topology and the nodal RC values of the network are automatically generated. The procedure is also applicable for complex IC sub-systems or systems like multi-chip modules, stacked die package, system-in-package, and CPU module, and hard drives. In the study report herein, the method is applied to three types of IC packages. The first package is a 196-pin fine pitch ball grid array (FBGA15/spl times/15/spl I.bar/196 L) package. The second package is a 480-pin plastic ball grid array (PBGA+HS37.5/spl times/37.5/spl I.bar/480 L/spl I.bar/extHS) package with drop-in heat spreader. An external heat sink is attached to the top surface of the package. The third package is an 8-pin small outline IC (SOIC/spl I.bar/480 L) package with a total power dissipation of 0.5 W. RC networks are created for these packages and then used in CFD simulations for different boundary conditions, corresponding to single phase natural and forced convective cooling. The simulation results are compared to the corresponding detailed package simulations.

This paper discusses the design and testing of the lasers built for the Clementine Laser Rangefinder that was used to map the lunar topology. a baseline Acceptance Test Procedure (ATP) was run once and the flight laser was built. Then the Laser Resonator Assembly (LRA) and the Laser Power Supply (LPS) were subjected to vibration and electromagnetic compatibility (EMC) testing as well as a 50 hour Thermal Vacuum test (T- VAC). Laser energy and boresight stability was checked after each vibration axis and after EMC testing. A complete ATP was run again after all environmental tests were completed, results were compared to baseline.

The short-circuit current(SCC) is far larger than the rated current of existing circuit breakers, which has been a serious problem threatening the safety of the power grid. The economical high-voltage AC current limiter based on high coupled split reactor(HCSR) and rapid switch can be used to suppress the SCC. In this paper, the composition structure and working principle of the limiter are introduced at first. The main source of electromagnetic interference(EMI) in the system is explained then. In order to improve the reliability of the economical limiter and also to reduce the interference from its own, both electromagnetic compatibility(EMC) immunity tests and EMC emission tests should be done. As there is no testing standard basis for this new type of limiter, this paper gives the EMC test requirements, test methods and test criterion. According to different EMC tests and tested port types, specific test parameters and test procedures are given as well. At the end of the paper, the practical anti-interference measures are given to ensures the reliability of the design. Beyond that, however, this paper also offers reference for establishing testing standards of the economical high-voltage AC current limiter.

Electromagnetic compatibility (EMC) can be considered as the ability of the electromagnetic apparatus to function satisfactorily without interfering the others or being interfered by the others. Nowadays, the conformity of electromagnetic products to corresponding EMC standards becomes of importance in order to cope with the mandatory requirements prescribed by the global market. The EMC conformity becomes the main part of quality assurance and safety of products. This paper presents the state-of-the-art EMC conformity of products in Indonesia from regulation and technical point of view. We conducted survey on the quo-vadis of EMC regulation in the country by communicating with some governmental bodies. At the same time, we investigates the EMC conformity of some products finding their application country-widely in domestic market by conducting EMC testing on them including emission and immunity test. From our investigation it is realized that regulations on EMC are not established yet because the responsible authorities are not assigned yet. Therefore EMC conformity is not mandatory yet for products manufactured or imported for domestic market. However, it is planned that the mandatory would come into power in earliest 2012. Moreover, EMC testing showed that the products under testing are mostly not conforming to EMC standards. Those products did not meet, either one of emission/immunity requirement or both. This fact emphasizes the need of establishing mandatory EMC regulation as well as responsible authorities.

Electromagnetic compatibility (EMC) can be considered as the ability of the electromagnetic apparatus to function satisfactorily without interfering the others or being interfered by the others. Nowadays, Indonesian government have a big concern about the conformity of electromagnetic products to corresponding EMC standards. The EMC conformity becomes the main part of quality assurance and safety of products in Telkom Indonesia. This paper presents the EMC conformity of products in Telkom Indonesia from regulation and technical point of view. We conducted survey on the quo-vadis of EMC regulation in the country by communicating with some Quality Assurance laboratory. At the same time, we investigated the EMC conformity of some telecommunication products to find their quality by conducting EMC testing on them including radiated and conducted emission test. From our investigation it is realized that some product was not yet comply compare to the newest standard of EMC, especially CISPR 32. Conformity of EMC is mandatory in Telkom Indonesia's standard. Therefore EMC conformity is mandatory for products manufactured or imported for deployment in Telkom's operation. The biggest concern is about health issue from radio transmission coming from its radiated interference, hence most part of Telkom's apparatus was used radio frequency. Moreover, EMC testing showed that the products under testing are mostly conforming to EMC standards.

In the modern business environment, process technology evaluation and selection (PTES) is a crucial component of innovation in new product development (NPD). The most difficult task for project managers in PTES is to make the optimal technology choice for a Research and Development (R&D) project, and there are many attendant uncertainties and risks in process technology R&D projects for NPD. Recently, Integrated Circuit (IC) Packaging has become an equal part of the cost-performance equation in the silicon world, and packaging foundries have responded quicker than many other semiconductor companies to the rapidly changing requirements of chip-scale packaging. This facilitates the transfer of new technology from the assemblers to the chip suppliers. This study applies the fuzzy analytic network process (FANP) model to evaluate the strategic impact of new IC manufacturing technologies in firms within Taiwan’s IC packaging industry. Our study will determine the key decision-making factors affecting R&D project selection using FANP, and additionally we develop an optimal manufacturing process. As a case study, the ongoing “Controller IC packaging R&D project A” was chosen to minimize warpage of controller IC.

We investigate extending the upper frequency limit of an asymmetric ldquoCrawford-style'' transverse electromagnetic (TEM) cell with targeted resonance control. Focusing on the fundamental TE cavity resonance, an active feedback cancellation system is applied with the aim of reducing the resonant field amplitude without affecting the desired TEM mode. A half loop J-dot current probe is positioned with a vertical polarization on one wall of the TEM cell to measure the wall currents generated from the TE resonance. An identical probe is placed on the facing wall that is connected to the first through a negative feedback chain. The second loop's purpose is to excite a field that has the appropriate magnitude and phase to attenuate the TE resonance amplitude. Experimental application achieved a 17-dB reduction in the amplitude of the resonance field. The method is also outlined with respect to the TE resonance. This system is planned for full-scale implementation into a hybrid reverberation/TEM whole-aircraft electromagnetic vulnerability testing facility.

: A small parallel-plate transmission line (2-1/2 in. high and 12 in. wide) is used to calibrate ground-plane electric and magnetic field sensors. Because this transmission line is relatively small compared to the size of the sensor being tested, some uncertainties have existed. The acquisition and subsequent use of a transverse electromagnetic (TEM) cell have increased the accuracy of calibrating these electric and magnetic field sensors because the TEM cell has the capability of creating a well-known plane-wave electromagnetic field within the TEM cell. This document reports the newly established calibration procedure to be followed when the TEM is used to calibrate ground- plane-version electric and magnetic field sensors. Also included is a complete description of the field sensors tested and the derivation of the calibration procedure. Keywords: Sensor calibration; Electric field sensor; Magnetic field sensor.

A failure criterion for debonding initiation between molding compounds and copper leadframes in plastic encapsulated integrated circuit (IC) packages is proposed. The leadframe pull-out test is used to evaluate the bond strengths between molding compounds and leadframes in plastic encapsulated IC packages. The normal and shear stress fields along the interface are analyzed using the finite element method. An average stress approach is employed for the interface failure criterion and the tensile and shear interface bond strengths are obtained from the experimental failure loads. In a parametric study, the effects of specimen loading geometry, moisture, and surface contamination of copper leadframes on the interfacial bond strengths are specifically analyzed. The results show that the interface bond strengths determined for the two specimen geometries are consistent.