Experimental Demonstration of Electromagnetic Information Leakage From Modern Processor-Memory Systems

The threat of electromagnetic (EM) information leakage induced by intentional electromagnetic interference (IEMI) for single-ended signals has been reported. The intensity of the leaked EM waves can be controlled by the intensity of the induced disturbance waves. If the EM information leakage method can be applied to other signaling schemes, more devices would be threatened. As a result, countermeasures need to be taken. This study shows that the threat of EM information leakage induced by IEMI exists in other signaling schemes, using universal serial bus (USB) 2.0 devices, one of the differential signaling standards. Specifically, using a USB keyboard as an evaluation target, we demonstrate that the output impedance of the IC changes according to its output states, causing fluctuations in the amplitude of the reflected waves. As a result, we confirm that the differential signal is leaked by demodulating the amplitude of the reflected waves.

The problem of information security is increasingly prominent with the ongoing development of information technology.Electromagnetic (EM) information leakage is a great hidden danger to information security, and research on the topic has great significance.In this paper, the principle of power line (PL) EM information leakage in computers is studied.PL conduction and radiation leakage models are built.Experimental analysis is implemented to further prove the potential harmfulness to security of EM information leakage from PL.

Electromagnetic information leak as a potential data security risk is more and more serious. Discussing the relationship between compromising emanations and Hamming distance is directed to preventing or reducing the electromagnetic information leakage. The paper presents the model of electromagnetic information leak, then the hierarchical protection strategy based on the model is proposed, that is anti-radiation, anti-intercept and anti-reconstruction. Analyzing the causes of electromagnetic information leak through the touch screen case, the paper describes the electromagnetic radiation intensity is correlated to the transition's Hamming distance. The paper presents the anti-intercept method, which is reducing the Hamming distance of the sensitive data or keep Hamming distance constant in order to reducing or preventing the electromagnetic information leakage. The anti-intercept method is available showed as the touch screen case. DOI : http://dx.doi.org/10.11591/telkomnika.v12i1.3966

The unintentional electromagnetic (EM) radiation from electronic information equipment will cause the leakage of information. EM information leakage identification is an important research area of EM information security. Previous studies only focused on a particular type of information leakage, ignoring that there are multiple types of information contained in the leaked EM signal. This paper presents a multi-dimensional information leakage model for the first time, which reveals the multiple information leakage risks in an unintentional EM radiation. The EM information leakage of computer monitors is taken as an example to verify the model. Furthermore, a Convolutional Neural Network (CNN) based multi-dimensional information identification method is proposed. This novel method designed a unified neural network architecture to identify multiple information leaked by the same EM radiation from the monitor. It overcomes the limitation of available identification methods that need to definite leakage characteristics for each type of information leakage. The effectiveness of the method is validated by contrast experiments.

In today's rapidly evolving technological landscape, information visualization devices (IVDs) play a crucial role amidst an overwhelming flood of information. However, ensuring the electromagnetic (EM) reliability of these devices, especially regarding EM information leakage, is increasingly challenging due to the continuous development of infiltration techniques. While the recently developed DisplayPort protocol provides a relatively robust environment for externally used cables with its complex encoding and scrambling method, internally used protocols like FPD-link remain outdated, relying solely on spread spectrum clocking (SSC) technology. Given the ongoing technological advancements described, conventional countermeasures, such as SSC, once groundbreaking, are now vulnerable to infiltration. If exploited for malicious purposes without public disclosure, this could have severe consequences for anyone living in today's information society. Therefore, aiming to contribute to the existing knowledge base, this article seeks to address an issue arising when applying conventional signal reconstruction techniques, originally designed for EM leakage from devices employing constant clocking, to those utilizing SSC. In addition, it proposes a fundamental concept named periodic nonuniform sampling to mitigate the countermeasure effect given by the SSC. Ultimately, this article aims to raise awareness within the academic community regarding the potential for EM penetration and to facilitate proactive measures to address such occurrences.

There have been reports of threats that cause electromagnetic information leakage by inserting Hardware Trojans (HT) into the signal traces around components on the printed circuit board (PCB). In this threat, the HT insertion is assumed not only at the manufacturing stage but also during the in-transit or in the field after shipment, and the threat may extend to devices that are not considered to be threatened by HT insertion implemented inside conventional ICs. This paper discusses the detection method for the HT insertion, which is implementable on a PCB without external measurement equipment. Additionally, we validate the method in more practical situations, detecting the HT on populated PCBs. The method employs an on-chip touch sensor to measure the changes in electrical characteristics caused by HT insertion. Specifically, HT insertion is detected by observing the change in capacitance and insulation resistance associated with HT insertion using the on-chip sensor, and detecting the difference from the measurement result when HT is not inserted to signal traces. In the experiment, we build an evaluation environment, which emulates a populated PCB, based on the HT insertion method reported in previous studies and observe the change in capacitance and insulation resistance on the connected signal trace using a microprocessor equipped with a constant current source and an analog-digital converter that constitute the on-chip sensor. Then, we show that HT insertion on the signal trace can be detected from the output values of the on-chip sensor before and after HT insertion.

With the prevalence of the Internet of Things (IoT) and microcontrollers (MCUs), the security issues of IoT and MCUs have become increasingly important. Side-channel analysis (SCA) is a major threat to such problems. One of the non-invasive SCAs is through electromagnetic information leakage (EM-leak) analysis. The author has developed a machine-instruction-level EM-leak analysis by neural network (NN) model. The NN model analysis need a large dataset for training and validation. And the dataset should be complete and sufficient. The dataset sufficiency can be achieved by acquiring more data from the already proposed EM-leak measurement platform. However, the completeness issue becomes a challenge due to the pipelined architecture in the target MCU. In this paper, the completeness issue of a NN model dataset for the EM-leak analysis is addressed. The issue is to be solved in several steps. First, it is simplified to a two-stage pipelined MCU individual EM-leak analysis sequence problem (2-EMAseq). The problem is then proved that at least one optimal solution exists. And an algorithm is proposed based on the proof to find an optimal solution (a complete EM-leak NN dataset). Experiments show that the proposed algorithm can find an optimal solution. The contributions of this paper include: it successfully reduces a real problem to a 2-EMAseq description, proves that the 2-EMAseq problem has at least one optimal solution, uses this proof to develop an algorithm, and uses this algorithm to find a complete dataset is the target two-stage pipelined MCU dataset for NN model training/validation. Currently, the algorithm can only generate the optimal EM-dataset for two-stage pipelined MCUs. However, there are many MCUs with 4~8 pipeline stages. Whether there is an optimal solution when the stages are more than two is still an open question. And it needs to find proofs or derive heuristics in the future for such MCUs.

Electromagnetic Information Leakage from Cryptographic Hardware with Attached Lines

In this paper, an analysis of filtering window impacts on estimation accuracy of electromagnetic (EM) information leakage from exposed areas in power delivery network (PDN) of cryptographic devices is presented. There are exposed areas in the PDN such as decoupling capacitors, through via plating, and small power/ground interconnections where full-byte secret key information can be leaked in the form of EM fields. Various waveforms are measured using EM field probes on the PDN of the target cryptographic device. Correlation electromagnetic analysis (CEMA), field distribution analysis, and secret key extraction are conducted based on the measured waveforms via EM field radiation from the exposed PDN. It is verified that adopting a proper filtering window to remove impacts of noise irrelevant to secret key processing is important for an accurate and efficient estimation of the information leakage from the PDN. Based on the experiment and analysis results, an efficient leakage location detection method using the filtered waveforms is discussed.

Multicore microarchitecture designs have become ubiquitous in today's computing environment enabling multiple processes to execute simultaneously on a single chip. With these new parallel processing capabilities comes a need to better understand how co-running applications impact and interfere with each other. The ability to characterize and better understand cross-core performance interference can prove critical for a number of application domains, such as performance debugging, compiler optimization, and application co-scheduling to name a few. We proposed a novel methodology for the characterization and profiling of cross-core interference on current multicore systems, which we call contention synthesis. Our profiling approach characterizes an applications cross-core interference sensitivity by manufacturing contention with the application and observing the impact of this synthesized contention on the application.Understanding how to synthesize contention on current chip microarchitectures is unclear as there are a number of potentially contentious data access behaviors. This is further complicated by the fact that current chip microprocessors are engineered and tuned to circumvent the contentious nature of certain data access behaviors. In this work we explore and evaluate five designs for a contention synthesis mechanism. We also investigate how these five contention synthesis engines impact the performance of 19 of the SPEC2006 benchmarks on two state of the art chip multiprocessors, namely Intel's Core i7 and AMD's Phenom X4 architectures. Finally we demonstrate how contention synthesis can be used to accurately characterize an application's cross-core interference sensitivity.

In the competitive CPU market, emphasis is placed on automations that promotes innovation and supports design of multiple CPU configuration which meets schedule and timely turnaround to market. Design automation is essential in the design of different areas of CPU including the global clock distributions. This paper talks about design automation tools developed to handle the design of the global clock distributions for various Intel microprocessors.

This article explores the evolution and effectiveness of formal verification enhanced with Assertion-Based Verification (ABV) as a superior alternative to traditional Universal Verification Methodology (UVM) in complex computing chip design. Through analysis of implementation data from major semiconductor companies, including Intel's Core i7 and IBM's POWER processors, the article demonstrates how formal methods achieve up to 100% coverage of critical modules compared to UVM's typical 80-85% coverage. The research presents quantitative evidence of formal verification's advantages, including a 25-30% reduction in verification cycles, a 40% increase in security vulnerability detection, and a 55% reduction in overall verification time through advanced techniques such as compositional verification and proof decomposition. The article also addresses scalability challenges and resource optimization strategies, providing a comprehensive framework for implementing formal verification in modern chip design workflows.

There are very complex circuits and various clock signals in a computer. Every component can radiate electromagnetic waves when it works. Some of these radiations may result in computer information leakage. The technology for recognising information leakage caused by video signal electromagnetic radiation is presented, and the primary word image is obtained. So as to get intact useful information from the video signal concealed in the electromagnetic leakage, a pattern recognition method based on an artificial neural network is proposed. Lastly, the primary word image, recovered from the electromagnetic leakage, is recognized and reconstructed. The recognizability of the information leakage from a computer is discussed.

The article analyzes the CMOS logical gate's electric current characteristic under the active status, establishes the electromagnetic information leakage hamming distance model in registers level. Aimed at the data encryption standard (DES) cryptographic system realized by the P89C668 microcomputer, Correlation Electromagnetic Analysis (CEMA) algorithm was described, the choosing of attack point D and the computational method were analyzed, an attack experiment was processed by CEMA, thereby obtaining 48-bits sub-key of the 16th round of DES. The result shows that EM information leakage exists in CMOS integrated circuit during work, XOR operation in each round of DES is an attack point. It can provide a basis for implementing protective measures in the cryptographic systems.

Electromagnetic emanations from IT device may leak information they process. By analyzing the characteristics of electromagnetic emanations, eavesdropper could reconstruct critical information. Particularly information displayed on monitor faces a serious security risk. Although various electromagnetic information leakage countermeasures have been proposed try to solve the information security problems, their effectiveness evaluations are mostly subjective. The comparison of their efficiency and the evaluation of information reconstruction implementations are challenging issues, no reliable quantitative metric available. From the information theory point of view, this paper presents an evaluation model for assessing monitor information reconstruction through electromagnetic emanations. By a reconstruction experiment, the amount of information leakage and information reconstruction is implemented and analyzed. DOI : http://dx.doi.org/10.11591/telkomnika.v12i3.4467