Functional testing philosophies using neural networks

This paper discusses a practical approach to the use of Commercial-Off-the-Shelf (COTS) tools to implement Automatic Test Equipment (ATE) and Unit Under Test (UUT) signal-based models to support both new Test Program Set (TPS) development and TPS rehost activities. This modeling technique also provides a standard to which existing and future ATEs and UUTs can be modeled and used for analysis and comparisons. The signal-based model is implemented via a Structured Query Language (SQL) Relational Data Base Management System (RDBMS). COTS Rapid Application Development (RAD) tools, such as Microsoft/sup (R)/ Visual Basic/sup (R)/ Microsoft Access/sup (R)/ and PowerBuilder/sup (R)/, are employed to implement interfaces to the SQL database model and to provide the necessary algorithms for data comparison, model reuse and other manipulations of the model data. After models are established for both the ATE and UUTs, ATU/UUT compatibility analysis can be performed to identify any potential incompatibilities. This information can be used to optimize the selection of a target ATE for a selected group of UUTs. It can also be used to identify any signal deficiencies in the target ATE that require ATE enhancements or Interface Test Adapter (ITA) signal conditioning, to ensure UUT compatibility.

The purpose of this paper is to present a conceptual approach and to make practical recommendations on how to improve the current Automatic Test Equipment (ATE) testing and maintenance capabilities by utilizing the existing cloud computing model to build a globally linked ATE maintenance system. The basic tenet of the ATE community is to support a multi-tiered maintenance concept which, in general, is a three tiered system that is composed of organizational maintenance (O-level), intermediate maintenance (I-level), and depot maintenance (D-level) organizations. The goal of the ATE is to (1) quickly and accurately detect and isolate each fault, (2) provide software tools for analyzing historical data, and (3) gather, manage, and distribute accurate and reliable maintenance information for the failed Unit Under Test (UUT). The ATE system should provide services that will (1) maintain a repository of information that will improve fault detection and isolation, allow for off-platform assessments, document failures, and help quantify corrective actions, (2) reduce false UUT pulls, and (3) reduce repair time by prompting repair procedures. Furthermore, the ATE system should provide additional services that will help optimize the time to diagnose problems by using collected failure information and by recommending entry points into the Test Program Set (TPS) software. It should also present information to the ATE maintainer to aid in informed repair decisions which could be in the form of pilot debrief results, platform Built In Test (BIT) results, O-level test outcomes and corrective actions, and maintenance and usage history of the platform and UUT. So, based on this definition of ATE maintenance the use of cloud computing can be used to provide services to improve the overall ATE testing throughput which will result in bottom line improvements to ATE life cycle costs. By using cloud computing, which is defined to be “a model for enabling ubiquitous, convenient, on-demand network access to a shared pool of configurable computing resources (e.g., networks, servers, storage, applications, and services) that can be rapidly provisioned and released with minimal management effort or service provider interaction”, users can develop cloud computing models that will provide access to application software and databases that can be used to build a globally linked ATE maintenance system. This paper will discuss the essential characteristics of the cloud computing models and define the various flavors of cloud offerings available to designers today. This paper will also analyze the cloud computing model to arrive at a conceptual approach that can be used to enhance the current ATE Testing and Maintenance capabilities. Practical recommendations will be discussed on how to transform the current ATE Testing and Maintenance capabilities into the specific cloud computing model offerings in order to help configure a globally linked ATE maintenance system.

The portable intelligent troubleshooter (POINTER) system, originally developed for manual fault isolation, has been applied to intelligent automatic testing, which requires a fresh look at test program set (TPS) design from the perspective of testability theory and artificial intelligence. The resulting novel automatic test and diagnostic approach is a significant departure from conventional test programming techniques. A prototype automatic test equipment (ATE) system that implements a diagnostic control algorithm that computes a context-sensitive test strategy in real time has been developed. This control algorithm operates on a dependency model that describes the testability characteristics of the unit under test (UUT) and a test procedures file that contains the instrumentation setup for each test available for the UUT. This approach to automated diagnostics reduces time and costs in UUT repair. >

In complex systems, testing each interface of a system separately is not a coherent way of testing and it reduces test quality. Especially in design verification tests, increasing test quality can be achieved by testing system level reactions and responses of all interfaces together simultaneously considering the system as a whole. In this study, a test system created for design verification tests of four different units through Hardware-in-theloop (HIL) simulation is to be explained. Design verification tests covering whole interfaces of Unit Under Test (UUT) are demonstrated with also simulations of units to be connected to UUT. The overall test system is divided into two main parts as automatic test equipment (ATE) design and HIL simulation design. The design process of ATE includes test requirements, specifications and identifications of all interfaces which belong to interconnected units in the system. The hardware selections and connections between them are accomplished for four different UUTs in such a manner that they can be tested together or separately. In the design process of HIL simulation, each sub-system connected to UUTs and UUTs themselves are considered separately. The requirements for each sub-system and each UUT are met within the interface control documents. In order to increase the quality of test, communications and the control of the electrical interfaces between each sub-system are implemented in real time. The communication interfaces consist of RS422, RS485, MILSTD-1553, Telnet and CANopen. The reactions and responses of each UUT are collected and HIL simulation is improved. Finally, the discussions about the approach of design verification tests of four different UUTs within HIL simulation and the improvement of the test quality are revealed. Further in this study, the test approach used by DEICO for HIL is discussed in detail.

The purpose of this paper is to present a framework from which Automated Test Equipment (ATE) manufacturers can use to help them develop, integrate, and deliver ATE cloud-based applications to the consumers of their products. In order to create these applications, the developer can utilize Commercial Web Services (CWS) as a means to help access compute power, storage devices, and other services that provide the flexibility to choose a development platform or programming model that makes the most sense in trying to resolve the problem at hand. CWS provides a flexible environment from which to choose various programming models, operating systems, databases, and architectures to serve the consumers needs. CWS is highly cost-effective in that the developers and consumers pay only for what they use. Using CWS makes it extremely easy to create scalable and elastic systems as the developers can quickly add and subtract resources to their applications in order to meet current or future consumer needs. Furthermore, security is always a concern so CWS builds services in accordance with security best practices by providing the appropriate security features in those services. Using a CWS provides a level of scale, security, reliability, and privacy that are often cost prohibitive for most organizations to meet. This paper will examine available CWS cloud service platforms that organizations can potentially use to help deploy applications and services in a cost effective manner. The CWS platform consists of the following six main services, which will be discussed in more detail in this paper - (1) Computational/Networking, (2) Storage/Content Delivery, (3) Databases, (4) Analytics, (5) Applications, and (6) Deployment and Management services. One or more of these services may be utilized to help develop, integrate, and deliver ATE cloud-based applications to the consumer. The goals of ATE are to (1) quickly and accurately detect and isolate each fault, (2) provide software tools for analyzing historical data, (3) gather, manage, and distribute accurate and reliable maintenance information for the failed Unit Under Test (UUT). The CWS cloud platform will aid in the development of cloud based tools and applications that are cost effective, flexible, scalable, and secure that can be used by multiple end users to aid in the development of ATE system software tool sets. One example of a cloud-based application is a diagnostic reasoner that could be used to aid in diagnosing UUT repair actions. This paper will show how developers can use CWS to develop ATE cloud-based applications and tools that will help improve the overall ATE testing throughput, thus resulting in bottom line improvements to ATE life cycle costs.

FPGA Controlled Interface Boards (FCIB) are widely used in electronic systems in order to meet the control, communication and I/O requirements. These boards employ FPGAs to control multiple signal input/output blocks, communication interfaces (RS232/422, CAN, ETH, PCIe etc.), ADC/DAC circuits, and other general purpose circuits. Production tests of FCIBs are vital since a single fault in the Unit Under Test (UUT) may cause serious consequences (engineering, rework, time, money costs) at higher levels of integration. Test requirements of UUT are specified as the first step of the test design process to define the test coverage. As the second step, test is designed at high level by specifying the building blocks of the test program set (TPS). In this step, hardware and software components are designed and implemented. Finally, TPS is verified after integrating all components. These three steps can be concluded briefly as Test Program Set requirements, design and implementation, verification. In addition to these test development steps, test design process should be carried based on the general automated test development considerations. These principles can be grouped in five subjects. Firstly, all the test steps in the testing procedure should be repeatable. Secondly, since these tests will be used in mass production, the test duration should be as short as possible while verifying all interfaces precisely and reliably. Thirdly, tests should require minimum amount of operator interaction. It should be fully automated-if possible- to reduce the test duration and errors due to operator interaction. Fourthly, test steps should not only catch the errors but also localize them to a circuit block on the board. This helps to repair the faulty parts quickly in production. Finally, all tests should be done with minimum amount of test equipment. After defining the UUT specifications and TPS requirements, there are two methods that could be applied in the test design process of the FCIB. The first one is to control all interfaces with embedded test code running on FPGA of UUT and using interface specific test devices to verify the circuit block. In order to test the interfaces of the FCIB, the test devices should be able to manage the signals in two directions, from FCIB and to FCIB. The test flow is controlled from external world through a UUT interface-generally UART. To make the test faster and minimize the operator interaction, a high-level test software is designed in LabVIEW or a similar environment to automatize the test procedure. The second method is using another verified FCIB, namely a Golden Board, which helps to communicate through all interfaces of the UUT and verify it functionally. In this method, test designer should define the hardware interface between the boards, and construct a test procedure accordingly. Next, embedded code for the FPGAs on the Golden Board and UUT should be developed in order to simulate the functionality of the UUT. The synchronization and handshaking of two FPGA codes also becomes important to manage test flow. A high-level test software may also be developed in LabVIEW or a similar environment depending on the test design. Both of two methods have their own advantages and disadvantages. In this paper, the two methods of designing an automated test for FPGA Controlled Interface Boards will be discussed. They will be compared according to their workload of development, capability of locating errors, test duration and efficiency of the testing (coverage, probability of error occurrence).

It is the mandate of Automated Test Equipment (ATE) to minimize manual tasking and maximize automation. However, the role of the operator remains crucial to successful deployment of any ATE system. Simple tasks such as setting up the Unit Under Test (UUT), correct probing, potentiometer alignments, etc. must be taught so new operators can establish a basic level of diagnostic capability in the fleet. Current Consolidated Automated Support System (CASS) training hardware is based on F-14 and S-3 platforms which are obsolete, utilize antiquated technology, and are difficult to repair. Such hardware also limits Instructors' ability to insert and remove effective training faults. This paper describes a design concept which provides a robust training test set, including hardware, for operators to learn basic troubleshooting skills and ATE interaction. The US Navy recognized the benefits of such a system to address training deficiencies and initiated the development and acquisition of the CASS Training Set (CATS). The test set includes a variety of training scenarios which are commonly seen in the fleet, including digital tests, analog tests, Operational Flight Program (OFP) loads, alignments, Radio Frequency (RF) tests, diagnostics, etc. The CATS training UUT uses latching relays to induce consistent, repeatable hardware faults, and a microcontroller to produce software faults. Faults are applied and removed through the Test Program Set (TPS) and require no soldering or de-soldering of components. This process automates training fault insertion, extends the life of the training equipment, and provides repeatable fault signatures. Consistent training scenarios ensure lower variance in technical capabilities of course graduates. A complete hardware and software package with the look-and-feel of a fleet avionics asset, but the reliability to withstand a training environment provides a valuable tool to train ATE operators and should be a basic part of any ATE system.

When creating a test platform, the primary focus is often on the selection of test and measurement instrumentation or the test programming environment. Although it is important to ensure that the selected instrumentation can provide the proper stimulus and measurement capabilities, it is also important to consider how you are going to cable and interface the test platform to the Unit Under Test (UUT). High accuracy measurement devices can be undone by a poorly performing interface. Here are some examples; • UUTs incorporating wireless communication will need a test platform to measure high frequency and low power signals. Selecting the wrong cable or not accounting for insertion loss on connectors can severely impact the accuracy of testing. • Measurement devices which are used to test a wide number of products can degrade their instrument's connectors from frequent changing of the test interface or cabling. This can be mitigated by using external test interfaces. In these applications it is important to consider the lifetime of the interconnect used and how easily it can be repaired on-site. Apart from manual bench top testing, automated test applications will involve some signal management, or switching. This adds a whole layer of potential factors that could limit the performance of any test solution if all factors are not taken into account. In all but the simplest test scenarios, test resources will need to be shared between multiple UUT points requiring some kind of switching system and interfacing. This interfacing between test instrumentation, switching system and the UUT could involve connector to connector and connector to UUT wiring. Also, there may be a test fixture interface that is either manually or automatically operated. This requires careful consideration as the cumulative effect of all these factors may significantly degrade the ability to test the UUT to the desired specifications. Another factor to consider is that the testing application may involve adverse environmental conditions. This paper will discuss aspects of test interfacing. While we cannot cover all possible methods in this short paper, we will look at considerations for selecting a test fixture interface, cables and connectors, mass interconnect and RF/Microwave applications. Please note that while we are using some Pickering products as examples, these recommendations apply to any test vendor or platform.

Consumer electronic manufacturing (CEM) companies face a constant challenge to maintain quality standards during frequent product launches. A manufacturing test verifies product functionality and identifies manufacturing defects. Failure to complete testing can even result in product recalls. In this research, a universal automated testing system has been proposed for CEM companies to streamline their test process in reduced test cost and time. A universal hardware interface is designed for connecting commercial off-the-shelf (COTS) test equipment and unit under test (UUT). A software application, based on machine learning, is developed in LabVIEW. The test site data for around 100 test sites have been collected. The application automatically selects COTS test equipment drivers and interfaces on UUT and test measurements for test sites through a universal hardware interface. Further, it collects real-time test measurement data, performs analysis, generates reports and key performance indicators (KPIs), and provides recommendations using machine learning. It also maintains a database for historical data to improve manufacturing processes. The proposed system can be deployed standalone as well as a replacement for the test department module of enterprise resource planning (ERP) systems providing direct access to test site hardware. Finally, the system is validated through an experimental setup in a CEM company.

This paper describes research related to the development of fast compression end playback routines for full screen, full motion color video and audio suitable for use on the IFTE Soldier Portable On-line Repair Tool (SPORT). This multimedia capability can be included as part of an interactive electronic technical manual (IETM). or incorporated into automatic test equipment (ATE) executive end test program set (TPS) application software. The technical innovations required to achieve the requisite high compression ratio while still preserving good image quality needed for use in ATE applications is described. The benefits or this capability for use in maintenance training, unit under test (UTT) setup and connection. And diagnostic procedures will also be discussed. In addition, we will describe methods that can be used to distribute and update multimedia sequences in deployed systems.

This research project aims to expand the capability of current US Navy Automated Test Equipment (ATE) family of testers known as the Consolidated Automated Support System (CASS). Industry research is now focused on breaking the historical construct of test equipment. Advances in the field of Synthetic Instruments have opened the door to test avionics in new ways. Every year new capabilities are developed using core hardware and increasingly capable software modules to create complex waveforms. This research creates a Digital Radio Frequency Memory (DRFM) Synthetic Instrument that can be programmed to perform a wide array of low latency Radio Frequency (RF) tests. Synthetic Instruments are defined as a concatenation of hardware and software modules used in combination to emulate a traditional piece of electronic instrumentation. This Synthetic Instrument couples high speed Analog-to-Digital Converters (ADC) to high speed Digital-to-Analog Converters (DAC) with Field Programmable Gate Arrays (FPGA) in between for digital signal processing. An RF front end is used to down convert the RF to baseband where it is sampled, modified, and up converted back to RF. The FPGA performs Digital Signal Processing (DSP) on the signal to achieve the desired output. Application of this DRFM in automated testing is demonstrated using a Reconfigurable Transportable Consolidated Automated Support System (RTCASS) tester at Naval Air Systems Command (NAVAIR) Jacksonville, FL. The Unit Under Test (UUT) is an ALQ-162 Defensive Electronic Countermeasures (DECM) receiver-transmitter. Ultra-low latency signals are generated to simulate enemy jamming stimulus. As the ALQ-162 detects and responds to the input, the DRFM switches to a new frequency. The time taken by the ALQ-162 to acquire, respond, and re-acquire is measured. This test confirms the internal Yttrium Iron Garnet (YIG) oscillator meets slew specifications. Currently Navy ATE can only test RF units using high latency steady state tests. This research project developed a supplemental unit that can be added to the VXI chassis in the CASS family of testers and conduct ultra-low latency active tests. The instrument acts as hardware-in-the-loop to perform real-time tests including a new capability to measure jamming response time from DECM avionics. Demonstrated performance capabilities include: latency <; 100 ns, output Spurious-Free Dynamic Range (SFDR) > 80 dBc, input SFDR > 60 dBc, frequency tuning resolution <; 2 Hz, and frequency settling time <; 0.5 ns. New RF capabilities developed by this effort parallel similar research ongoing for digital test instruments like the Teradyne High Speed Subsystem. Incorporating this Digital RF Memory synthetic instrument into current and future ATE will improve readiness and supportability of the fleet. Improvements demonstrated by this research project will expand the type and quantity of assets able to be tested by current and future ATE.

We present an embedded boundary-scan test vector management solution that ensures the correct version of test vectors is applied to the unit under test (UUT). This new vector management approach leverages the system-level boundary-scan multi-drop architecture employed in some high availability electronic systems. Compared to previous methods that do not use system-level boundary-scan resources for vector management, this new approach ensures that the correct boundary-scan vectors are retrieved from the UUT without affecting its operation and requires minimal UUT functionality to execute. The performance and effectiveness of this technique is shown using an actual design example that has been realized in a new product

For modern Automatic Test Equipment (ATE) one of the most daunting tasks is now Information Assurance (IA). What was once at most a secondary item consisting mainly of installing an Anti-Virus suite is now becoming one of the most important aspects of ATE. Given the current climate of IA it has become important to ensure ATE is kept safe from any breaches of security or loss of information. Even though most ATE are not on the Internet (or even on a network for many) they are still vulnerable to some of the same attack vectors plaguing common computers and other electronic devices. This paper will discuss some of the processes and procedures which must be used to ensure that modern ATE can continue to be used to test and detect faults in the systems they are designed to test. The common items that must be considered for ATE are as follows: The ATE system must have some form of Anti-Virus (as should all computers). The ATE system should have a minimum software footprint only providing the software needed to perform the task. The ATE system should be verified to have all the Operating System (OS) settings configured pursuant to the task it is intended to perform. The ATE OS settings should include password and password expiration settings to prevent access by anyone not expected to be on the system. The ATE system software should be written and constructed such that it in itself is not readily open to attack. The ATE system should be designed in a manner such that none of the instruments in the system can easily be attacked. The ATE system should insure any paths to the outside world (such as Ethernet or USB devices) are limited to only those required to perform the task it was designed for. These and many other common configuration concerns will be discussed in the paper.

AI-TEST is an expert system for functional fault detection and isolation in electronic equipment. Its main features include probabilistic diagnostic assessment and effective management of the testing process, including goal-oriented test evaluation and selection. Together with detailed documentation of the unit under test (UUT), AI-TEST essentially provides an intelligent electronic service manual that guides the user through the diagnostic process. Preliminary experience with AI-TEST for troubleshooting a dot-matrix printer is reported. Implementation issues are also discussed. >

In this paper, a combined RBF neural network sliding mode control and PD adaptive tracking controller is proposed for controlling the directional heading course of a ship. Due to the high nonlinearity and uncertainty of the ship dynamics as well as the effect of wave disturbances a performance evaluation and ship controller design is stay difficult task. The Neural network used for adaptively learn the uncertain dynamics bounds of the ship and their output used as part of the control law moreover the PD term is used to reduce the effect of the approximation error inherited in the RBF networks. The stability of the system with the combined control law guaranteed through Lyapunov analysis. Numeric simulation results confirm the proposed controller provide good system stability and convergence.