Graph-based models for real-time workload: a survey

Inter-core communication is a central challenge in many-core systems for which Network-on-chips (NoCs) have been demonstrated to scale well and to provide good overall performance. However, not only the distributed structure but also the link switching of NoCs have imposed a great challenge in the design and analysis for real-time systems where timing verification is mandatory. NoC protocols like worm-hole switching are designed with scalability and flexibility in mind, thus the existing link switching protocols usually consider each single link to be scheduled independently. The flexibility of such link-based arbitrations allows each packet to be distributed over multiple switches but also increases the number of possible link states (the number of flits in a buffer) that have to be considered in the worst-case timing analysis for real-time systems. To achieve timing predictability by design, we propose a family of less flexible switching protocols, called Simultaneous Progressing Switching Protocols (SP2), in which the links used by a flow either all simultaneously transmit one flit (if it exists) of this flow or none of them transmits any flit of this flow. Based on the all-or-nothing property of Sp2, we reduce the schedulability of the NoC to the uniprocessor self-suspension scheduling problem. Moreover, the proposed approach is not limited to any specific underlying routing protocols, which are usually constructed for deadlock avoidance instead of timing predictability.

Recently, significant progress has been made in the development of timed process algebras for the specification and analysis of real-time systems. This paper describes a timed process algebra called ACSR, which supports synchronous timed actions and asynchronous instantaneous events. Timed actions are used to represent the usage of resources and to model the passage of time. Events are used to capture synchronization between processes. To be able to specify real systems accurately, ACSR supports a notion of priority that can be used to arbitrate among timed actions competing for the use of resources and among events that are ready for synchronization. The paper also includes a brief overview of other timed process algebras and discusses similarities and differences between them and ACSR.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

: This report summarizes a survey of published research in real time systems. Material is presented that provides an overview of the topic, focusing on communications protocols and scheduling techniques. It is noted that real-time systems deserve special attention separate from other areas because of the unique properties. This has not been the case in computer science and operations research until quite recently, resulting in the absence of formal tools for design and analysis of real-time systems. The early work on applications as well as notable theoretical advances are summarized. Descriptions of more recent work in the field from the mid-1980s to the present are also provided.

The paper introduces an integrated framework for the scheduling of non-deterministic workloads, demanded on time-critical recovery operations triggered by the detection of errors in a real time system. The framework will be developed within the context of fixed priority preemptive systems. A dynamic analysis for recovery workloads is introduced by developing a criterion for responsiveness of fault recovery operations. This is motivated by the need to verify the timing correctness of real time workloads under transient recovery workloads and provide graceful degradation to the real time workload during recovery. We hypothesize that a scheduler suited to this environment should dispatch tasks using only response time and slack as an admission control mechanism for recovery requests, as long as all deadlines can be met, and that in the presence of transient recovery overloads, the best the scheduler can do is criticality-driven load shedding. By temporarily eliminating less important tasks, the responsive algorithm developed is expected to service the more important tasks without harming less critical tasks unnecessarily. The performance of the responsive algorithm is measured quantitatively with simulations using synthetic task sets.

In competitive sports, the most direct and effective way to improve athletes’ competitive level is to strengthen training. At present, the training mode is still mainly based on coaches’ experience and athletes’ physical conditions, and lacks scientific and effective data information as the basis for planning. In this paper, the software is developed in the core construction of recessed Linux, the VIX bus technology is take advantage of gather sports data, and the data mining technology based on collective information characteristic extraction is designed. This paper uses big data mining method to mine the information of sports evaluation, pick up the autocorrelation characteristics of data information flow of sports training real-time data analysis system, constructs the association rule feature set combined with the prior knowledge of sports evaluation, and realizes the database construction of sports training real-time data analysis system by using the association rule feature extraction and big data information fusion processing technology. The simulation results show that the accuracy of sports assess decision-making information mining using the real-time data analysis system of sports training is high, and the dependability of the system is satisfied.

Hilbert remarked in the introductory part of his most famous finitism address (1925 [1]) that “[t]he infinite divisibility of a continuum is an operation that is present only in our thought”, which means that no natural event or matter is infinitely divisible in reality. We recall that Scedrov’s group including the author started logical analysis of real time systems with the principle similar to Hilbert’s no-infinite divisibility claim, in [2]. The author would like to note some early history of the group’s work on logical analysis of real time system as well as some remark related to Hilbert’s claim of no-infinite divisibility.

In many complex embedded systems, real-time workload is generated conforming certain structural constraints. In this paper we study how to analyze the delay of real-time workloads of which the generation pattern can be modeled by task graph models. We first show that directly combining path abstraction technique (PAT) in real-time scheduling theory and real-time calculus (RTC) can provide safe delay bounds, but the results are typically over-pessimistic. Then we propose new algorithms to efficiently and precisely solve the delay analysis problem. Experiments with randomly generated task systems are conducted to evaluate the performance of the proposed methods.

A scheduling approach is given for servicing the nondeterministic workload demands of time-critical recovery operations triggered by the detection of errors in periodic real-time workloads. This approach, referred to as the transient server, has been developed within the context of fixed-priority preemptive systems. For these systems, it is proved that deadline monotonic scheduling is optimal in maximizing the service opportunities for recovery requests. A scheduling-theoretic framework for integrating time-invariant deadline- and criticalness-based priorities is developed, motivated by the need to guarantee that the real-time workload experiences a graceful degradation during recovery.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Recent research in real-time divisible load theory (RT-DLT) has addressed the problem of distributing arbitrarily parallelizable real-time workloads among processors which become available at different instants. In prior work [1], we proposed a Linear Programming based formulation of the problem of computing the completion time of a real-time workload on a given collection of processors. In this paper, we show via extensive experimental evaluation that this LP based formulation significantly improves on the heuristic approximations [8,9] that were the only techniques previously known for solving these problems.

This document is intended to contribute to the area of validation and verification of communicating real time systems, with emphasis put on parametric reachability analysis of systems modeled using timed automata.Reachability analysis is a crucial aspect of validation and verification of software and hardware systems. The reachability analysis for real time systems is area that is studied by many researchers in academic and industrial communities. However, not much work has been done for systems, where time constraints are expressed using parameters. This is serious disproportion with real world, where specifications of most of the communication protocols or embedded software and hardware systems are indeed parameterized.This thesis presents a complete framework for forward and backward parametric reachability analysis. The solution presented here can be used as a base of algorithms for validation and verification of software and hardware real-time systems, modeled as timed automata with parameters. The results of the thesis can be easily applied to model checking or test generation tools and algorithms.The core idea of the thesis is a concept of Extended Difference Bound Matrix (EDBM). This is a data structure that stores relations between all system"s clocks and parameters. In contrast to Parametric DBM, that is the state-of-the-art data structure for parametric analysis, EDBM does not require storing constraints on clocks and constraints on parameters separately. This leads to significant benefits regarding memory consumption and time necessary to perform basic operations for symbolic analysis.The maturity of the solution was proven by implementation of a proof-of-concept tool and by experiments performed with modern communication protocol. The results show that even complex systems can be efficiently handled by the framework.

A FPGA-based two-channel low frequency signal generator and analysis system has been designed to analyze the occurrence and analysis of low frequency signal. It uses FPGA for low frequency signal producing control chip module and analysis module. Control signal is sent to the FPGA by keys, FPGA generates frequency range step adjustable low frequency signal. Through the adder, fast Fourier transform is used to extract frequency domain signal by analysis module FPGA, the oscilloscope measures frequency amplitude and other information, to achieve low frequency signal frequency domain analysis capabilities. The system whose encapsulation is compact has friendly interface and it is very easy to operate and demonstrate.

We propose a new comprehensive solution to global interconnect optimization. Traditional buffering algorithms mostly insert repeaters on a net-by-net basis based on slacks and possibly guided by global wires. We show how to integrate routing congestion, placement congestion, global timing constraints, power consumption, and additional constraints into a single resource sharing formulation. The core of our algorithm is a new buffered routing subroutine. Given a net and Lagrangean resource prices for routing, timing, placement, and power, it computes a buffered global route. The resource sharing framework provides a special multiplicative price update for fast convergence. Our algorithm is fast enough for practical instances. We demonstrate experimentally on 7nm microprocessor units that it significantly improves timing while reducing netlength and power consumption in an industrial design flow.

One of the ways in which spoken languages differ from each other is in the temporal patterning of speech. These temporal patterns can be examined on several time scales, from very local (subsegmental and segmental) to global. The global patterns lasting from a quarter second to a second or so are most noticeable when we listen to speech in any language but our own. We may also become aware of rhythmic patterns in our own language when we hear it spoken by someone whose native language is something else. Presumably there is some kind of pattern in the timing of speech gestures that accounts for our perception of rhythmic differences between languages. This article examines the problem of speech patterns in time, two conceptual frames for temporal patterns in speech (symbol strings and cycles), global timing constraints (“stress-timed” vs. “syllable-timed” languages), regular “mora timing” in Japanese, harmonic timing effect, modelling rhythm with dynamical systems, and phrase edge timing phenomena.

Time-dependent shortest paths through a fixed sequence of nodes: application to a travel planning problem

We present a new net-reduction methodology to facilitate the analysis of real-time systems using Delay Time Petri Nets (DTPNs). Net reduction is one of the most important techniques for reducing the state-explosion problem of Petri nets. However, the application of net reduction to current timed-extensions of Petri nets (such as Merlin's Time PNs) is very limited due to the difficulty faced in the preservation of timing constraints. To overcome this problem, we introduce DTPNs which are inspired by Merlin's (1976) Time PNs, Senac's (1994) Hierarchical Time Stream PNs, and Little's (1991) Timed PNs. We show that DTPNs are much more suitable for net reduction. Then, we present a new set of DTPN reduction rules for the analysis of schedule and deadlock analysis. Our work is distinct from the others since our goal is to analyze real-time systems and the reduction methods we propose preserve both timing properties (schedule) and deadlock. To evaluate our framework, we have implemented an automated analysis tool whose main functions include net reduction and class-graph generation. The experimental results show that our net-reduction methodology leads to a significant contribution to the efficient analysis of real-time systems.