Hierarchical techniques for symbolic analysis of large electronic circuits

Parallel to algebraic methods, graphical circuit analysis methods have the advantage of cancellation-free. This paper proposes a graph reduction method for hierarchical symbolic circuit analysis by applying a binary decision diagram (BDD) for data sharing. This method is extended from the Graph-Pair Decision Diagram (GPDD) method which was developed for two-port dependent sources. New graph construction rules for multiple-port dependent sources are introduced, with which large analog circuits can be analyzed hierarchically. The new hierarchical method guarantees the cancellation-free property at each layer of hierarchy. The BDD-based hierarchical analysis method can greatly reduce the analysis complexity of the entire circuit, while the software construction and circuit partition remain easy. The new method is compared to the algebraic hierarchical method based on DDD (Determinant Decision Diagram) which does not have the cancellation-free property. Comparable performance can be achieved with the new method which has the extra cancellation-free property.

This paper is focused on the Internet Graphical Simulation Tool for computer analysis of electronic circuits and describes all main features and advantages of using this tool for computer modeling and simulations of electronic circuits. Internet Graphical Simulation Tool (IGST) provides easy way for modeling and simulation of electronic circuits without necessity of purchasing expensive software license or installing some special simulation software tools. IGST can be used anywhere access to the Internet is available. IGST is composed from three main parts which provide basic PSpice analyzing functionality for any electronic circuit. The first part of the IGST is a GUI for interactive drawing and editing of electronic circuit’s schema. The second part is a simulation core from freely available older version of the PSpice simulation software and the last part of the IGST is an Internet graphical environment for displaying simulation results. Based on these three parts the IGST creates complex tool for easy analysis of electronic circuits through the Internet.

A new simulation technique for analysis of power electronics circuits is presented. It is based on using the Chebyshev polynomial to derive an adaptive stepwise quadratic state-space model for each piecewise-linear circuit topology, where the state-space equation sets are integrated with modified nodal formulations (MNF). The key feature of this algorithm is to determine an optimum step size for the model to achieve desired accuracy. The switching instants are directly calculated by solving simple quadratic equations. No prior knowledge of the circuit operations is required. The theoretical predictions are verified with the results obtained in the available literature.

Analysis and design of analogue electronic circuits using DPI methods — Part 2: circuits containing different types of active devices Circuits with combinations of bipolar and field effect transistors as active devices are studied. It is shown that dealing with such problems poses no additional difficulties. An example is given.

A new finite element technique that allows nonlinear time domain analysis of power electronic circuits containing magnetic components is presented. The new technique is shown to compute the same voltage waveform in a nonlinear RLC circuit as previously published circuit techniques. The new technique is demonstrated for a circuit containing an inductor with a nonlinear B-H curve, finite conductivity and a given geometry including air gaps. >

Computationally efficient large-change statistical analysis of linear electronic circuits

Topological loop (B) and cutset (D) matrices are used to formulate systems of equations in many applications in the symbolic network analysis and fault diagnosis of electronic circuits. The minimisation of the number of their nonzero elements leads to more effective manipulation of the resulting equations. A simple and efficient algorithm for the reduction of the number of these nonzero elements is introduced and some applications are presented showing its effectiveness.

This chapter gives a description of the extension of Generalized Parameter Extraction Method (GPEM) for symbolic analysis of large-scale analog circuits containing pathological elements. The brief overview of the parameter extraction approach is included. An algorithm implementing the concept of Higher Order Summative Cofactors (HOSC) for determinants computation of the pathological element-based circuits is proposed. In this chapter, we also present the hierarchical decomposition techniques of upward and downward analysis of electronic circuits by GPEM. The proposed techniques are used in freeware symbolic analyzer CirSym. Several examples are presented to illustrate the advantages of the GPEM applications.

In the analysis of electronic circuits, it is often useful to replace a network by its Thevenin equivalent circuit. To do this one needs to calculate the values of the equivalent voltage and series resistance. It is shown that the prescription for finding the equivalent resistance given by most electronic texts is not generally valid when the network contains sources whose strength is controlled by currents within the network. In fact, the source strength coefficients appear in the expression for the equivalent resistance, yet would be eliminated by the usual method of short-circuiting the sources. A correct method of derivation is given and the emitter–follower circuit is shown as an example.

Thermal analysis of layered electronic circuits with Green's functions

Introduction to Linear Circuit Analysis and Modelling

In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has several advantages in terms of time-to-market and system cost, testing such core-based systems is difficult, mainly due to the problem of justifying test sequences at the inputs of a core embedded deep in the circuit and propagating test responses from the core outputs. In this paper, we first present a design for testability technique for testing such core-based systems. In this scheme, untestable cores are first made testable using hierarchical testability analysis techniques. If necessary, additional testability hardware is added to the cores to make them transparent so that they can propagate test data without information loss. This testability and transparency technique is currently applicable to cores of the following types: application-specific integrated circuits, application-specific programmable processors, and application-specific instruction processors. Other core types can be made testable and transparent using traditional techniques. The testable and transparent cores can then he integrated together with some system-level testability hardware to ensure justification of precomputed test sequences of each core from system primary inputs to the core inputs and propagation of test responses from core outputs to system primary outputs. Justification and propagation of test sequences are done at the system level by extending and suitably modifying the symbolic hierarchical testability analysis method that has been successfully applied to register-transfer level circuits. Since the testability analysis method is symbolic, the system test generation method is independent of the bit-width of the cores. The system-level test set is obtained as a byproduct of the testability analysis and insertion method without further search. The test methodology was applied to six example systems. Besides the proposed test method, the two methods that are currently used in the industry were also evaluated: (1) FScan-BScan, where each core is full-scanned, and system test is performed using boundary scan and (2) FScan-TBus, where each core is full-scanned, and system test is performed using a test bus. The experiments show that the proposed scheme has significantly lower area overhead, delay overhead, and test application time compared to FScan-BScan and FScan-TBus, without any compromise in the system fault coverage.

Distortion analysis of nonlinear circuits is very important for designing analog integrated circuits and communication systems. In this letter, we propose an efficient frequency-domain approach for calculating frequency response curves, which is based on HB (harmonic balance) method combining with ABMs (Analog Behavior Models) of Spice. Firstly, nonlinear devices such as bipolar transistors and MOSFETs are transformed into the HB device modules executing the Fourier transformations. Using these modules, the determining equation of the HB method is formed by the equivalent sine-cosine circuit in the schematic form or net-list. It consists of the coupled resistive circuits, so that it can be efficiently solved by the DC analysis of Spice. In our algorithm, we need not to derive any troublesome circuit equations, and any kinds of the transformations.

The key points and difficulties in vocal singing are problem identification and clever transition in the voice change area. In this paper, by establishing the hierarchical structure model of the hierarchical analysis method, we compare the degree of importance of elements at different levels and the same level based on the judgment matrix to establish the weight vector and test the consistency of the judgment matrix. At the same time, for the problem that the hierarchical analysis method is not strongly targeted, the fuzzy comprehensive evaluation method is proposed for optimization, and then the fuzzy hierarchical analysis method is used to analyze the sound change phenomenon from the three primary indicators of breathing rhythm, resonance effect and sound representation and the related secondary indicators. The evaluation scores of the breathing rhythm control level were 7.83% and 13.77% lower than those of the professional level and master level, respectively; the evaluation scores of resonance effect were 10.70% and 13.37% lower than those of the professional level and master level, respectively; the evaluation scores of sound representation level were 9.26% and 14.32% lower than those of professional level and master level, respectively. The research based on hierarchical analysis can analyze the phenomenon of voice change in the process of vocal singing from a quantitative perspective, give scientific guidance to the practice of vocal singing, and help the development and prosperity of vocal singing art.

With the huge variables ushering in the Chinese takeaway market “COVID-19 pandemic”, there are more sinking user markets that continue to flood into it and the takeaway industry is booming. After the epidemic, the meaning of the word "takeaway" was extended from catering to food delivery, medicine delivery, and all kinds of necessities, and the takeaway delivery gradually accompanied the new retail consumption habits developed by users during the epidemic. In the whole service system of take-out delivery, with the increasing number of take-out delivery personnel, the take-out delivery e-bikes used are still ordinary travel e-bikes, lacking consideration and design of user behavior and usage scenarios. In the context of the new national standard "electric bicycle safety technical specifications" policy, there are still many takeaway delivery using electric bicycles do not meet the specifications, due to the delivery of limited time to arrive, a one-time delivery of overloaded goods and other cases of traffic accidents caused by frequent. This study introduces the KANO model and hierarchical analysis and TRIZ theory to study the real needs of users, and seeks to conduct innovative design research on take-away delivery electric bicycles.In the preliminary stage of the study, the secondary data research method was used to conduct preliminary summary research on a variety of businesses extending from the take-out industry, and the delivery process of riders in the take-out industry service system after receiving orders was derived through observation, interview, focus group discussion, and questionnaire research methods. Based on the KANO model framework to classify and prioritize user requirements, the non-linear relationship between product features and user satisfaction is identified based on the analysis of the impact of user requirements on user satisfaction. Recognize product and service requirements from the user's perspective, design and publish a valid questionnaire, summarize and classify the survey results, and build a quality model. Further research and analysis of the quality model to identify the sensitivity of specific measurement indicators. Combined with the hierarchical analysis method, the elements within the same level are compared in two-by-two analysis to determine their respective weights for the previous level, and finally give the importance ranking of all factors relative to the total goal, and finally tap into the real user needs. The TRIZ theory is then used to provide systematic theoretical and methodological tools for problem transformation, analysis and solution of needs creatively using innovative thinking methods and problem analysis methods, following the laws of technological system evolution. The KANO model and hierarchical analysis method are effectively combined with TRIZ theory to gradually quantify the qualitative analysis, which can generate more objective research data conclusions and provide innovative ideas for the design research of electric bicycle for delivery.In this study, the different needs of users are organized and differentiated in a hierarchical manner through KANO model analysis, combined with different emotional hierarchical need points of users. Predict the direction of users' emotional needs for the product, and match their emotional requirements with the product at different levels. Combined with the interview research, the design study was conducted taking into account the human-machine factors for the take-away delivery electric bicycle. In line with the new national standard policy, the delivery time of the rider is guaranteed at the same time, the area of the delivery goods and pick-up efficiency is improved, and the riding experience and safety of the rider are also taken into account. This is a research exploration of the takeaway delivery industry.This study combines the KANO model, hierarchical analysis and TRIZ theory to design a study on the process of users for take-out delivery. Through an in-depth study of user behavior, combined with the quantitative study of hierarchical analysis, different levels of demand are derived. Then, through TRIZ theory and emotional design, the take-out delivery service system was optimized and the innovative design of the take-out delivery bicycle was studied. In this study, based on the KANO model approach, the visual experience is designed from the appearance and user experience, giving the electric bicycle emotional factors to form a design that meets the user's needs. The whole design process also explored the correlation between design emotional needs and design form. The design solution evaluation results verified the effectiveness and feasibility of the KANO model approach to user needs analysis in product design and provided an effective solution for the design innovation of electric bicycle for take-away delivery.