High-efficiency power amplifier design including input harmonic termination

We discuss the broadband design of high-efficiency GaN power amplifiers (PAs) using continuous modes. A Machine Learning approach to the full EM-based optimization of a hybrid design is first outlined and demonstrated experimentally. We then consider the challenges of achieving high efficiency in a broadband integrated PA, including the features of GaN transistors that facilitate broadband operation. It is shown that proper sizing of transistor can lead to an optimum load resistance close to 50fl, thereby extending the bandwidth of the output matching network of the PA in an integrated environment. We present techniques to realize the continuous-mode operation in an integrated GaN PA, with low loss and compact chip size. Finally, we show predicted results for the integrated GaN PA implementation.

High performance broadband distributed power amplifier (PA) design relies on the co-design of input signal distribution and non-isolated output combiner to take maximum advantage of the resulting load-pulling effects at both fundamental and higher harmonics. Due to the load-pulling and the need to consider higher harmonics, PA operation is not readily expressed analytically. In this work this is addressed by using a numerical linear multi-harmonic calculation method for rapid circuit evaluation and optimization. This linear approach targets good broadband performance without relying on nonlinear saturation effects. An initial investigation is performed to find suitable input network and output combiner topologies for a two-cell PA configuration. A demonstrator is then designed based on the findings, where a 3-dB hybrid coupler with an offset transmission line in one branch is used to produce a frequency dependent phase difference between transistor cells. Measuring the PA at 40-V supply and 1-dB compression the output power is in the 43–46 dBm range with corresponding efficiencies of 46–58% across 0.85–2.7 GHz, whereas saturated efficiencies are typically in the 60%-range. The simultaneous combination of high output power and high efficiency reported across 100% fractional bandwidth is state-of-the-art and clearly shows the merit of the proposed PA design approach.

In this paper, a hybrid continuous inverse mode for designing broadband high-efficiency power amplifiers (PAs) is for the first time analyzed mathematically. The hybrid continuous inverse mode contains the classical continuous inverse Class-F mode, the continuous inverse F mode with maximally flat current waveforms and the inverse Class-B to Class-J continuum mode and so on, which provides alternative design space for realizing the broadband high-efficiency PAs. And a high-efficiency PA at the center frequency of 3.45 GHz is designed to verify this theory. Experimental results show that the implemented PA can output 10.5–16 W saturation power with drain efficiency (DE) over 70% from 3.2 to 3.7 GHz. Meanwhile, for a 5 MHz two-tone signal, drain efficiency of 40.3%–48% is measured with an average output power of 34–36.5 dBm at a two-tone carrier-to-intermodulation ratio (C/I) of 30 dBc.

A series of novel continuous inverse modes based on current element is proposed. The series of novel continuous inverse mode is extended by increasing the coefficient in the current equation of traditional inverse class F power amplifier (PA). The theoretical analysis shows that new current equation can provide a wide matching space for the design of broadband high efficiency PAs. To prove this theory, a wideband high efficiency PA is designed and fabricated. The experimental test results show that the drain efficiency is 65-78% in the 1.8-3G frequency range. The designed PA can obtain output power from 12.9 to 21 W and gain is from 10 to 13.3 dB in the interesting frequency range.

This paper presents the analysis and design of a high-efficiency broadband Class-EM power amplifier (PA). The inherent broadband characteristic of the Class-EM PA that turns out due to the resistive-reactive impedance terminations at the fundamental and second harmonic frequency is first investigated and then extended using double reactance compensation technique by incorporating a parallel resonator L P C P into the main circuit's load network. Designed using GaN HEMTs, the PAs deliver 23.7% (without L P C P ) and 60.4% (with L P C P ) fractional bandwidth, within which the PAE is larger than 60% and the output power is relatively constant.

Design and implementation of a high-efficiency concurrent dual-band power amplifier

This paper presents a method for bandwidth extension in high-efficiency power amplifier (PA) design. With a phase shift in voltage waveform of the continuous class-F mode, real part of harmonic impedance is generated to expand the impedance design space at the expense of little lossy of performance. The simulation and measurement, conducted on a broadband PA covering 1.9-3.1 GHz based on the proposed method, show a good agreement with the theory. Measured results show that the fabricated PA has a drain efficiency of 66.5%-75% when delivering 41-42.3 dBm output power with a gain of 11-12.7 dB. Under a 20-MHz LTE signal excitation at 2.6 GHz, the PA exhibits an adjacent channel leakage ratio of -36.5 dBc at an average output power of 35 dBm without linearization.

We report optical mixing with difference frequencies to 211 GHz in 50 nm gate pseudomorphic InP-based high electron mobility transistors (HEMTs). To our knowledge, this is the highest frequency optical mixing signal obtained in three terminal devices. To detect the signals at these frequencies, a novel three-wave-mixing configuration was employed. To demonstrate the wide tunability of this setup, a sweep of frequencies from 160 to 190 GHz was performed. The optically generated millimeter wave signals were downconverted to 97 GHz and radiated. For the radiation experiments, tunable baseband signals were also added by injection into the gate terminal of our HEMTs, thereby providing a method to transmit information.

A high efficient GaN HEMT power amplifier with a new topology is presented for to be used at 3.4-3.7 GHz band. Short sections of the Microstrip-lines are used as harmonic traps at the load network in order to improve the efficiency. The fabricated GaN HEMT amplifier delivers 37.5 dBm saturated output power and the maximum power-added efficiency of 80% and a maximum drain efficiency of 83% are obtained at 3.6 GHz. These values represent the state-of-the-art performance efficiencies at S-Band.

A highly integrated wideband MMIC (monolithic microwave integrated circuit) T/R (transmit/receive) chip was designed for both commercial and military FM CW (continuous-wave) applications. The MMIC circuit was designed using 0.25- mu m pseudomorphic HEMT (high electron mobility transistor) technology. The T/R chip has three three-stage amplifiers, an active power divider, a diode double-balanced mixer, and a voltage-controller oscillator (VCO), all integrated on a single chip 96 mils*71 mils (2.4 mm*1.8 mm) in size. High-density layout techniques help to keep the chip size small, thereby assuring high yield. >

This paper presents a broadband H-band (220 -325 GHz) power amplifier in a 35 nm InGaAs-based metamorphic high electron mobility transistor technology. The amplifier is realized as a submillimeter-wave monolithic integrated circuit (S-MMIC) and is designed to drive a high power amplifier in a multi-gigabit communication system. The five-stage amplifier S-MMIC based on common-source gain cells was realized and measured on-wafer with a maximum gain of 23 dB at 285 GHz. The lower and higher cutoff frequency is 278 and 335 GHz, respectively, with a gain variation of around 4 dB. The amplifier has four parallel transistors in the last two stages and provides a saturated output power of 8 dBm at 300 GHz. A gain-bandwidth product (GBW) of 508 GHz could be achieved.

This paper describes a wideband Q-band low noise amplifier (LNA) using the 0.1-μm gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) technology. The LNA is implemented with a 4-stage self-biased common-source (CS) topology. A measured amplifier achieves a peak power gain of 28 dB, with a 3-dB bandwidth of 15 GHz centered at 43 GHz. The amplifier exhibits an output 1 dB gain compression point of 9.6 dBm. The on-wafer measured noise figure stays under 2.8 dB over the 3-dB bandwidth. An LNA module is designed and fabricated based on the chip. To the best of the authors' knowledge, the LNA exhibits one of the lowest noise figure among other reported wideband Q-band LNA using the same technology.

A V -band current reuse frequency tripler is developed in 0.15um pseudomorphic high electron mobility transistor (pHEMT) technology. This tripler combines the compact microstrip resonant cell (CMRC) topology for suppress unwanted harmonic and current-reuse technique to improve the conversion gain. At 60 GHz, the tripler achieved as minimum conversion gain of −16.6 dB at an input power of 8 dBm; the suppressions of the fundamental and second harmonic frequencies were 22 dB and 27 dB, respectively.

This paper reports a 40 GHz sub-harmonic Gilbert upconverter with a leveled-LO configuration using 0.15-µm AlGaAs/InGaAs pseudomorphic high electron mobility transistor (PHEMT) technology. The sub-harmonic structure is employed because the LO frequency is only half of the RF frequency. A two-stage RC-CR polyphase filter forms a 20-GHz quadrature generation for the LO port of the upconverter while an LC current combiner at the RF output port performs the balance-to-unbalance transformation and conversion gain enhancement. A self-biases current source is used to achieve single voltage supply. The demonstrated pHEMT sub-harmonic Gilbert upconverter has a conversion gain of −1 dB, an output return loss of −16.5 dB at 40 GHz, LO-to-RF isolation of 47 dB, and 2LO-to-RF isolation of 41 dB. OP 1dB and OIP 3 are −20 dBm and −5 dBm, respectively. The current consumption is 12.9 mA at a 4 V supply voltage.

This paper presents the design of a wideband monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) using GaAs pseudomorphic high electron mobility transistor (pHEMT) technology. The flat gain of 30 dB ±0.5 dB is achieved using a three-stage amplifier topology over 412 GHz. The minimum noise figure of 1.0 dB is achieved in a packaging chassis within the frequency band. In order to achieve such a low noise over a wideband, several bandwidth enhancement techniques are applied in the design. An inductive feedback at the source of the first stage results in a very wideband input matching ($\vert S _{\mathbf {11}}\vert < -12$ dB) over 3–15 GHz. The gold wire bonds at the input and output of the chip are separately analyzed and modeled into matching networks to ensure wideband low noise behavior of the chip after packaging. This GaAs pHEMT LNA is suitable for radio astronomy receivers such as the Atacama Large Millimeter Array Band 3 IF warm amplifiers.