HILL: Efficient Low-Latency Implementations of Linear Layers via Heuristic Search

This paper studies the problem of constructing lightweight involutory maximal distance separable (MDS) matrices. The authors find the exact lower bound of the XOR counts for 4 × 4 involutory MDS matrices over $$\mathbb{F}_{2^{4}}$$. Further, some new structures of 4 × 4 involutory MDS matrices over $$\mathbb{F}_{2^{m}}$$ are provided to construct involutory MDS matrices and the authors constructed the lightest 4 × 4 involutory MDS matrices over $$\mathbb{F}_{2^{8}}$$ so far by using these structures.

The design of hardware-friendly architectures with low computational overhead is desirable for low latency realization of CNN on resource-constrained embedded platforms. In this work, we propose CAxCNN, a Canonic Sign Digit (CSD) based approximation methodology for representing the filter weights of pre-trained CNNs.The proposed CSD representation allows the use of multipliers with reduced computational complexity. The technique can be applied on top of state-of-the-art CNN quantization schemes in a complementary manner. Our experimental results on a variety of CNNs, trained on MNIST, CIFAR-10 and ImageNet datasets, demonstrate that our methodology provides CNN designs with multiple levels of classification accuracy, without requiring any retraining, and while having a low area and computational overhead. Furthermore, when applied in conjunction with a state-of-art quantization scheme, CAxCNN allows the use of multipliers, which offer 77% logic area reduction, as compared to their accurate counterpart, while incurring a drop in Top-1 accuracy of just 5.63% for a VGG-16 network trained on ImageNet.

Maximum Distance Separable (MDS) matrices are used as the main component of diffusion layers in block ciphers. MDS matrices have the optimal diffusion properties and the maximum branch number, which is a criterion to measure diffusion rate and security against linear and differential cryptanalysis. However, it is a challenging problem to construct hardware-friendly MDS matrices with optimal or close to optimal circuits, especially for involutory ones. In this paper, we consider the generalized subfield construction method given in (1) from the global optimization perspective and then give new 4×4 involutory MDS matrices over F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2³</sub> and F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2⁵</sub> . After that, we present 1,176 (= 28 × 42) new 4 × 4 involutory and MDS diffusion matrices by 33 XORs and depth 3. This new record also improves the previously best-known cost of 38 XOR gates.

Ahstract— With the rapid development of vehicular applications and mobile devices, demands for resources to process time-critical and computation-intensive tasks are increasingly prominent. In this paper, we propose a two-layer Vehicular Fog Computing (VFC) architecture, including the client layer and the fog layer. Vehicles may generate tasks as clients, which are further assigned to the nodes in the fog layer for processing. The fog layer aggregates available resources of vehicles and infrastructures by exploiting their communication, computation and storage capabilities. Each task requires certain amount of resources for processing at the fog nodes. We formulate a distributed task allocation (DTA) problem, which takes deadline, vehicle mobility and fog capacity into consideration, and aims at maximizing the overall resource utilization of system, via the cooperation of vehicles and fog nodes. We linearize DTA into a 0–1 integer linear programming (ILP) problem to obtain the optimal solution. Further, we design a heuristic algorithm to obtain near-optimal performance with low computational overhead, which decomposes DTA into two subprocess and schedules tasks in each fog node independently. Finally, we build the simulation model and conduct a series of experiments based on real-world vehicle trajectories, which demonstrate the effectiveness and scalability of the proposed algorithm.

This article develops a heuristic method under the proposed basic hypotheses of measuring sequence and the measuring decision time to search for the optimal measuring sequence. At present, the advantage of the proposed heuristic rule is that unnecessary measuring sequence considerations can be deleted when there are many measuring items, thus shortening the computer time needed for measuring sequence planning. First the graphic data were extracted by means of the extract program. Later the designer inputs the measuring datum and measuring parameters into the interface program. The numbers and characteristics of the measuring items could be determined, and the optimal measuring sequence could then be searched for with the heuristic method developed.

Este trabalho é direcionado para o problema de programação de operações flow shop permutacional. Um novo método heurístico construtivo, com o objetivo de minimizar a Duração Total da Programação (makespan) é apresentado e comparado com os melhores métodos heurísticos construtivos reportados na literatura, conhecidos por NEH e NEHKK. Os resultados da experimentação computacional mostraram que o novo método heurístico obtém soluções de alta qualidade, em comparação com os métodos avaliados para o conjunto de problemas teste de Taillard. Palavras-chave: Programação da produção; flow-shop permutacional; métodos heurísticos.

Combined Petri net modelling and AI-based heuristic hybrid search for flexible manufacturing systems—part II. Heuristic hybrid search

In this paper, we propose an efficient method to find lightweight involutory MDS matrices. To obtain involutory matrices, we give a necessary and sufficient condition for judging the involutory MDS property and propose a search method. For the $$n\times n$$ involutory MDS matrices over $${\mathbb {F}}_{2^m}$$ , the amount of computation is reduced from $$2^{mn^2}$$ to $$2^{(mn^2)/2}$$ . Especially, we can exhaustively search for involutory MDS matrices when $$n=4$$ , and for larger n, we add additional restrictions to reduce the search range. As for finding lightweight ones, we use the permutation-equivalent class to extend the input such that the efficiency of the heuristic designed by Xiang et al. can be improved. Applying our method, we obtain a class of $$16\times 16$$ binary MDS matrices with branch number 5, which can be implemented with only 35 XOR gates. The results even reach the same implementation cost as the lightest non-involutory MDS matrix up to now. Concerning lightweight binary matrices with order 32, it is hard to obtain optimal results through search. Hence, we construct $$32\times 32$$ matrices with the lightweight $$16 \times 16$$ matrices that we found. In this way, we obtain two classes of $$ 4 \times 4 $$ involutory MDS matrices whose entries are $$ 8 \times 8 $$ binary matrices with 70 XOR gates while the previous lightest matrices with the same size cost 78 XOR gates. Moreover, we also generalize our search method to general cases and it is provable that the approach is feasible for MDS matrices of order 6 and 8 to achieve efficient search.

The Substitution-BOX is the most difficult architecture and is at the heart of any Advanced Encryption Standard algorithm implementation. It is the most complicated non-linear architecture using multiplicative inverse. It consumes maximum amount of the energy and power budget of the algorithm. This paper introduces a full-custom CMOS implementation of Multiplicative Inverse module for Substitution/ Inverse Substitution transformation in composite field arithmetic using Galois field GF (28). The multiplicative inversion module utilizes large number of XOR gates in its implementation. This paper introduces implementation of a novel XOR gate using six transistors. Using this six transistor XOR gate, the multiplicative inverse module is implemented in 90 nm CMOS technology. Simulation of the proposed design is achieved using Tanner EDA v.16 software. The area of the multiplicative inverse circuit is 39.92 µm2 requiring 776 transistors. With 0.6 Volts supply voltage, the design shows a power dissipation of 2.386 µWatts making it ideal for applications such as smart cards and RFID tags.

MDS matrices are important building blocks providing diffusion functionality for the design of many symmetric-key primitives. In recent years, continuous efforts are made on the construction of MDS matrices with small area footprints in the context of lightweight cryptography. Just recently, Duval and Leurent (ToSC 2018/FSE 2019) reported some 32 × 32 binary MDS matrices with branch number 5, which can be implemented with only 67 XOR gates, whereas the previously known lightest ones of the same size cost 72 XOR gates.In this article, we focus on the construction of lightweight involutory MDS matrices, which are even more desirable than ordinary MDS matrices, since the same circuit can be reused when the inverse is required. In particular, we identify some involutory MDS matrices which can be realized with only 78 XOR gates with depth 4, whereas the previously known lightest involutory MDS matrices cost 84 XOR gates with the same depth. Notably, the involutory MDS matrix we find is much smaller than the AES MixColumns operation, which requires 97 XOR gates with depth 8 when implemented as a block of combinatorial logic that can be computed in one clock cycle. However, with respect to latency, the AES MixColumns operation is superior to our 78-XOR involutory matrices, since the AES MixColumns can be implemented with depth 3 by using more XOR gates.We prove that the depth of a 32 × 32 MDS matrix with branch number 5 (e.g., the AES MixColumns operation) is at least 3. Then, we enhance Boyar’s SLP-heuristic algorithm with circuit depth awareness, such that the depth of its output circuit is limited. Along the way, we give a formula for computing the minimum achievable depth of a circuit implementing the summation of a set of signals with given depths, which is of independent interest. We apply the new SLP heuristic to a large set of lightweight involutory MDS matrices, and we identify a depth 3 involutory MDS matrix whose implementation costs 88 XOR gates, which is superior to the AES MixColumns operation with respect to both lightweightness and latency, and enjoys the extra involution property.

A hybrid scheme for multicast authentication over lossy networks

In this paper, we introduce a lowest‐density maximum‐distance separable (MDS) array code, which is applied to a Smart Meter network to introduce reliability. By treating the network as distributed storage with multiple sources, information can be exchanged between the nodes in the network allowing each node to store parity symbols relating to data from other nodes. A lowest‐density MDS array code is then applied to make the network robust against outages, ensuring low overhead and data transfers. We show the minimum amount of overhead required to be able to recover from r node erasures in an n node network and explicitly design an optimal array code with lowest density. In contrast to existing codes, this one has no restrictions on the number of nodes or erasures it can correct. Furthermore, we consider incomplete networks where all nodes are not connected to each other. This limits the exchange of data for purposes of redundancy, and we derive conditions on the minimum node degree that allow lowest‐density MDS codes to exist. We also present an explicit code design for incomplete networks that is capable of correcting two node failures. Copyright © 2015 John Wiley &amp; Sons, Ltd.

Given the recent rise of the Internet-of-Things (IoT), networked devices are becoming deeply embedded into everyday objects, leading to a need for novel security methods.Physical Unclonable Functions (PUFs) enable the differentiation between instances of the same device and have the potential to replace costly cryptographic operations while providing higher security guarantees, due to their inherent unclonability.We present a pairwise, continuous authentication protocol based on Physical Unclonable Functions (PUFs) and supporting mutual authentication on resource constrained nodes.The unclonability provided by the PUFs is an integral part of the authentication process to continuously prove the existence of the PUF secrets and the proposed protocol is executed periodically to enable the establishment of trust between the participants.This is achieved by refreshing the authentication information in every protocol round, leading to a 'CRP Ratchet' mechanism of renewing the authenticating PUF challenge response pairs (CRPs).We also discuss the security and performance of the protocol in IoT applications with a large number of devices.Since the only operations used in the periodic protocol phase are hashing and exclusive OR, low computation, complexity, and energy consumption overhead is achieved.

Combined Petri net modelling and AI based heuristic hybrid search for flexible manufacturing systems—part 1. Petri net modelling and heuristic search

Arbiter physical unclonable function (APUF) is a hardware security primitive that generates security keys by utilizing unavoidable process variations during chip manufacturing. However, the structure based on linear additive function makes it vulnerable to machine learning (ML) attacks. This paper proposes a parallel feedback obfuscation PUF (PFO PUF) design, which uses intermediate arbitration signals of the lower-layer APUF to generate the hidden challenge of the upper-layer APUF, enhancing the overall nonlinearity of the structure. The obfuscation module makes weight judgment for intermediate arbitration signals of upper-layer and lower-layer APUFs, which obfuscates the real response of PUF. We further design a variant of PFO PUF called reconfigured challenge obfuscation PFO PUF (RPFO PUF) and propose its lightweight device authentication protocol. RPFO PUF enhances the resistance of the original PFO PUF against reverse engineering (RE) and improves its Strict Avalanche Criterion (SAC) characteristic by reordering the challenges and incorporating weak PUF responses. The proposed PFO PUF and RPFO PUF were comprehensively evaluated via Python-based simulations and FPGA measurements. In Python simulations, both designs show strong resistance to state-of-the-art ML attacks, with logistic regression (LR), support vector machine (SVM), and covariance matrix adaptation evolution strategies (CMA-ES) yielding near 50% prediction accuracies under various PUF configurations. Although deep neural network (DNN) achieves up to 69.52% prediction accuracy on the PFO PUF, it drops to ∼50% on the RPFO PUF. FPGA results further confirm this, with the (32, 11)-RPFO PUF achieving a maximum prediction accuracy of only 51.47% across all four ML attacks. Moreover, both designs incur low hardware overheads, requiring just 743 and 2145 gate equivalents (GEs), respectively.