Improved additional data transmission based on low density parity check code for the ATSC terrestrial DTV systems

In a Single Frequency Network (SFN) for Advanced Television Systems Committee (ATSC) terrestrial digital television (DTV) system, the interferences induced by the multiple transmitters and/or repeaters using same frequency are unavoidable. To ease the interference handing in the SFN for ATSC DTV system, transmitter identification (TxID) signal is recommended in the ATSC terrestrial DTV system. The TxID signal is embedded in the ATSC DTV signal and transmitted from each transmitter and repeater within the SFN and in ATSC recommended practice (RP) A/111, Kasami sequence is recommended as the TxID signal. In this paper, we propose an additional data transmission scheme using the TxID signal. In the proposed scheme, the Kasami sequence not only acts as the conventional TxID of the SFN for ATSC terrestrial DTV system but also carriers the additional data bits on its polarity and the code phase.

Several previous studies have demonstrated that additional low-rate data can be transmitted in Advanced Television Systems Committee (ATSC) terrestrial digital television (DTV) systems by modulating the polarity of the transmitter identification (TxID) signal. Previously proposed additional-data transmission schemes can offer an additional reliable transmission channel, and thus they have a very large coverage area compared to that of a DTV signal. Unfortunately, as the cost of a reliable transmission, they have a limitation in their maximum data rate. In this paper, we propose a new additional data transmission scheme based on sequence phase modulation (SPM) to increase the data rate. The proposed scheme exploits not only the polarity but also the phase of a TxID signal, and thus it significantly enhances the data rate compared to conventional schemes.

In this paper, we propose an additional data transmission scheme for the ATSC (Advanced Television Systems Committee) terrestrial DTV (digital television) systems based on a low rate systematic irregular repeat-accumulate (SIRA) code. Unlike the previously proposed additional data transmission scheme using TxID (transmitter identification) signals, the proposed scheme conjuncted with a DTV VSB signal cancellation technique is suitable for high data transmission. Compared to the previous additional data transmission scheme based on a low rate systematic repeat-accumulate code, the BER performance of the proposed scheme is significantly improved. The additional data is encoded with a simplified IRA channel coding scheme and injected to the conventional VSB signals with the bury ratio (BR) of -27 dB. With the proposed scheme, an additional data of rate up to 1 Mbps can be transmitted along with the ATSC terrestrial DTV signals by minimizing the detrimental effects on the ATSC terrestrial DTV systems.

In this paper, we introduce the overview and detailed structure of low-density parity-check (LDPC) codes, which are adopted for the physical layer standard of Advanced Television Systems Committee (ATSC) 3.0. As one of the features to mitigate channel errors efficiently, LDPC codes are used as a main part of forward error correction scheme within the bit interleaved coded modulation chain. This paper presents two different structures of LDPC codes in the ATSC 3.0 standard: 1) irregular repeat accumulate structure and 2) multi-edge type structure. After the detailed encoding methods for the two structures are introduced, the performance results including comparison studies with other broadcasting standards such as DVB-T2 and DVB-S2 are shown.

Turbo codes are attractive compared with Low Density Parity Check (LDPC) codes for Forward Error Correction (FEC) applications mainly due to their superior performance, especially at low Signal-to-Noise Ratio (SNR) such as are common in Powerline channels. For example, IEEE 1901-FFT PHY used the Turbo coding scheme defined in the HomePlug AV standards. However, patent fees are usually required for each turbo-code enabled manufactured device. The objective of this paper is to examine whether unlicensed LDPC codes, with optimized choices of block lengths, could be a viable alternative for future Powerline Communications (PLC) applications. The paper shows that the performance of the LDPC codes can approximate that of the Turbo codes with higher block lengths, on channels with typical and realistic PLC characteristics. The paper also shows that the additional complexity associated with this increase in block length can be mitigated by the use of Quasi-Cyclic LDPC (QC-LDPC) codes.

Low Density Parity Check (LDPC) codes have capacity-approaching performance over several channels of interest. In practice, for good block-error rate performance, the girth of the Tanner graph of an LDPC code needs to be as high as possible. In theory, to show that block-error rate approaches zero for increasing block-lengths, the girth of the Tanner graph sequence needs to tend to infinity with block-length. To meet these requirements, we construct sequences of large-girth irregular LDPC codes for a given degree-distribution pair (DDP) by applying a general node splitting algorithm on large girth graphs. The obtained Tanner graph meets the required DDP up to a suitable approximation. By optimizing the node-splitting method and using suitable large-girth graphs, we show code constructions with smaller block length for the same girth, when compared to previous constructions. Similar gains in block length are observed in the construction of sequences of large-girth protograph LDPC codes. Simulations, over a binary erasure channel, confirm the gains in block-error rate obtained by the large girth construction.

Big data storage demands larger cluster. The increasing size of the cluster may lead to failures of larger number of nodes. To provide reliable big data storage, replications are not cost-effective and does not provide a robust solution to prevent data loss. Traditional erasure codes applied in the RAID system such as Reed-Solomon (R-S) based solutions have limitations in providing high reliability. This is because higher reliability requires erasure codes with larger size. The computational cost of the R-S codes increase quadratically with the number of failures the R-S codes can tolerate for the same redundancy rate. It has been shown that Low Density Parity Check (LDPC) codes have lower computational cost and repair network traffic compared with R-S based solutions. Unfortunately, there does not exist a construction method for LDPC codes with larger size to control the computational cost and repair traffic. In this paper, a novel method is proposed to construct a family of LDPC codes - expanCodes with expandable sizes. The proposed expanCodes allows the encoding and decoding complexity remain unchanged with the increase of the size of the LDPC codes. As a result, increased reliability can be achieved without additional computation and repair traffic. The proposed expanCodes is integrated with the Hadoop system. Simulations show that more than 29% decrease in terms of encoding and decoding latency compared with R-S based solutions.

The application of Low Density Parity Check (LDPC) code in the anti-interference systems has drawn an increasing attention, due to its admiring performance which is very close to the theory limit. This paper focuses on a LDPC encoded slow frequency hopping (SFH) communication system with partial-band interference. Firstly, a modified soft- decision algorithm based on the utilization of interference information is proposed, and its performance is compared with some other soft-decision methods. Secondly, with numerical simulation, the influence of code rate, code length and the number of symbols per hops on the performance of the system with partial band noise interference is illustrated and examined in detail. Considering the great influence of hops per symbol on the performance, interleaver should be used and its influence on the performance is further examined by simulation. Finally, some constructive advises for the design of LDPC coded SFH system are given. Simulation results show that, with a reasonable design, the SFH system with LDPC code could achieve a desirable performance.

In this paper, a random Low-Density Parity-Check (LDPC) code is proposed for Noncontiguous Orthogonal Frequency Division Multiplexing (NC-OFDM) Cognitive Radio (CR) systems. Unlike other encoding schemes which achieve a system code rate of only 1/4 when half of the subcarriers are active, the proposed scheme achieves a system code rate of 1/2. The LDPC code is used to enhance the data transmission rate. A new channel model comprised of a binary erasure channel concatenated with an uncorrelated fading channel and an AWGN channel is adopted for NC-OFDM CR systems. Moreover, the adopted channel model is employed with density evolution algorithm to obtain good degree distribution pairs for the LDPC code. Thereafter, a modified shortest-path algorithm is used to construct the parity-check matrix for the LDPC code. Simulation results show that the proposed LDPC code performs well in terms of both error rate and data transmission rate.

In a single frequency network (SFN) for the Advanced Television Systems Committee (ATSC) terrestrial digital television (DTV) system, co-channel interference induced by the multiple transmitters and/or repeaters which use the same output channel is inevitable. Since the presence of interference results in the performance degradation of the SFN, it is crucial to manipulate the interference by adjusting the transmit power and the emission time of each transmitter and repeater within the SFN. In the ATSC terrestrial DTV system, in order to facilitate the interference manipulation process, a transmitter identification (TxID) signal which is embedded in the transmit signal from each transmitter and repeater is recommended. However, such an embedded signal may degrade the DTV signal quality even though the injection level of the TxID signal is very low compared to the DTV signal. Hence, the effect of the TxID signal on the DTV signal needs to be investigated before deploying the SFN with TxID signal. In this paper, the effect of the TxID signal on the performance of legacy DTV receivers is investigated not only with extensive computer simulation but also with laboratory and field tests. According to the various test results, the average performance loss of the conventional DTV receiver due to the TxID signal is less than 0.2 dB when the TxID signal is injected at 30 dB below the DTV signal power.

Terrestrial digital multimedia TV/handle broadcasting (DMB-TH) is a newly upcoming framing structure, channel coding and modulation for digital television terrestrial broadcasting system standard of China, which is recently drafted and is ready to be verified in order to deploy mobile multimedia broadcasting services for the public. The adoption of strong channel coding techniques appears to be of key importance for mobile operators and broadcasters. Low-density parity-check (LDPC) codes have been widely considered as error-correcting codes for next generation communication systems. A good LDPC decoder design requires both implementation friendly LDPC codes and efficient decoder architectures. The quality of LDPC code is crucial in determining the coding gain and implementation complexity of LDPC hardware decoders. This paper presents a turbo-decoding message-passing algorithm (TDMP) based LDPC code search algorithm with hardware considerations. The main advantages of the proposed algorithm over the DMB-TH standard decoding algorithm are 1) improvement in coding gain by an order of magnitude at high signal-to-noise ratio (SNR), 2) reduced decoder complexity. The performance of the proposed TDMP architecture is shown by the comparison of simulation results.

We propose a novel concatenated coding scheme combined Low Density Parity Check(LDPC) code and vertical Bell Labs layered space-time (VBLAST) code to improve the bit error rate (BER) performance for Free-space optical (FSO) communication links with On Off Keying(OOK) modulation. In the scheme, π-rotation encoding and belief-propagation (BP) decoding algorithm are employed in LDPC code, and minimum mean-square error (MMSE) soft-decision decoding algorithm is used for VBLAST code. Moreover, a joint iterative detection and decoding algorithm of VBLAST code and LDPC code is used to improve the overall link performance. At last, the BER of the proposed scheme over lognormal atmospheric turbulent fading channels is analyzed by using Monte Carlo method. The result shows that the BER of the proposed concatenated coding scheme is much improved than that only use VBLAST code scheme.

Low-density parity-check (LDPC) codes have been widely considered as error-correcting codes for next generation communication systems. A good LDPC decoder design requires both implementation friendly LDPC codes and efficient decoder architectures. The quality of LDPC code is crucial in determining the coding gain and implementation complexity of LDPC hardware decoders. This paper presented a genetic algorithm (GA) based LDPC code search algorithm with hardware considerations. Regular quasi-cyclic LDPC codes are used due to its friendliness to hardware implementation. Our hardware architecture design schedules pipeline LDPC decoding operation to boost the hardware utilization efficiency (HUE) of LDPC decoder. A LDPC decoder with a block size of 12288 is implemented in FPGA to validate our code and architecture design.

Low Density Parity Check (LDPC) codes have been widely used in communications systems due to their high error correction capabilities. Recently these codes are also investigated for being exploited in high performance storage systems, especially when Non-Volatile Memory (NVM) technologies are used. The main drawback of using LDPC codes in storage systems with a high number of parallel channels is the increased hardware complexity and cost, especially when variable rate codes are used. In this work, we present an architecture of a NVM-based storage system that dynamically adapts the LDPC's rate to the aging conditions of the storage device in order to maximize its lifetime capacity while keeping low its hardware complexity. In order to decrease the system's complexity we propose a PCIe-based architecture that uses a pool of LDPC decoders shared by all NVM channels and we study its effect on the system's lifetime capacity and the achievable I/O data rate.

In this paper, we propose a concatenated code by combining a Recursive Systematic Convolutional (RSC) code with a Low-Density Parity-Check (LDPC) code. The proposed concatenated code is encoded in parallel by an RSC encoder and an LDPC encoder without interleavers between them. When decoding the proposed concatenated code, the information bits are decoded by two decoding algorithms, and soft information is exchanged between the RSC decoder and the LDPC decoder. This allows for the elimination of wrong codewords output by each decoder. The use of an LDPC code allows us to halt the decoding process when the valid codeword is obtained. We evaluate the error rate performance of the proposed concatenated code by computer simulations. We show that the proposed concatenated code does not have a high error floor, and achieves better BLock Error Rate (BLER) performance than either conventional LDPC codes or conventional turbo codes in the high Eb/No region. We also show that since the proposed concatenated code can correct wrong codewords output by each decoder, it achieves better BLER than the regular LDPC code at the same Bit Error Rate (BER).