INTEGRATED CIRCUIT CHANNEL ROUTING USING A PARETO-OPTIMAL GENETIC ALGORITHM

In this paper we have developed algorithms for generating random channel instances for their use in computing channel routing solutions in VLSI physical design. Channel instances are usually of two types: simple and general, and there are usually two kinds of inherent constraints involving channel routing problem: horizontal constraint and vertical constraint. Simple channel instances do not contain any vertical constraint, whereas, general channel instances contain both horizontal as well as vertical constraints. Most of the optimization problems in two-, three-, and multi-layer channel routing are NP-hard and, in fact, very few are polynomial time computable. Hence for each of the NP-hard problems in channel routing, it is unlikely to design a polynomial time deterministic algorithm. Developing heuristic algorithm may be a probable way out that hopefully provides good solutions for most of the instances available in literature. Novelty of a heuristic algorithm is judged better if it works for a variety of large number of randomly generated instances of the problem.

Necessary and sufficient conditions for the routability of classical channels

This paper presents a "preprocessor" which separates a channel routing problem into two subproblems. One is a specialized channel routing problem where no two nodes of two different nets are of the same y-grid position. The other is a problem of connecting pairs of nodes where each pair of nodes has a path reserved for it. The use of a "preprocessor" in channel routing [5] is justified by the comparison of routing results.

Channel routing for strictly multiterminal nets

Wireless mesh networks are being deployed all around the world both to provide ubiquitous connection to the Internet and to carry data generated by several services (video surveillance, smart grids, earthquake early warning systems, etc.). In those cases where fixed power connections are not available, mesh nodes operate by harvesting ambient energy (e.g., solar or wind power) and hence they can count on a limited and time-varying amount of power to accomplish their functions. Since we consider mesh nodes equipped with multiple radios, power savings and network performance can be maximized by properly routing flows, assigning channels to radios and identifying nodes/radios that can be turned off . Thus, the problem we address is a joint channel assignment and routing problem with additional constraints on the node power consumption, which is NP-complete. In this paper, we propose a heuristic, named minimum power channel assignment and routing algorithm (MP-CARA), which is guaranteed to return a local optimum for this problem. Based on a theoretical analysis that we present in the paper, which gives an upper bound on the outage probability as a function of the constraint on power consumption, we can guarantee that the probability that a node runs out of power with MP-CARA falls below a desired threshold. The performance of MP-CARA is assessed by means of an extensive simulation study aiming to compare the solutions returned by MP-CARA to those found by other heuristics proposed in the literature.

Channel routing problem is an important, time consuming and difficult problem in VLSI layout design. In this paper, we consider the two-terminal channel routing problem in a new routing model, called knock-knee diagonal model, where the grid consists of right and left tracks displayed at +45° and –45°. An optimum algorithm is presented, which obtains d + 1 as an upper bound to the channel width, where d is the channel density.

As the very large scale integration (VLSI) technology approaches its fundamental scaling limit at about 0.2 /spl mu/m, it is reasonable to consider three-dimensional (3-D) integration to enhance packing density and speed performance. With additional functional units packed into one chip in a 3-D space, computer-aided design (CAD) tools are demanded to ease the complicated design work. This paper presents a 100% completion achievable routing methodology. The routing methodology is based on the two-dimensional (2D) channel routing methodology; thus, it is called a 3-D channel routing methodology. With the routing methodology, a 3-D routing problem is decomposed into two 2D routing subproblems: intra-layer routing that interconnects terminals on the same layer, which can be done by using a 2-D channel router, and inter-layer routing that interconnects terminals on different layers. The inter-layer routing problem is transformed into a 2-D channel routing problem and the transformation is made in some 3-D channels. Detailed discussions are given for the 3-D to 2-D transformation. Optimization of the transformation is shown to be NP-complete. Thus, simulated annealing is used to optimize the transformation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

In the channel routing problem, terminals between cells are interconnected completely while reducing channel routing area. The crossing number, the number of crossings between two wires in the channel, is related to the channel routing area. In this paper, we present a parallel algorithm finding a maximum crossing number, density, in the channel by using a LARPBS model (Linear Array with a Reconfigurable Pipelined Bus System), which is based on the advanced fiber optic technology. The maximum crossing number algorithm on the LARPBS model runs in O(n) time using O(n) number of processors, where n is the number of nets in a channel.

We present an algorithm to find a set of all optimal solutions for a channel placement problem. A channel consists of two rows of horizontal line segments (representing components). Each line segment contains some terminals with fixed positions. Sets of terminals, called nets, are to be connected. The relative ordering of line segments in each row is fixed. The line segments can be shifted left or right, which will affect the width needed for routing and the length of the channel. We want to find the tradeoff between channel length and routing width. Since the channel routing problem is NP-complete, we use a lower bound on routing width, called density. The density of a placement is the maximum number of nets crossing each vertical cut. We can increase the total length to minimize the channel density, or minimize the total length by increasing the channel density. The pair (density, total length) is called the shape of a placement. A shape is minimal if a decrease in density would cause an increase in total length, and vice versa. Our algorithm computes all the minimal shapes in O (N 4 ) time, where N is the number of nets. This is the first known algorithm for this problem whose running time is polynomial in the number of nets and independent of the length of the channel.

The channel routing problem is solved using a massively parallel processor based on the artificial neural system (ANS) computational model. In this model the functional behavior of the human designer is emulated by expressing problem constraints as interconnection weights between neural cells (computational elements), using very simple computational elements for neural cells and massive parallelism to solve problems. The algorithm constraints are expressed as interconnection weights. By making the artificial neural cells work collectively on a task, a solution is obtained after each of the neural cells settles to a stable state. >

In the channel routing problem, a problem arising in the design of layout systems, two rows of terminals which are opposite each other, have to be connected. We study what effect the rotation of one row of terminals has on the cost measures of the routing phase. The cost measures we consider are the density, which is proportional to the width of the channel, the crossing number, which is closely related to the number of crossings between two wires in the channel, and the length of nets, which is related to the wire length needed in the routing. We present algorithms for determining the rotations which minimize each of these cost measures. The algorithms can also be used for solving optimal offset problems.

Study of algorithms and its design can be progressed in various dimensions. In this paper, we have a definite refinement of lower bound on the number of tracks required to route a channel. The attack is from a complementary viewpoint. Our algorithm succeeds to avoid all kind of approximation. The approach performs exact mapping of the problem into graphical presentation and analyzes the graph taking help of mimetic algorithm, which uses combination of sequential and GA based vertex coloring. Performance of the algorithm depends on how effectively mimetic approach can applied selecting appropriate values for the parameters to evaluate the graphical presentation of the problem. This viewpoint has immense contribution against sticking at local minima for this optimization problem. The finer result clearly exemplifies instances, which give better or at least the same lower bound in VLSI channel routing problem.Key wordsManhattan Routing modelChannel routing problemConstraint graphsMaximum Independent setMimetic algorithm

Soft errors (SEs) are a type of transient errors in integrated circuits (ICs) caused by radiation effects in the chips. They have become the major concern in IC design process in each CMOS technology generation since the decrease in supply voltage levels for shrinking transistor sizes makes the circuits more vulnerable than before. Previous studies generally use hardware redundancy for combinational circuits and error correcting codes for memory elements to mitigate or eliminate the SEs. However, adding extra hardware in final design may not always be possible if the design has tight area constraints. Different implementations of the same function may have different soft error rates (SERs) due to their error masking capabilities. Therefore, we can obtain various versions of the same function with different area, latency, and reliability values. Allocating the best resources to the operations of the design under area and latency constraints to optimize the overall system reliability has NP-complete time complexity. Evolutionary computing-based methods suit very well for this optimization problem. Motivated by this fact, in this paper, we present a genetic algorithm (GA)-based design method to increase the reliability of application-specific integrated circuits (ASICs). In this method, we use different versions of the same resources, each having a different area, latency, and reliability values. The goal of the GA-based optimizer is to allocate the best available resources to the application nodes to maximize the reliability of the design under tight area and latency constraints. Our experimental results show that we achieve up to 20.86% reliability improvement against a heuristic method with no additional area overhead. In order to further increase the reliability of the final design, we also propose a heuristic-based post-processing method, which adds duplicate resources to the final design without violating the constraint.

An efficient merger of the channel routing theory and the genetic stochastic search introduces a new paradigm for VLSI channel routing. The feasibility of the paradigm is demonstrated by the first genetic router for Manhattan model channels which contain cyclic vertical constraints. The router has been implemented as a self contained genetic algorithm system. It creates an initial population without violations of constraints using the results of a new theory of locally optimal breaking of cyclic vertical constraints. The population size is problem instance dependent to provide for the preservation of the structural diversity which is built into the initial population. A new encoding scheme and novel crossover and mutation operators are introduced. Convergence rates to optimal solutions are excellent.

In Cognitive Radio Mesh Networks (CogMesh), Secondary Mesh Routers (SMRs) can opportunistically utilize the licensed spectrums for the traffic of the Secondary Mesh Users (SMUs). How to guarantee Quality of Service (QoS) for real-time services over CogMesh is still an opening issue. In this paper, we present a discrete-time vacation queueing system to abstract the Primary User (PU) interruption to SMR data transmission. Moreover, we formulate the optimization problem of joint channel selection and routing, to achieve minimum end-to-end delay for SMR while guaranteeing the channel unavailability. A heuristic method is proposed to solve this problem and results show our proposed method performs the closest to the scheme using optimization tool, and outperforms the minimal unavailability scheme and minimal delay scheme in terms of end-to-end delay and solution rate.Keywordscognitive radio mesh networksreal-time servicesvacation queueingchannel selection