Maximum crossing number algorithm on linear array with a reconfigurable pipelined bus system

In this paper, we present deterministic and probabilistic methods for simulating PRAM computations on linear arrays with reconfigurable pipelined bus systems (LARPBS). The following results are established in this paper. (1) Each step of a p-processor PRAM with meO(p) shared memory cells can be simulated by a p-processors LARPBS in O(log p) time, where the constant in the big-O notation is small. (2) Each step of a p-processor PRAM with meΩ(p) shared memory cells can be simulated by a p-processors LARPBS in O(log m) time. (3) Each step of a p-processor PRAM can be simulated by a p-processor LARPBS in O(log p) time with probability larger than 1−1/p^c for all c>0. (4) As an interesting byproduct, we show that a p-processor LARPBS can sort p items in O(log p) time, with a small constant hidden in the big-O notation. Our results indicate that an LARPBS can simulate a PRAM very efficiently.

We present two fast algorithms for sorting on a linear array with a reconfigurable pipelined bus system (LARPBS), one of the recently proposed parallel architectures based on optical buses. In our first algorithm, we sort N numbers in O(log N log log N) worst-case time using N processors. In our second algorithm, we sort N numbers in O((log log N)/sup 2/) worst-case time using N/sup 1+/spl epsi// processors, for any fixed /spl epsi/ such that 0 < /spl epsi/ < 1. Our algorithms are based on a novel deterministic sampling scheme for merging two sorted arrays of length N each in O(log log N) time on an LARPBS with N processors. To our knowledge, the previous best sorting algorithm on this architecture has a running time of O((log N)/sup 2/) using N processors.

We present a fast algorithm for sorting on a linear array with a reconfigurable pipelined bus system (LARPBS), one of the recently proposed parallel architectures based on optical buses. Our algorithm sorts N numbers in O(log N log logN) worst-case time using N processors. To our knowledge, the previous best sorting algorithm on this architecture has a running time of O(log2N).KeywordsLinear ArrayRecursive CallSorting AlgorithmMerging AlgorithmDestination ProcessorThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Efficient and scalable quicksort on a linear array with a reconfigurable pipelined bus system

In this paper, we present an efficient deterministic algorithm for sorting on the LARPBS (Linear Array with a Reconfigurable Pipelined Optical Bus System) model. Our sorting algorithm sorts n general keys in O(logn) time on a LARPBS of size nslogn. The previous best results can sort n items in O(lognloglogn) worst-case time using n processors or sort n items in O((log logn2)worst-case time using n1+ processors. Our algorithm is also scalable to certain extent. When the system size is reduced to nslogn/r for l≤r≤logn, the total computation time is O(rlogn).

We present efficient parallel matrix multiplication algorithms for linear arrays with reconfigurable pipelined bus systems (LARPBS). Such systems are able to support a large volume of parallel communication of various patterns in constant time. An LARPBS can also be reconfigured into many independent subsystems and, thus, is able to support parallel implementations of divide-and-conquer computations like Strassen's algorithm. The main contributions of the paper are as follows. We develop five matrix multiplication algorithms with varying degrees of parallelism on the LARPBS computing model; namely, MM/sub 1/, MM/sub 2/, MM/sub 3/, and compound algorithms C/sub 1/(/spl epsiv/)and C/sub 2/(/spl delta/). Algorithm C/sub 1/(/spl epsiv/) has adjustable time complexity in sublinear level. Algorithm C/sub 2/(/spl delta/) implies that it is feasible to achieve sublogarithmic time using /spl sigma/(N/sup 3/) processors for matrix multiplication on a realistic system. Algorithms MM/sub 3/, C/sub 1/(/spl epsiv/), and C/sub 2/(/spl delta/) all have o(/spl Nscr//sup 3/) cost and, hence, are very processor efficient. Algorithms MM/sub 1/, MM/sub 3/, and C/sub 1/(/spl epsiv/) are general-purpose matrix multiplication algorithms, where the array elements are in any ring. Algorithms MM/sub 2/ and C/sub 2/(/spl delta/) are applicable to array elements that are integers of bounded magnitude, or floating-point values of bounded precision and magnitude, or Boolean values. Extension of algorithms MM/sub 2/ and C/sub 2/(/spl delta/) to unbounded integers and reals are also discussed.

The optical bus based arrays have recently shown many applications. In this paper we use the pipelining ability of the LARPBS to solve the repetitions detection problem. We propose an algorithm that finds all kind of repetitions in a string including k-power repetitions, overlapping repetitions and non-contiguous repetitions. For a given distance, this operation is performed in O(1) communication cycle with a constant computation time processors on a O(n) processors LARPBS for a string of length n. For all the periods, it is O(n) bus cycle. No previous algorithms were known for this problem on the LARPBS.

Almost all of the existing two-dimensional block-based medial axis transform (2D_BB_MAT) parallel algorithm are devised for solving the 2D_BB_MAT problem only and are very difficult to extend to a solution of the 3D_BB_MAT problem in parallel. In this paper, we propose efficient O(1) time algorithms for solving the hD_BB_MAT problems, where h is 2 or 3, on the linear array with a reconfigurable pipelined bus system (LARPBS) model. The proposed 2D_BB_MAT algorithm can easily extend to a solution of the 3D_BB_MAT problem in parallel by reducing the hD_BB_MAT problems to the forward chessboard distance transform problems. To the best of our knowledge, the proposed algorithms are the most efficient O(1) time algorithms compared with all the previously published algorithms known.

We present an algorithm to find a set of all optimal solutions for a channel placement problem. A channel consists of two rows of horizontal line segments (representing components). Each line segment contains some terminals with fixed positions. Sets of terminals, called nets, are to be connected. The relative ordering of line segments in each row is fixed. The line segments can be shifted left or right, which will affect the width needed for routing and the length of the channel. We want to find the tradeoff between channel length and routing width. Since the channel routing problem is NP-complete, we use a lower bound on routing width, called density. The density of a placement is the maximum number of nets crossing each vertical cut. We can increase the total length to minimize the channel density, or minimize the total length by increasing the channel density. The pair (density, total length) is called the shape of a placement. A shape is minimal if a decrease in density would cause an increase in total length, and vice versa. Our algorithm computes all the minimal shapes in O (N 4 ) time, where N is the number of nets. This is the first known algorithm for this problem whose running time is polynomial in the number of nets and independent of the length of the channel.

In the channel routing problem, a problem arising in the design of layout systems, two rows of terminals which are opposite each other, have to be connected. We study what effect the rotation of one row of terminals has on the cost measures of the routing phase. The cost measures we consider are the density, which is proportional to the width of the channel, the crossing number, which is closely related to the number of crossings between two wires in the channel, and the length of nets, which is related to the wire length needed in the routing. We present algorithms for determining the rotations which minimize each of these cost measures. The algorithms can also be used for solving optimal offset problems.

An important part of the integrated circuit design process is the channel routing stage, which determines how to interconnect components that are arranged in sets of rows. The channel routing problem has been shown to be NP-complete, thus this problem is often solved using genetic algorithms. The traditional objective for most channel routers is to minimize total area required to complete routing. However, another important objective is to minimize signal propagation delays in the circuit. This paper describes the development of a genetic channel routing algorithm that uses a Pareto-optimal approach to accommodate both objectives. When compared to the traditional channel routing approach, the new channel router produced layouts with decreased signal delay, while still minimizing routing area.

In this paper we have developed algorithms for generating random channel instances for their use in computing channel routing solutions in VLSI physical design. Channel instances are usually of two types: simple and general, and there are usually two kinds of inherent constraints involving channel routing problem: horizontal constraint and vertical constraint. Simple channel instances do not contain any vertical constraint, whereas, general channel instances contain both horizontal as well as vertical constraints. Most of the optimization problems in two-, three-, and multi-layer channel routing are NP-hard and, in fact, very few are polynomial time computable. Hence for each of the NP-hard problems in channel routing, it is unlikely to design a polynomial time deterministic algorithm. Developing heuristic algorithm may be a probable way out that hopefully provides good solutions for most of the instances available in literature. Novelty of a heuristic algorithm is judged better if it works for a variety of large number of randomly generated instances of the problem.

Necessary and sufficient conditions for the routability of classical channels

Channel routing for strictly multiterminal nets

This paper presents a "preprocessor" which separates a channel routing problem into two subproblems. One is a specialized channel routing problem where no two nodes of two different nets are of the same y-grid position. The other is a problem of connecting pairs of nodes where each pair of nodes has a path reserved for it. The use of a "preprocessor" in channel routing [5] is justified by the comparison of routing results.