Interprocedural partial redundancy elimination and its application to distributed memory compilation

Partial redundancy elimination (PRE) is a key technology for modern compilers. However traditional approaches are conservative and fail to exploit many opportunities for optimization. New PRE approaches which greatly increase the number of eliminated redundancies have been developed. However, they either cause the code size to explode or they cannot handle statements with side-effects. In this paper we describe a predicated partial redundancy elimination (PPRE) approach which can potentially remove all partial redundancies. To avoid performance overheads caused by predication, PPRE is applied selectively based on a cost model. The cost analysis presented in the paper utilizes probabilistic data-flow information to decide whether PPRE is profitable for each instance of a partially redundant computation. Refinements of the basic PPRE transformation are described in detail. In contrast to some other approaches our transformation is strictly semantics preserving.

Partial redundancy elimination (PRE) is an interesting compiler optimization because of its effectiveness and generality. Among many PRE algorithms, the one in static single assignment form (SSAPRE) has benefits over other bit-vector-based PRE algorithms. It preserves the properties of the SSA form after PRE and exploits the sparsity of the SSA form, resulting in reduced analysis and optimization time. This paper presents a practical improvement of the SSAPRE algorithm that further reduces the analysis and optimization time. The underlying idea is removing unnecessary Φ’s during the Φ-Insertion phase that is the first step of SSAPRE. We classify the expressions into three categories: confined expressions, local expressions, and the others. We show that unnecessary Φ’s for confined and local expressions can be easily detected and removed. We implement our locality-based SSAPRE algorithm in a C compiler and evaluate its effectiveness with 20 applications from SPEC benchmark suites. In our measurements, on average 91% of Φ’s identified by the original demand-driven SSAPRE algorithm are unnecessary for PRE. Pruning these unnecessary Φ’s in the Φ-Insertion phase makes our locality-based SSAPRE algorithm 1.8 times faster, on average, than the original SSAPRE algorithm.

We develop an expansion-based algorithm for semantic partial redundancy elimination (SPRE), which overcomes the central drawbacks of the state-of-the-art approaches, which leave the program structure invariant: they fail to eliminate all partial redundancies even for acyclic programs. Besides being optimal for acyclic programs, our algorithm is unique in eliminating all partial k-redundancies, a new class of redundancies which is characterised by the number k of loop iterations across which values have to be kept. These optimality results come at the price of an in the worst case exponential program growth. The new technique is thus tailored for optimizing the typically considerably small computational “hot” spots of a program. Here it is particularly promising because its structural simplicity supports extensions to uniformly capture further powerful optimisations like constant propagation or strength reduction in a mutually supportive way.

Research in bidirectional data flow analysis seems to have come to a halt due to an impression that the case for bidirectional data flow analysis has been considerably weakened by a plethora of investigations based on decomposability of known bidirectional placement algorithms into a sequence of purely unidirectional components. This paper shows that the approach of decomposability is not general enough in that it derives its power from the simplifying graph transformation of edge-splitting and the favourable nature of flows in partial redundancy elimination (PRE). This follows from the fact that in the absence of edge-splitting, PRE cannot be performed using a sequence of cascaded unidirectional flows. Further, edge-splitting inherently converts data flows involved in PRE into unidirectional flows. In our opinion, this obviates the need of an alternative formulation. We also show that edge-splitting cannot convert data flows involved in "truly" bidirectional data flow problems into unidirectional flows. Thus not every bidirectional data flow problem can be converted into unidirectional flows. Besides, we argue that the premise that bidirectional analysis is more complex than unidirectional analysis, is invalid. We also mention some issues in bidirectional data flow analysis which need to be investigated.

Instruction schedulers employ code motion as a means of instruction reordering to enable scheduling of instructions at points where the resources required for their execution are available. In addition, driven by the profiling data, schedulers take advantage of predication and speculation for aggressive code motion across conditional branches. Optimization algorithms for partial dead code elimination (PDE) and partial redundancy elimination (PRE) employ code sinking and hoisting to enable optimization. However, unlike instruction scheduling, these optimization algorithms are unaware of resource availability and are incapable of exploiting profiling information, speculation, and predication. In this paper we develop data flow algorithms for performing the above optimizations with the following characteristics: (i) opportunities for PRE and PDE enabled by hoisting and sinking are exploited; (ii) hoisting and sinking of a code statement is driven by availability of functional unit resources; (iii) predication and speculation is incorporated to allow aggressive hoisting and sinking; and (iv) path profile information guides predication and speculation to enable optimization.

Partial redundancy elimination (PRE) is one of the most important and widespread optimizations in compilers. However, current PRE-techniques are inadequate to handle predicated code, i.e., programs where instructions are guarded by a 1-bit register that dynamically controls whether the effect of an instruction should be committed or nullified. In fact, to exclude corrupting the semantics they must be overly conservative making them close to useless. Since predicated code will be more and more common with the advent of the IA-64 architecture, we present here a family of PRE-algorithms tailored for predicated code. Conceptually, the core element of this family can be considered the counterpart of busy code motion of [17]. It can easily be tuned by two orthogonal means. First, by adjusting the power of a preprocess feeding it by information on predication. Second, by relaxing or strengthening the constraints on synthesizing predicates controlling the movability of computations. Together with extensions towards lazy code motion, this results in a family of PRE-algorithms spanning a range from tamed to quite aggressive algorithms, which is illustrated by various meaningful examples.

Cobalt: A Language for Writing Provably-Sound Compiler Optimizations

The topic of indoor positioning and indoor navigation by using observations from smartphone sensors is very challenging as the determined trajectories can be subject to significant deviations compared to the route travelled in reality. Especially the calculation of the direction of movement is the critical part of pedestrian positioning approaches such as Pedestrian Dead Reckoning (“PDR”). Due to distinct systematic effects in filtered trajectories, it can be assumed that there are systematic deviations present in the observations from smartphone sensors. This article has two aims: one is to enable the estimation of partial redundancies for each observation as well as for observation groups. Partial redundancies are a measure for the reliability indicating how well systematic deviations can be detected in single observations used in PDR. The second aim is to analyze the behavior of partial redundancy by modifying the stochastic and functional model of the Kalman filter. The equations relating the observations to the orientation are condition equations, which do not exhibit the typical structure of the Gauss-Markov model (“GMM”), wherein the observations are linear and can be formulated as functions of the states. To calculate and analyze the partial redundancy of the observations from smartphone-sensors used in PDR, the system equation and the measurement equation of a Kalman filter as well as the redundancy matrix need to be derived in the Gauss-Helmert model (“GHM”). These derivations are introduced in this article and lead to a novel Kalman filter structure based on condition equations, enabling reliability assessment of each observation.

When analyzing programs for value recomputation, one faces the problem of naming the value that flows between equivalent computations with different lexical names. This paper presents a data-flow analysis framework that overcomes this problem by synthesizing a name space tailored for tracing the values whose flow is of interest to a given data-flow problem. Furthermore, to exploit recomputation of a value with multiple, synonymous names, path-sensitive value numbering on the synthetic name space is developed. Optimizations that rely on value flow to detect redundant computations, such as partial redundancy elimination and constant propagation, become more powerful when phrased in our framework.The framework is built on a new program representation called Value Name Graph (VNG) which gains its power from integrating three orthogonal techniques: symbolic back-substitution, value numbering, and data-flow analysis. Our experiments with the implementation show that analysis on the VNG is practical in both time and space.

Recently, SPARK parallelizing high-level synthesis software tool has been developed. It takes a behavioral ANSI-C code as an input, schedules it using speculative code motions and loop transformations, generates a finite state machine for the scheduled design graph, and then finally outputs a synthesizable RTL VHDL code. To handle loop algorithm, SPARK employs various loop transformations such as loop invariant code motion, loop unrolling, loop index variable elimination and loop shifting. In loop synthesis, however, SPARK does not produce circuit description whose quality can compete with manual designs. With the objective of improving the quality of high-level synthesis results for designs with loops, this paper shows an upgrade of SPARK through transforming nested loops into a 2-D systolic array to increase parallelism. The C-to-VHDL loop synthesis in this paper achieves synthesis results that are better than those achieved from a current version of SPARK for matrix-matrix multiplication and FIR filter, and can be incorporated into SPARK parallelizing high-level synthesis framework.KeywordsNest LoopSystolic ArrayTotal Execution TimeHardware ComplexitySynthesis ResultThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

This paper presents a unified framework for program optimization which subsumes (i) Loop invariant code motion, (ii) Common subexpression elimination, and (iii) Strength reduction. Use of this framework is shown to eliminate the control flow analysis costs and to widen the scope of conventional strength reduction.

We present an approach for implementing a formally certified loop-invariant code motion optimization by composing an unrolling pass and a formally certified yet efficient global subexpression elimination. This approach is lightweight: each pass comes with a simple and independent proof of correctness. Experiments show the approach significantly narrows the performance gap between the CompCert certified compiler and state-of-the-art optimizing compilers. Our static analysis employs an efficient yet verified hashed set structure, resulting in the fast compilation.

The traditional tradeoff when performing dynamic compilation is that of fast compilation time versus fast code performance. Most dynamic compilation systems for Java perform selective compilation and/or optimization at a method granularity. This is the not the optimal granularity level. However, compiling at a sub-method granularity is thought to be too complicated to be practical. This paper describes a straightforward technique for performing compilation and optimizations at a finer, sub-method granularity. We utilize dynamic profile data to determine intra-method code regions that are rarely or never executed, and compile and optimize the code without those regions. If a branch that was predicted to be rare is actually taken at run time, we fall back to the interpreter or dynamically compile another version of the code. By avoiding compiling and optimizing code that is rarely executed, we are able to decrease compile time significantly, with little to no degradation in performance. Futhermore, ignoring rarely-executed code can open up more optimization opportunities on the common paths. We present two optimizations---partial dead code elimination and rare-path-sensitive pointer and escape analysis---that take advantage of rare path information. Using these optimizations, our technique is able to improve performance beyond the compile time improvements

Over the last year, a considerable portion of FEFLO, a general-purpose legacy CFD code operating on unstructured grids, was ported to run on GPUs. Like so many other legacy codes, FEFLO is an adaptive, edge-based nite element code for the solution of compressible and incompressible ow, which was primarily written in Fortran 77 and has previously been ported to vector, shared memory parallel and distributed memory parallel machines. Due to the large size of FEFLO and the likelihood of human error in porting, as well as the desire for continued development within a single codebase, a specialized Python script, based on FParser (Peterson, 2009), was written to perform automated translation from the OpenMP-parallelized loops to GPU kernels implemented in CUDA, along with GPU memory management, while integrating with the existing framework for distributed memory parallelism via MPI. The present paper describes extensions of the script and algorithmic techniques that enable the ecient running on GPUs of the modules that are not straightforward to port. In particular, we consider LU-SGS algorithms, linelet preconditioning and particle-mesh algorithms.

Distributed memory parallel machines are increasingly being used by the scientific community to provide computational power for solving problems. Building a distributed memory parallel machine offers a tremendous advantage in terms of cost and scalability over building a shared memory parallel machine. Unfortunately, distributed memory machines are much more difficult to program, mainly due to the lack of a single global address space. Communication between processors in a distributed memory machine is accomplished by message passing. The time cost for acquiring data from another processor's memory is significantly greater than the time cost of acquiring data from local memory. To assist the programmer in using a distributed memory machine, compilers have been developed which alleviate the need for the programmer to manage the lack of a global address space. These compilers will generate semantically correct code containing communication routines to produce a logically shared memory machine on a physically distributed memory machine. However, the runtime performance of the code emitted from some of these compilers can be further improved. This thesis is primarily concerned with advanced compilation techniques which will provide better runtime performance of programs written in imperative languages for regular scientific programs. The optimization of communication generation for distributed memory machines is used to produce this result. We look at two "state of the art" compilation systems and find that improvement in the communication code generated by these compilers is still possible. We have simplified existing descriptions of the various formalisms found in these compilers, while still providing enough formalism to study the problems in depth. We have extended some existing optimization techniques by enhancing the elimination of masks, by extending the notion of relaxing the owner computes rule, by extending the notion of replicating computation, and by extending the notion of replicating data. This thesis has discussed a novel technique to split loops so that they do not contain any guarded statements. Finally, we have suggested avenues for future research, as it is clear from this thesis that more work is required before compilation systems for distributed memory parallel machines will be widely used for general purpose computing.