Investigating copper wire bonding technology in Chip-on-Board applications

Solder joint reliability is dependent on both thickness and morphology of the intermetallics that form and grow at the solder joint interface during soldering and subsequent thermal ageing and examining the morphology of these intermetallics is of great importance. The focus of this paper is to present experimental results of a comprehensive study of the interfacial reactions during soldering of Sn-Ag-Cu lead-free solders on copper (Cu), immersion silver (ImAg), electroless nickel/ immersion gold (ENIG) and electroless nickel/ electroless palladium/ immersion gold (ENEPIG) surface finishes. Using scanning electron microscopy detailed a study of the 3-D morphology and grain size of the intermetallics was conducted. The results showed that when soldering on ENIG and ENEPIG finishes several morphologies of intermetallics with different grain sizes form at the solder joint interface compared to a single intermetallic morphology that forms when soldering on copper and immersion silver. An attempt was made to discuss the effect of several factors that may have an influence on the type of morphology the intermetallics may grow into. The results obtained in the present investigation also revealed that the technique of removing the solder by deep etching to examine the morphology of intermetallics is a convenient and efficient method to investigate the intermetallics formed at the solder joints.

High-throughput assembly technologies to form Copper (Cu) interconnections without solders at below 200°C, and pitch below 40µm has been a major challenge in the semiconductor industry. A unique solution has been demonstrated by Georgia Institute of Technology to overcome this grand challenge. This technology utilizes thermocompression bonding to form copper interconnections with process tolerances to accommodate non-coplanarities of bumps and warpage of the substrate, without solders. The bonding pressure applied for thermocompression was 365MPa, to enable Cu bump collapse by 3µm. As thermocompression bonders are generally force-limited to 400N, such high bonding pressures may hinder scalability of this technology to fine pitches with higher I/O densities. This paper addresses this manufacturability challenge with the novel Electroless Palladium Autocatalytic Gold (EPAG) surface finish instead of the standard Electroless Nickel Immersion Gold (ENIG) or Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG) finish, previously used to prevent Cu oxidation for bonding load reduction down to 120MPa.

The technology of surface finishes for printed circuit boards is seeing a dramatic shift from the Hot Air Solder Levelling (HASL) towards alternative finishes like electroless Nickel - immersion gold (ENIG), immersion tin, immersion silver and organic solder preservatives (OSP's). This trend is mainly caused by the worldwide environmental pressure to ban the use of lead for electronic assemblies as well as the demands of modern assembly technology, which require a higher coplanarity of the surface finish for surface mount assembly. One of the main benefits of HASL is the extremely good resistance of the surface against ageing under high temperature conditions. Alternative finishes, due to their limited thickness, offer excellent coplanarity, but inferior surface protection. A detailed understanding of the ageing processes is thus a prerequisite for the implementation of alternative surface finishes in high yield PCB production. In this paper the ageing characteristics of immersion tin surface finishes are investigated and correlated with the reliability during soldering operations. Ageing of tin surface finishes takes place by intermetallic compound (IMC) formation at the Sn/Cu interface due to solid state diffusion. Hence the kinetics of the process is assumed to follow a simple law. The kinetics of IMC formation was investigated experimentally and correlated with data from literature. The results show that the simple kinetic model leads to an overestimation of the kinetics in the temperature regime below 60°C. Changes in the reaction mechanism with temperature as well as with time must be taken into account for a conclusive understanding of the ageing characteristics. The only parameter with relevance for practical solderability is the thickness of the immersion tin layer.

A CMOS compatible electroless plating process for Under Bump Metallization was compared with a conventional non-CMOS compatible process. The basic plating process consisted of depositing ENEPIG (Electroless Nickel – Electroless Palladium – Immersion Gold) onto the Al-Cu wafer pads. Testing was performed on the deposits including GD-OES (Glow Discharge Optical Emission Spectroscopy), bump shear testing for adhesion, ball pull testing for solder joint reliability, and wire bond testing. Results showed that mobile ions present in the pre-treatment process left no detectable mobile ions (Na, K) on the deposit structure and presumably will not affect chip performance. Mobile ions present in the electroless nickel solution, however, did result in mobile ions being present at the Al-Ni interface which may negatively affect performance. Little to no mobile ions were deposited from the electroless palladium step. The non-CMOS compatible immersion gold process did result in mobile ions being present in the gold deposit.

During the reflow process of In-3Ag solder ball grid array (BGA) packages with electroless nickel immersion gold (ENIG) and immersion silver (ImAg) surface finishes, continuous (Au0.9Ni0.1)In2 and scallop-shaped (Ag0.9Cu0.1)In2 intermetallic layers form at the interfaces of In-3Ag solder with Au/Ni/Cu and Ag/Cu pads, respectively. The (Au0.9Ni0.1)In2 layer breaks into clusters with increases in the aging time and temperature. Aging at 115 °C results in the formation of an additional continuous Ni10In27 layer on the Ni/Cu pads and the migration of (Au0.9Ni0.1)In2 intermetallic clusters into the solder matrix. In contrast, the (Ag0.9Cu0.1)In2 scallops grow into a continuous layer after aging treatment. Accompanying the interfacial reactions, AgIn2 precipitates in the interior of In-3Ag solder balls and coarsens during aging, causing the ball shear strengths of reflown ENIG (1.18 N) and ImAg (1.11 N)-surface-finished solder joints to decrease gradually. However, the migration of (Au0.9Ni0.1)In2 clusters into the solder matrix of ENIG-surface-finished In-3Ag packages leads to an increase in their ball shear strengths after aging at 115 °C over 300 h. Both the ENIG- and ImAg-surface-finished In-3Ag solder joints, after ball shear tests, have fractured across the solder balls with ductile characteristics.

The performance expectations for printed circuit board surface finishes are greater than just solderability preservation. Historically, final finishes were designed solely to protect copper from oxidation prior to the soldering of components. Now the expectations are much greater; superior solderability, contact performance, wire bondability, corrosion resistance, and all this must be achieved at low cost For the past few years the electronics industry has been investigating the effects of harsh environments on printed circuit assemblies. The general consensus is that the environments electronics experience today are particularly aggressive, being frequently exposed to high levels of contaminants such as sulfur, sulfide, SO x and NO x. One common surface finish now frequently used in the electronics industry is immersion silver. The popularity of this technology has increased over the last decade and now likely accounts for about 10-15% of final finish market. The popularity of immersion silver is driven by factors such as, excellent solderability, very low contact resistance, easy of assembly and testing, and it is a relatively low cost option. As mentioned above, electronic components are now frequently exposed to harsh, corrosive environmental and use conditions. Long term exposure to such environments can result in the onset of varying degrees of corrosion phenomena, such as creeping corrosion, peeling and coating tarnish. These phenomena can be mitigated by the adoption of best application practices and assembly processing, in conjunction with the use of specially formulated anti-corrosion coatings. A widely used alternative to the above that is frequently used for demanding, high reliability applications, is electroless nickel-immersion gold (ENIG). This technology also is not without its problems. A common example, which can arise through the use of a poorly formulated process, is the well known phenomenon of “black line nickel”. This issue has been of significant concern to the electronics industry for some time and has damaged the reputation of ENIG as a final finish, even limiting in some cases its wider adoption. With all of the above in mind and taking into account the very high price gold can achieve on the open market (which is currently in excess of $1100 per troy ounce) the industry is looking for an alternative final finish. Ideally, a suitable alternative would retain the positive features of the ENIG process whilst, at the same time, eliminate the black line nickel concern and, of course, be economical. This paper describes such a process, electroless nickel-immersion silver. Careful choice of the electroless nickel, and immersion silver processes results in a surface finish that has superior performance while remaining low cost.

Copper wire bond remains a challenge especially on bond pads with sensitive pad metallization. Extensive work and analysis are needed at the onset of the packaging development phase to meet the right level of manufacturability and reliability requirement. Wire bond related issue is not uncommon even after qualification and after years in high volume manufacturing. The process development gets even tougher for finer wire diameter, bond pads with less than 1μm aluminum thickness and of higher via density structure. A workable wire bond process window is needed upfront. Key is to have a window defined to balance between pad cratering and lifted ball bond due to the harder property of the copper wire. Wire bond process optimization commonly focus around bond time, bond force and bond power (USG). Other factors generally evaluated for copper wire bonding include incoming bond pad cleanliness, bonding pad surface oxidation, wire oxidation during EFO and forming gas flow rate. A lesser known variable, die attach, is often overlooked in packaging or gold to copper wire conversion. Die attach material out gassing at cure is a common hypothesis whenever there is bond pad surface contamination issue. But with the advancement in technology and new material development, out gassing risk is low if the material is cured per the supplier recommendation. Therefore, investigation on weak bond is generally focused more on the wire bond process and incoming bonding pad condition rather than the die attach material. In this paper, investigation on non stick and copper wire bond was carried out. A well defined copper wire bond process on sensitive bonding pads is developed using statistical approach in the form of design of experiment (DOE) and response surface methodology (RSM). Surface analysis methodology using SEM, EDS and AES were also utilized to check for bond pad contamination. To understand deeper into the issue and mechanics of the failure, process mapping and brainstorming sessions have also been carried out. Variables involving wafer saw, pre-wire bond plasma, different batches of wafers, die attach bond line thickness and tilt variation have all been studied thoroughly. Eventually, the root cause of copper wire bond issue been identified to be die attach material related. A strong correlation has been found between lifted wire and the die attach material modulus. There is no more lifted ball concern after changing of the die attach material to a material of a suitable modulus. There is no significant difference in the die attach bond line thickness, coverage and voids among others, comparing with the original die attach material. All the wire bond responses including pad cratering, Al-Cu intermetallic (IMC), wire pull and ball shear have been validated to have no issue at a larger sample size. Reliability assessment in the form of preconditioning, temperature cycling and bias HAST have also passed with no sign of interfacial mechanical failure or test failure. The modulus of elasticity of the die attach material is important and must be a key consideration in copper wire qualification. The elasticity of the material changes from room temperature to copper wire bonding temperature. A low modulus at the bonding temperature can cause wire bondability problem such as lifted ball bond due to ultrasonic power loss during ball bonding. Therefore, selection of a die attach material with a suitable range of modulus of elasticity is critical in the integrity of copper wire bonding.

Many integrated circuits (ICs) will operate well above their maximum rated temperature of +70°C or +125°C, but are often not packaged appropriately to reliably endure temperatures above +150C. Specifically, the original gold or copper bonds on the aluminum die bond pads are prone to Kirkendall or Horsting voiding, particularly at temperatures greater than +150°C. Also the mold compounds used in plastic packaging for IC assembly can degrade at these elevated temperatures. In some cases, commercial demand for higher temperature reliability can justify a separate offering of ICs assembled in hermetic, ceramic packages from the original component manufacturer (OCM). However, in most cases, the market demand is deemed insufficient. Global Circuit Innovations (GCI) has developed a high-yielding process, which can remove a semiconductor die (i.e., computer chip) from a plastic package, remove the original bond wires and/or ball bonds, plate the aluminum die bond pads with Electroless Nickel, Electroless Palladium, and Immersion Gold (ENEPIG), and then reassemble the now improved semiconductor die into a hermetic, ceramic package. Device Extraction, ENEPIG die bond pad plating and Repackaging (DEER) provides an improved die bond pad surface such that works well with either gold or aluminum bond wires in applications up to +250°C without mechanical or electrical connectivity degradation. GCI routinely exposes sample devices to +250°C bakes with 100% post bake yields so as to continuously ensure that any device processed with the DEER technology will reliably perform in high-temperature environments. Although the oil and gas industry has already expressed significant interest in the DEER process, with excellent lifetest and production application results demonstrating dramatically increased component lifetimes at elevated temperatures, this technology can also be leveraged for any application exposing ICs to harsh environments. Not only is the high-temperature reliability dramatically increased, but also the new hermetic, ceramic package protects the IC from a variety of elements and environments (i.e., corrosives and moisture).

The article also investigates the min. solder volume request for solving Gold embrittlement issue in the limited condition. Gold (Au) embrittlement was known and had been studied for a long time. It will reduce the solder joint toughness not just only in reliability test but in manufacturing process. This kind of failure even occurs just after SMT process, it means we could not apply glue to protect the component from drop-off. The concentration of Gold is the major concern of this failure mode. How to dilute the concentration of Gold from substrate design, component manufacturing, soldering material selection and substrate manufacturing is final goal of forming a robust solder joint. The component drop-off was found in the latter process of SMT. The investigation started from failure mode definition. CSA (Cross Section Analysis) and EDS (Energy Dispersive Spectroscopy) were performed to observe the solder joint structure and alloy composition. Abnormal high concentration of Gold element reveals the Gold embrittlement is the major root cause of solder joint crack. Reducing Gold concentration started from the source of Gold surveying. Soldering related material investigation result shows no abnormality in substrate pad and solder paste but high risk in the soldering terminals of the component. The thicker Gold plating of the component is the major source of high Gold concentration in the solder joint. In general substrate manufacturing process such as desktop motherboard, it might not occur due to the sufficient solder volume provided by enough space and thicker stencil could cover the issue. In this case, the Gold plating thickness is unchangeable, so we only focus on substrate surface treatment and fine tune SMT process parameters to dilute the Gold concentration. The improvement DoEs were conducted for different substrate surface treatment, solder volume and reflow profile with different component batch. For substrate surface treatment, we changed it from ENIG (Electroless Nickel/Immersion Gold) to ENEPIG (Electroless Nickel/Electroless Palladium/Immersion Gold) for better solder joint strength. To increase solder volume, we enlarge the stencil aperture. For reflow profile fine tune, higher and lower peak with longer soaking time were verified for Gold diffusion. CSA and shear test were performed to confirm the solder joint and compare the joint strength. From the DoE results known, the positive factors solder joint strength enhancements are surface treatment and solder volume. ENEPIG solder joint interface is stronger than ENIG solder joint, but it can't dilute the Gold concentration directly. Solder volume increasing is most obvious factor to dilute the Gold concentration. Therefore, in SiP (System in Package) module production, tiny solder joint and high component density restrict the stencil design. The article also investigates the min. solder volume request for solving Gold embrittlement issue in the limited condition.

Interconnecting to aluminum- and copper-based semiconductors (electroless-nickel/gold for solder bumping and wire bonding)

Electroless nickel (Ni) electroless palladium (Pd) immersion gold (Au) (ENEPIG) substrate metal finish was evaluated for suitability for handheld product. 3 main focus areas were covered in the evaluation: plating thickness measurement system, processibility and reliability. The plating thickness measurement system was established with physical analysis and mirco X-ray fluorescence. The processibility studies included Au-wire bondability on ENEPIG bond finger and lead free (Pb-free) solder paste printing on solder pad. The result showed feasibility of manufacturing electronic packages using ENEPIG substrate could be obtained with certain level of process parameters optimization. Package level reliability showed ENEPIG substrate had comparable reliability performance compared to Electrolytic NiAu / CuOSP substrate. For board level reliability, the temperature cycling on board (TCoB) and bend test (BT) showed ENEPIG substrate performed similarly but drop test (DT) showed earlier first drop to failures. The low package standoff offered acceptable number in first drop to failure despite of the application of ENEPIG substrate. Difference in substrate outer Cu layer thickness was discussed as a factor influencing drop test performance. Failure analysis (FA) found different drop testing failure modes over the ENEPIG substrate samples and CuOSP substrate samples.

Flip chip technology has grown by leaps and bounds and is getting even smaller in size. Optimization of process parameters in manufacturing is eminent due to reliability issues. This paper reports the parameters that affect the quality of the bump height in electroless nickel immersion gold (ENIG) and their relationships between each other. A total of four different combinations of parameters have been carried out for this investigation using the design of experiment (DOE) approach. It can be concluded that higher temperature of electroless nickel permits an increase of bump height where as the increment in immersion gold temperature does not nessasarily affect the value of bump height. All four samples recorded a higher value of bump height than the controlled bump height value. This implies reliability of the solder joint and assembly process robustness can be improved with an increase of bump height by increasing the time.

The effects of chemical bath time in response to the bump height in electroless nickel immersion gold (ENIG) process was investigated. This paper presents the correlation between electroless process time, immersion gold process time and the bump height. A certain bump height need to be achieved in order to create acceptable solder bumps for reflow process. The study was done using a full factorial design of experiment (DOE). The DOE matrix is made of two levels with two factors. Analysis was done by plotting the main effects plot for each factor. The results suggest that higher process time increases the plating rate where the temperature fixed at 70 °C. Electroless nickel time has more influence to the bump height compared to immersion gold time.

The rapid ramping of fine pitch copper wire bonding production is a perfect example of a market driven technology implementation. The explosive increase in gold commodity pricing has paved the road for this conversion. Several challenges known from thick copper wire bonding had to be overcome to make this technology viable technically and economically. Some fundamental studies of copper wire bonding to the full spectrum of die surfaces and wafer nodes was available at the beginning of manufacturing implementation but over the last year, a large number of research papers have been published greatly enhancing the basic understanding of mechanism, metallurgy and chemistry of copper wire bonding. Equipment manufacturers have developed dedicated copper wire bonders and tool kits, wire manufacturers have developed softer copper wires as well as oxidation resistant wires, mold compound suppliers have developed low corrosion compounds and wire bond engineers have learned to optimize the bonding process to yield cost effective and reliable copper wire bond die packages. Here, high volume manufacturing experiences of copper wire bond packaging and long term reliability data will be presented.

One of the most pressing challenges facing today's electronics packaging industry is to identify reliable and cost-effective solder alloys to replace toxic lead containing solder. Besides evaluating new alloy compositions and improving the soldering process, it is important to understand how surface finishes applied to the copper metallization affect the joint characteristics. The characterization of intermetallics during the early stages of nucleation and the growth is hindered by the nanoscopic grain size and layer thickness. This study investigates the impact of PCB finish and solder type on the interfacial intermetallics. Five types of solder and four types of finishes were used: Sn37Pb (SP), Sn3.5Ag (SA), Sn3.5Ag0.7Cu (SAC), Sn2Ag0.5Cu4Bi (SACB) and Sn3Bi8Zn (SBZ) solders, combined with immersion Silver ( I – Ag ), electroless Nickel-immersion Gold (ENIG), Organic Solderability Preservative (OSP) and immersion Tin ( I – Sn ). It was shown that both the SP and SAC solders follow a parabolic growth model and that the surface finish has a significant effect on the intermetallic morphology and growth kinetics. A combined SEM and XRD investigation was shown to be a suitable method for characterizing nanoscale intermetallics.