Low Budget Forensic Drive Imaging Using Arm Based Single Board Computers

We will start this exciting journey exploring the scientific domain of digital image processing with Raspberry Pi. To begin the journey, you must be comfortable with the basics of single board computers (SBCs) and with Raspberry Pi. This chapter discusses the definition, history, and philosophy behind SBCs. It compares SBCs to regular computers. Then it moves toward the most popular and best selling SBC of all time, the Raspberry Pi. By the end of this chapter, you will have adequate knowledge to set up your own Raspberry Pi independently. This chapter aims to make you comfortable with the basic concepts of SBCs and Raspberry Pi setup.

High Performance Computing have several issues on architecture, resources, computational model and data. The challenge is establishing the mature architecture with scalable resources. The cluster architecture and multicore architecture implement to produce high performance on computation and process. This research works on architecture development and performance analysis. The cluster architecture build on Raspberry Pi, a single board computer, implement MPICH2. Raspberry Pi cluster build on Raspbian Wheezy operating system and test by metrics computation applications. The multicore architecture build on single computer with Core i5 and Core i7 architecture. The research use himeno98 and himeno16Large tools to analysis the processor and memory allocation. The test run on 1000x1000 matrices and benchmarked with OpenMP. The analysis focuses on CPU Time, FLOPS, and score. The result show on cluster architecture have 2576,07 sec in CPU Time, 86,96 MLPOS, and 2,69 score. The result on Core i5 architecture have 55,57 sec in CPU time, 76,30 MLOPS, and 0,92 score. The result in Core i7 architecture have 59,56 sec CPU Time, 1427,61 MLOPS, and 17,23 score. The cluster and multicore architecture results show that computing process are effected by architecture models. High performance computing architecture that has been built on this result can give learn on the development of HPC architecture models, and baseline performance. In the future it will use for determine the delivery architecture model on HPC and can be test by more variation of load.

Single board computer (SBC) is a compact built-in circuit with processing unit, memory access, and general purpose input and output units (Deep Learning Pipeline: Building A Deep Learning Model With TensorFlow [Authors: Hisham El-Amir, Mahmoud Hamdy]; Deep Learning with TensorFlow: Explore neural networks with Python [Authors: Giancarlo Zaccone, Md. RezaulKarim, Ahmed Menshawy]; Goodfellow et al., Deep learning, vol 1. MIT Press, Cambridge, 2016). The SBC is mainly compatible and portable in nature; these SBCs are the perfect option for ready-to-mount devices and for prototyping. Some of the famous SBCs in the present market include Raspberry pi, Ordroid, Jetson Nano, NVIDIA XAVIER, etc. Table 1 illustrates the comparison of important commonly used single board computers, capable to compute and import tensor flow packages. The NVIDIA SBCs are also enabled with GPU cores to make GPU coding Compute Unified Device Architecture (CUDA). The process runs in GPU framework for faster computation.

The Internet of Things (IoT) application can offer tremendous opportunities for organizations and institutions to grow and explore innovative ideas. However, several IoT use cases rely on Edge Computing capabilities and the virtualization capacity on edge. The use of virtualization on edge is a crucial requirement in realizing the efficient implementation of IoT. Furthermore, the management and orchestration of computing, storage, and networking resources in the Edge Cloud pose several challenges. Network Function Virtualization (NFV) envisages several Virtual Network Functions (VNF) deployed across the infrastructure. In this scenario, there are issues related to Single Board Computers (SBC) capacity to support compute virtualization based on Virtual Machines (VM). In this work, we evaluate and analyze computing virtualization on Raspberry Pi versions 3 and 4 using VM. Based on the experimental, we show the feasibility of using low-cost devices such as RPi as the edge computing hardware.

Due to various breakthroughs and advancements in machine learning and computer architectures, machine learning models are beginning to proliferate through embedded platforms. Some of these machine learning models cover a range of applications including computer vision, speech recognition, healthcare efficiency, industrial IoT, robotics and many more. However, there is a critical limitation in implementing ML algorithms efficiently on embedded platforms: the computational and memory expense of many machine learning models can make them unsuitable in resource-constrained environments. Therefore, to efficiently implement these memory-intensive and computationally expensive algorithms in an embedded computing environment, innovative resource management techniques are required at the hardware, software and system levels. To this end, we present a novel quality-of-service based resource allocation scheme that uses feedback control to adjust compute resources dynamically to cope with the varying and unpredictable workloads of ML applications while still maintaining an acceptable level of service to the user. To evaluate the feasibility of our approach we implemented a feedback control scheduling simulator that was used to analyze our framework under various simulated workloads. We also implemented our framework as a Linux kernel module running on a virtual machine as well as a Raspberry Pi 4 single board computer. Results illustrate that our approach was able to maintain a sufficient level of service without overloading the processor as well as providing an energy savings of almost 20% as compared to the native resource management in Linux.

The vehicle industry manufacturer is showing an increased interest in remote diagnostics by improving customer relationship management and commercial interest. The special nature of construction machines fact that architectures and applications proposed for vehicular communication are not optimized for these types of vehicles. This paper proposes a new remote diagnostic architecture based on IEEE 802.11n for construction machines communication to the infrastructure on site. The mobile Internet is used to transmit collected data to the central monitoring application. We discuss the possible network selection algorithms, mobility and security protocols that can be implemented on the On Board Units (OBU). The proposed architecture is based on Host Identity Protocol (HIP). This protocol introduces a Host Identifier (HI) for naming the endpoints and use intensive cryptographic operation for security and mobility management. Due to their minimal computing capabilities, many single board computers used as OBU themselves suffer from applications which need intensive CPU usage. Thus, a performance analysis of HIP, implemented on single board computers, is proposed by the end of this paper.

High performance computing (HPC) devices is no longer exclusive for academic,\nR&D, or military purposes. The use of HPC device such as supercomputer now\ngrowing rapidly as some new area arise such as big data, and computer\nsimulation. It makes the use of supercomputer more inclusive. Todays\nsupercomputer has a huge computing power, but requires an enormous amount of\nenergy to operate. In contrast a single board computer (SBC) such as Raspberry\nPi has minimum computing power, but require a small amount of energy to\noperate, and as a bonus it is small and cheap. This paper covers the result of\nutilizing many Raspberry Pi 2 SBCs, a quad-core Cortex A7 900 MHz, as a cluster\nto compensate its computing power. The high performance linpack (HPL) is used\nto benchmark the computing power, and a power meter with resolution 10mV / 10mA\nis used to measure the power consumption. The experiment shows that the\nincrease of number of cores in every SBC member in a cluster is not giving\nsignificant increase in computing power. This experiment give a recommendation\nthat 4 nodes is a maximum number of nodes for SBC cluster based on the\ncharacteristic of computing performance and power consumption.\n

In this paper, a simple one degree of freedom robot, designed for both research and teaching purposes, is described. The experimental set-up consists of a DC-motor, rate generator, harmonic drive, control system and load. A system has an open architecture and allows the programmer to distribute the intelligence between the single board computer (SBC) and PC compatible computer, which are connected through an interface. The SBC collects data from different sensors. System software resides on SBC and PC compatible computer. A PD controller has been designed and successfully implemented. Different new adaptive control algorithms, which require only link position measurements, were developed and tested, both on SUN workstation and on the experimental set-up.

In order to supersede the aging Microchip ATMEGA328P as the de facto standard for Commercial off-the-shelf (COTS) On-Board Computers (OBCs) with a more powerful system for different kinds of high-speed sensors and image acquisition applications, we developed advanced processors, encryption, and security experiment (apex). The platform consisting of a newly developed OBC using COTS components has been flight tested during the ATEK/MAPHEUS-8 sounding rocket campaign. The main advantages of the apex OBC lies in the speed and simplicity of the design while maintaining operational security with a redundant master-master microcontroller system, as well as dual flash storage within each master. Additionally, a single board computer with a containerized and failure-resistant Operating System (OS) (balenaOS) was included to allow usage of a high-definition camera or other more compute-intensive tasks. The bench and flight tests were performed successfully and already showed feasible ways to further improve operational performance.

A wide range of medical devices have significant electronic components. Compared to open-source medical software, open (and open-source) electronic hardware has been less published in peer-reviewed literature. In this review, we explore the developments, significance, and advantages of using open platform electronic hardware for medical devices. Open hardware electronics platforms offer not just shorter development times, reduced costs, and customization; they also offer a key potential advantage which current commercial medical devices lack—seamless data sharing for machine learning and artificial intelligence. We explore how various electronic platforms such as microcontrollers, single board computers, field programmable gate arrays, development boards, and integrated circuits have been used by researchers to design medical devices. Researchers interested in designing low cost, customizable, and innovative medical devices can find references to various easily available electronic components as well as design methodologies to integrate those components for a successful design.

Virtual Forensics is a new trend in the area of computer forensics. Virtualization technology paved the way for the growth of virtual forensics. VMware virtual environment provides a completely virtualized set of hardware to the guest operating system. The features of Virtual Machine make it an interesting platform to commit cyber crimes. The combination of innovative criminal techniques and advanced technologies makes the traditional techniques out-dated for detecting such crimes. This paper discusses how live acquisition can be performed to acquire virtual machine related files from the host operating system. The paper also describes how to analyze these acquired files to obtain raw data stored in various grains. The study is supported by methods that assist forensic examiners by providing valuable information from the raw data which is retrieved from various grains pointed by grain table entries.

Advancements are being made to a system that uses an inertial measurement unit (IMU) to locally position an electromagnetic induction (EMI) sensor. The Small Area Inertial Navigation Tracking system (SAINT) has been interfaced to an EM61-HH with the EMI data logged on a handheld computer. To improve timing accuracy of the IMU and EMI data, a single board computer (SBC) is being implemented to collect measurements from both. This SBC system will include digital I/O options to interface to other advanced EMI systems under development. Operationally, the system can be swept about over a localized EMI anomaly for thirty seconds. In post-processing, the EMI sensor data is mapped out in both position and orientation. The positions and EMI data can be used in a dipole-based inversion. The inversion finds the magnetic polarization terms along an object’s axes which can be related to an object’s size and shape. Accurate inversion of these terms is possible because of the centimeter level positioning provided by the IMU system. With these terms well determined, the system can be used to classify objects as either unexploded ordnance or as clutter. Issues of sweep pattern and sensor time response on the inversion are being explored. Results from fitting repeated data over a four inch steel sphere are presented. The data was collected using three different sweep patterns over the sphere. No significant difference in the fits was observed between the sweep patterns.

The Internet of Things (IoT) allows users to gather data from the physical environment. While sensors in public spaces are already widely used, users are reluctant to deploy sensors for shared data at their homes. The deployment of IoT nodes at the users premises presents privacy issues regarding who can access to their data once it is sent to the Cloud which the users cannot control. In this paper we present an energy-efficient and low cost solution for environmental monitoring at the users home. Our system is built completely with open source components and is easy to reproduce. We leverage the infrastructure and trust of a community network to store and control the access to the monitored data. We tested our solution during several months on different low-capacity single board computers (SBC) and it showed to be stable. Our results suggest that this solution could become a permanently running service in SBCs at the users homes.

This paper describes the laboratory facilities for a course on microprocessors in electromechanical systems. This course is designed to introduce mechanical engineers to basic concepts of microprocessor architectures, programming, and interfacing, with special focus on implementation of digital controllers for real-world electromechanical systems. Laboratory facilities at each lab station include a Pentium-based PC for code development and an 80188-based single board computer (SEC) for real-time embedded control. Since both the PC and the SEC have their own analog I/O capabilities, true distributed control is possible, with the PC acting as process monitor, plant simulator, or control supervisor, capable of downloading new controller setpoints to the SBC as process conditions change.

A system of computers connected by a local area network (ARCNET®) controls the Munich accelerator facility. This includes ion sources, the tandem accelerator, the beam transport system, the gas handling plant, parts of experimental setup and also an ion source test bench. ARCNET is a deterministic multi-master network with arbitrary topology, using coax cables and optical fibers. Crates with single board computers and I/O-boards (analog, parallel or serial digital), dependent on the devices being controlled, are distributed all over the building. Personal computers serve as user interfaces. The LAN communication protocol is a client/server protocol. Communication language and programming language for the single board computers is Forth. The user mode drivers in the personal computers are also written in Forth. The tools for the operators are MS-Windows applications, programmed in Forth, C++ or Visual Basic. Links to MS-Office applications are available, too.