Low temperature shallow junction formation using vacuum ultraviolet photons during rapid thermal processing

The redistribution of B and As ions implanted into thin layers of WSi2 and CoSi2 on poly- or monocrystalline Si and the outdiffusion into the Si substrate during furnace annealing (FA) and rapid thermal processing (RTP) were investigated by several analytical techniques. Shallow junctions (depth xj < 100 nm) with interface concentrations Cint close to the solid solubility of the respective dopant in Si (Cint≳3×1020 cm−3 for As; (Cint ≳ 8 × 1019 cm−3 for B) were obtained with RTP. For FA above 800 °C, the diffusion of B from CoSi2 into Si results in a drop of Cint < 2 × 1019 cm−3 because of strong B segregation and probably reactive loss at the SiO2/CoSi2 interface. No evidence on metal-dopant-compound formation could be found. The dopant redistribution is demonstrated to be a superposition of lattice and grain-boundary diffusion, solubility limits, layer inhomogeneities, dopant segregation at the interface and grain boundaries, and probably phase transformation of the dopants segregated at the SiO2/silicide interface. Electrical results such as, e.g., CoSi2 diode leakage currents (≊1 nA/ cm2) and contact resistances ( 2–5 × 10−7 Ω cm2 for RTP) clearly show that the formation of shallow silicided junctions by diffusion from an implanted silicide is a highly useful technological approach.

Rapid and potentially low-cost process techniques are analysed and successfully applied towards the fabrication of high-efficiency mono-and multicrystalline Si solar cells. First, a novel dielectric passivation scheme (formed by stacking a plasma silicon nitride film on top of a rapid thermal oxide layer) is developed that serves as antireflection coating and reduces the surface recombination velocity (S{sub eff}) of the 1.3 {omega}-cm p-Si surface to approximately 10 cm/s. The essential feature of the stack passivation scheme is its ability to withstand short 700 - 850degC anneal treatments used to fire screen printed (SP) contacts, without degradation in S{sub oeff}. The stack also lowers the emitter saturation current density (J{sub oe}) of 40 and 90 {omega}/{open_square} emitters by a factor of three and 10, respectively, compared to no passivation. Next, rapid emitter formation is accomplished by diffusion under tungsten halogen lamps in both belt line and rapid thermal processing (RTP) systems (instead of in a conventional infrared furnace). Third, a combination of SP aluminium and RTP is used to form an excellent back surface field (BSF) in 2 min to achieve an effective back surface recombination velocity (S{sub eff}) of 200 cm/s on 2.3 {omega}-cm Si. Finally, the above individual processes are integrated to achieve: (1) >19% efficient solar cells with emitter and Al-BSF formed by RTP and contacts formed by vacuum evaporation and photolithography, (2) 17% efficient manufacturable cells with emitter and Al-BSF formed in a belt line furnace and contacts formed by SP. (Author)

Influence of implanted monomer nitrogen (14N) on the diffusion of single delta-doped phosphorus (P) layer in epitaxial Ge (001) and its electrical activation by rapid thermal processing (RTP) is investigated. One µm thick intrinsic Ge with a P delta layer at 25nm from the surface with / without 14N co-implantation is annealed at peak temperature of 450°C to 800°C for 10s. The high P concentration gradient of up to 2nm/dec. yields strong diffusion and high surface concentration after RTP w/o 14N co-implantation. After 600°C RTP P is uniformly distributed in the first 60nm with an active carrier concentration of about 1x1019/cm³. The sheet resistivity (Rs) is reduced to the minimum of 207Ω/sq by broadened profile despite 20% P loss (up to 50% at 800°C). By 4x1014/cm³ 14N implantation the dopant loss is fully suppressed up to 750°C (20% at 800°C). The P diffusion length was reduced by a factor of four at 600°C. Formation of immobile and electrically inactive PN clusters lead to a reduction of the active carrier concentration of about 3.4x1018/cm³ and though to a higher Rs of 600Ω/sq. Lower 14N doses (4x1011/cm² to 4x1013/cm²) influence the Rs and the P profile only at temperatures below 600°C.

Rapid thermal and integrated processing: J C Gelpey, M L Green, J J Wortman and R Singh (Editors)MRS, 1991, 503 pp, hardcover, $67.00. ISBN: 1-55899-118-2

Like many of the technologies used to process integrated circuits, the road to manufacturing for rapid thermal processing (RTP) has been twisted. What began as a speculative laboratory apparatus has evolved into a cornerstone of IC technology. Qualities that make RTP desirable for IC manufacture include the ability to process wafers individually, the ability to minimize the time wafers spend at elevated temperature, the convenience of clustering RTP to other systems, and the possibility of maintaining cold reactor walls. This paper will review how these properties make RTP desirable. The paper also will present an overview of the difficulties surrounding the use of RTP and describe how many serious hurdles have been overcome. It will summarize the evolution of RTP from a curiosity to a mainstay technology in building integrated circuits. It then will describe SEMATECH’s role in working with RTP, ending with a direction for future application of RTP based on the National Technology Roadmap for Semiconductors (NTRS).

The effects of two‐step rapid thermal processing (RTP) sequentially in different ambients on the formation of denuded zone (DZ) and oxygen precipitation in the Czochralski (CZ) silicon wafers have been investigated. With the first‐step RTP in Ar ambient, no obvious DZ but a high density of bulk micro‐defects (BMDs) were formed in the sample with the second‐step RTP in N2 ambient, while the BMD density in the sample with the second‐step RTP in O2 ambient was remarkably low. With the first‐step RTP in N2 ambient, a high density of BMDs and a width of DZ could be formed in either of the samples with the second‐step RTP in Ar or O2 ambient, but the DZ width in the two samples differed to a certain extent. With the first‐step RTP in O2 ambient, the two samples with the second‐step RTP in Ar and N2 ambients respectively possessed reasonably comparable DZ width and BMD density. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Variations of deep levels in Si-doped molecular-beam epitaxy (MBE) n-GaAs layers by rapid thermal processing (RTP) were investigated by deep-level transient spectroscopy. RTP was performed at 850, 910, and 1000 °C with SiOx encapsulation. Native deep levels M1 (Ec − 0.18 eV), M3 (Ec − 0.33 eV), and M4 (Ec − 0.51 eV) are annealed out by RTP at a higher temperature (1000 °C) compared with the case of capless RTP. Three electron traps NC1 (Ec − 0.36 eV), NC2 (Ec − 0.48 eV), and EL2 (Ec − 0.81 eV) are produced by RTP. After RTP at 850 and 910 °C, the concentrations of the EL2 decrease with depth from the surface and show no peculiar lateral distribution across the wafer, which is different from that of capless RTP reported previously. The formation of the EL2 is enhanced by the stoichiometry change due to the Ga outdiffusion into the SiOx film during RTP. After RTP at 1000 °C, the outdiffusion of the EL2 is observed near the surface. This result seems to be ascribed to the As loss, since it can no longer prevent the As evaporation at such high temperature. Though it has been reported previously that an N1 trap which has a broad energy level (Ec − 0.5–0.7 eV) is formed in MBE GaAs by RTP without any encapsulation, no N1 trap was observed in a SiOx-capped sample after RTP. We discuss the difference of the EL2 concentration depth profiles between SiOx-capped MBE GaAs and capless samples after RTP, considering the absence of the trap N1 in capped samples.

A new proprietary rapid thermal processing (RTP) method has been developed and implemented for the fast switching of a gas ambient surrounding a wafer inside a RTP furnace operated in the low pressure or atmospheric pressure regime. By controlling the gas flow pattern around a semi-conductor wafer, the effective volume of process gas interacting with the wafer has been reduced by a factor of 33. Thus, real-time gas sequencing can be realized so that multiple rapid thermal processing steps, involving dry and wet rapid thermal oxidation (RTO), rapid thermal nitridation (RTN), rapid thermal annealing (RTA) and chemical vapor deposition (CVD), can be carried out sequentially in a single RTP cycle. Experimental data from ion implant anneal and thermal oxide thin film growth will be presented to illustrate the major technical challenges and solutions associated with the integration of the new method into the Summit/spl trade/ RTP systems. Using this approach, the benefits of rapid thermal processing with high productivity and quick ambient switching is realized.

Poly(methyl methacrylate)-derived graphene films on different substrates using rapid thermal process: a way to control the film properties through the substrate and polymer layer thickness

We have investigated the motion of dislocations originating from Vicker indentations in single-crystalline silicon wafers subjected to high temperature rapid thermal processing (RTP) under different ambients. It is found that the dislocations move very rapidly due to the release of residual stress around the indentations during the RTP. Moreover, as the RTP temperature exceeds 1100 °C, the dislocation gliding distances in the specimens subjected to the RTP in N2 atmosphere are much shorter than in Ar ambient. We believe that the nitrogen atoms injected into the indentation by the RTP under N2 ambient exhibit a pinning effect on dislocation motion. It is thus shown that the high temperature RTP in N2 ambient can improve the mechanical strength of silicon wafer.

Application of rapid thermal process to solution-processed Ti-silicate films for enhancing permittivity without losing amorphous nature

Nonalloyed Ohmic contacts of evaporated Pt/Ti to p-InGaAsP (λg=1.3 μm) with different Zn doping levels ranging 5×1018–2×1019 cm−3 have been fabricated by rapid thermal processing. These contacts showed Ohmic behavior prior to any heat treatment with a specific contact resistance of 4×10−3 Ω cm2 for the lowest doping level and 1×10−4 Ω cm2 for the highest level. A decrease in the specific resistance was achieved by supplying rapid thermal processing to the contacts, while the lowest values were observed on all the contacts as a result of heating at 450 °C for 30 sec. The lowest resistance of 1×10−6 Ω cm2 was achieved at the contact that was formed on the 2×1019 cm−3 Zn-doped InGaAsP layer. Measurements of the conduction activation energy yields a good linear dependence of the specific resistance on temperature in all the contacts as deposited and after the different heat treatments. The higher the doping level and the rapid thermal processing temperature up to 450 °C, the lower the activation energy, which may suggest an increase in the tunneling carrier transport mechanism contribution at the expense of the thermionic-emission one. The morphology and microstructure of these contacts were not influenced by the variations in the Zn doping concentration.

A direct energy transferred rapid thermal process (RTP) method is proposed as a new generation RTP to overcome the issues of the conventional RTP and flash‐ or laser‐based anneals. Plasma immersion ion implantation (PIII) is utilized to realize the concept because it can deliver high power density. The ramp‐up rates between 100 °C/sec and ∼2000 °C/sec and the effective thermal budgets between seconds and milliseconds can be achieved with other advantages, including no pattern effect, low temperature annealing, high throughput, and flexible process controllability.

Skin effect suppression in planar multi-walled carbon nanotube (MWCNT)/Copper (Cu) conductors was realized at the 0-10 MHz frequency range through infrared laser irradiation of MWCNTs, which were coated on the surface of the Cu substrate via the electrophoretic deposition (EPD) method. The effect of laser irradiation and its power density on electrical and structural properties of the MWCNT/Cu conductors was investigated using a wavelength-tunable CO2 laser and then comparing the performance of the samples prepared at different conditions with that of pristine Cu. The irradiation at λ=9.219 µm proved to be effective in selective delivery of energy towards depths close to the interface, compared to the conventional rapid thermal processing (RTP) annealing method. At f=10 MHz, the ac resistance of the laser irradiated MWCNT/Cu conductors was reduced by more than one order of magnitude compared to its original value for the pristine Cu. Impedance measurements and structural characterizations indicate that this technique results in successful implementation of the nanotubes on the surface of the metallic substrate to operate as current channels with saturated skin depths and reduced contact resistance at the interface. Therefore, the limited performance of Cu conductors at high frequencies can be modified. Additionally, it was further demonstrated that the impedance reduction and the suppression of the skin effect in MWCNT/Cu conductors are in direct relation with the irradiated power density and can thus be easily controlled by this parameter.Skin effect suppression in planar multi-walled carbon nanotube (MWCNT)/Copper (Cu) conductors was realized at the 0-10 MHz frequency range through infrared laser irradiation of MWCNTs, which were coated on the surface of the Cu substrate via the electrophoretic deposition (EPD) method. The effect of laser irradiation and its power density on electrical and structural properties of the MWCNT/Cu conductors was investigated using a wavelength-tunable CO2 laser and then comparing the performance of the samples prepared at different conditions with that of pristine Cu. The irradiation at λ=9.219 µm proved to be effective in selective delivery of energy towards depths close to the interface, compared to the conventional rapid thermal processing (RTP) annealing method. At f=10 MHz, the ac resistance of the laser irradiated MWCNT/Cu conductors was reduced by more than one order of magnitude compared to its original value for the pristine Cu. Impedance measurements and structural characterizations indicate that th...

Rapid thermal processing (RTP) is becoming increasingly more important in semiconductor wafer fabrication. A nonlinear physical model for a generic RTP system is described. This generic RTP system is representative of the state-of-the-art RTP systems. A low-order nonlinear model is developed. A model-based LQG controller is designed for the low-order model which successfully controls the full-order nonlinear simulation model.