<title>Real-time vision-based automatic push button system</title>

This paper presents the principle of synthetic aperture radar (SAR) imaging and points out that the SAR image can be achieved by two-dimensional convolution. Then, the system configuration of an airborne SAR real-time digital signal processing system and the logical structure of range and azimuth compression are described in detail. Finally the main performance parameters are analysed briefly and the results of a real-time test and examples of imagery obtained by the system are also presented.

Emerging trends in design of real-time digital signal processing systems indicate that in the future, a significant amount of performance improvement can be achieved using dynamically reconfigurable embedded architectures consisting of reconfigurable, general-purpose components. Although embedded real-time systems have long been prevailing in our society, no firm scientific base has been established yet to handle timing requirements in a systematic manner in real-time embedded computing. Because of this lack of the scientific base, many embedded systems have been designed in an ad hoc manner and most of them have been customized to specific applications, showing inflexibility for the other type of applications. This paper proposes a dynamically reconfigurable embedded architecture which bridges the gap between the embedded system and ASICs. This architecture combines a reconfigurable hardware processing unit with a software programmable processor. The main goal is to take advantage of the capabilities of both resources. While the processor takes care of all sequential computations the reconfigurable hardware takes specialized vector operations. With such integrated system architecture, specific properties of applications, such as parallelism, regularity of computation and data granularity can be exploited by creating custom operators, pipelines and interconnection pathways. To handle the conflicting requirements of being a flexible architecture and implement some application-specific algorithms, a dynamically reconfigurable embedded architecture is proposed. The proposed architecture consists of arithmetic operation-level configurable modules interconnected through multiple data buses that can be logically configured to form one or more pipelines before a specific application is initiated and remains unchanged till the completion of the application. This architecture is targeted at high throughput and real time signal processing applications. The idea of dynamic reconfiguration - changing a circuit while it is operating - is exploited. In particular, we illustrate how dynamic reconfiguration can achieve significant performance improvement.

Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit technology, synchronization in a large-scale system, low-latency execution, and low noise are required for electronic systems. Here, we present a field-programmable gate array (FPGA)-based electronic system with a distributed synchronous clock and trigger architecture. The system supports synchronous control of qubits with jitters of ∼5ps. We implement a real-time digital signal processing system in the FPGA, enabling precise timing control, arbitrary waveform generation, in-phase and quadrature demodulation for qubit state discrimination, and the generation of real-time qubit-state-dependent trigger signals for feedback/feedforward control. The hardware and firmware low-latency design reduces the feedback/feedforward latency of the electronic system to 125ns, significantly less than the decoherence times of the qubit. Finally, we demonstrate the functionalities and low-noise performance of this system using a fluxonium quantum processor.

The purpose of this study is to help reduce high noise levels experienced by patients in intensive care unit (ICU) environments. The study has designed and developed the active noise control (ANC) system based on filtered x least mean square (FxLMS) to reduce the interfering noise around ICU patients’ beds. A multi-channel feed-forward ANC algorithm has been implemented in a real-time digital signal processing system based on TMS320 DSP C6713. This noise cancellation system has been tested in a patient bed with recorded real ICU noise as the noise source to mimic the ICU noisy environment. The experiment setup has been presented. The real-time experiment results show that ANC is a promising solution to solve high noise level problem inside ICU.

The design and use of two new inductive sensors for imaging of reinforcing bars in concrete is described. The first is a Q-sensor, the second a heterodyne sensor. By exploiting the phase and amplitude of the returned signals, it is possible to image the steel bars, detect section loss due to corrosion and image corrosion products directly. A real-time time digital signal processing system has also been developed that performs data pre-processing.

High speed signal processing depends critically on parallel processor technology. In most applications, general-purpose parallel computers cannot offer satisfactory real-time processing speed due to severe system overhead. Therefore, for real-time digital signal processing (DSP) systems, special-purpose array processors have become the only appealing alternative. In designing or using such array Processors, most signal processing algorithms share the critical attributes of regularity, recursiveness, and local communication. These properties are effectively exploited in innovative systolic and wavefront array processors. These arrays maximize the strength of very large scale integration (VLSI) in terms of intensive and pipelined computing, and yet circumvent its main limitation on communication. The application domain of such array processors covers a very broad range, including digital filtering, spectrum estimation, adaptive array processing, image/vision processing, and seismic and tomographic signal processing, This article provides a general overview of VLSI array processors and a unified treatment from algorithm, architecture, and application perspectives.

Research and discuss the target detection algorithms and flows in remote sensing image. Different from other simulation detection algorithms, we added span-tile determination steps in an actual implementation. Based on the analysis of remote sensing image real-time processing system features, design and implement a high-performance real-time target detection signal processing system. The system consists of an amount of dedicated floating point DSPs formed a processing element (PE) and high-speed serial switching architecture which established the communication links between PEs. As a novel contribution of this paper, a pipelined parallel method and the implementation of a RapidIO based remote sensing image real-time processing system depicted in detail. Experiments carried out on actual satellite remote sensing image data set confirmed the processing and detection performance of the system.

Data compression techniques have been widely used to process and transmit huge amount of EEG data in real-time and remote EEG signal processing systems. In this paper we propose a lossy compression technique, F-shift, to compress EEG signals for remote depth of Anaesthesia (DoA) monitoring. Compared with traditional wavelet compression techniques, our method not only preserves valuable clinical information with high compression ratios, but also reduces high frequency noises in EEG signals. Moreover, our method has negligible compression overheads (less than 0.1 seconds), which can greatly benefit real-time EEG signal monitoring systems. Our extensive experiments demonstrate the efficiency and effectiveness of the proposed compression method.

QCA technology has considerable advantages in comparison with Complementary Metal Oxide Semiconductor (CMOS) technology, such as extremely low power dissipation, high operating frequency, and a small size and can operate at one Terahertz. The Multiply -Accumulator (MAC) unit is considered as one of the essential operation in Digital Signal Processing (DSP). In the real-time DSP systems, several applications like speech processing, video coding and digital filtering etc, require MAC operations. However, the power dissipation and area are the most significant aspects in these systems. In this paper, low power MAC Unit based on QCA technology is designed. QCADesigner ver 2.0.3 is used to validate the accuracy of the proposed circuit. The power dissipation is estimated using QCAPro tool. The total power consumed by this unit is 4.03 mW. It is found that proposed design is better than other designs based on classical technology. As the works in the field of QCA logic signal processing has started to progress, the suggested contribution will give rise to a new thread of research in the field of real time signal processing.

In real-time digital-signal processing systems, data often enter or leave the computationally intensive parts at small integer multiples of the clocking interval. In these cases, traditional microprocessor-based architectures are inadequate to meet the throughput requirements, and so clusters of dedicated data paths, hard-wired to closely match the algorithmic data flow, are often used. These architectures typically contain multiple concurrently operating data-path pipelines. The circuit reported targets the rapid implementation and prototyping of such architectures using reconfigurable multiprocessors. This circuit contains eight execution units (EXUs) connected via a dynamically controlled crossbar switch. It can operate at 25 MHz (200 MIPs) with a data I/O bandwidth of 400 MB/s and a typical power consumption of 0.45 W. It contains 140106 transistors on a 8.9*9.5 mm/sup 2/ die, in 1.2- mu m CMOS technology. >

This paper addresses the problem of deriving optimised array architectures for real-time multi-dimensional signal processing systems, as occurring in image, speech and video applications. The starting point is a set of Weak Single Assignment Codes. For this abstract specification, we solve the difficult task of finding a globally optimised architecture with matched throughput while avoiding an explosion of the search space. The cost function not only includes the data-path area but incorporates also the crucial foreground and background memory storage. The effectiveness of our solution has been substantiated with realistic test cases. >

The Faculty of Information Technology and Systems (ITS) of Delft University of Technology (DUT) has developed an efficient and effective strategy for the implementation of research programs in the fields of telecommunications transmission and radar, the International Research Centre for Telecommunications transmission and Radar (IRCTR). Under the auspices of the IRCTR, cooperation with a large number of national and internally scientific institutes and companies has been established. For the last decade many companies, institutions and universities have participated in the radar and remote sensing research activities of DUT. As a result of that, the radar technology and systems, antennas and propagation and remote sensing research carried out at the Delft University of Technology has gained national and international recognition. In addition to radar there are the immense developments taking place in wireless communications which need to be addressed. Broadband communications are growing sectors with important applications in office automation, logistics services, personal communications and satellite communications. Unique research facilities for radars and communications have been built. These include DARR (Delft Atmospheric Research Radar), SOLIDAR (solid state radar), TARA (transportable atmospheric radar), DUCAT (Delft University Chamber for Antenna Tests) and CM-MM wave test and measurement equipment, as well as unique real-time computer and signal processing systems.

Pedestrian detection technology has high application value in various fields, and deep learning has become a key development direction in computer vision. Human object detection has also shifted from traditional detection algorithms to deep learning. Due to the influence of complex light and obstacles in the station, as well as the occlusions and size changes of passengers, the algorithm must be optimized for these complex scenes. This paper takes pedestrian detection technology as the goal, compares the methods based on human body parts recognition from the concepts and classification of artificial neural networks and deep learning, and profoundly discusses the convolutional neural network based on deep learning. Finally, pedestrian detection algorithms' problems and future trends are compared and discussed.

Pedestrian detection is another significant special application of object detection in autonomous vehicles. In contrast to universal object detection, it has similarities and special traits. Nevertheless, there are some difficulties that influence pedestrian detection performance, namely (i) occlusion and deformation (ii) low-quality and multispectral images consisting primarily of lighting conditions, small-scale detection, and target detection extensively, and (iii) true-false pedestrians. Deep learning (DL) methods are a class of artificial intelligence method that can solve the issues mentioned above of pedestrian detection. This paper initially gives an elaborate description of pedestrian detection, difficulties in pedestrian detection, and latest advancements in solving them using the assistance of DL methods with informative discussions, aiming to provide insights to the readers. (2) A new pedestrian detection algorithm (PDA) of true/false pedestrian is suggested here, in which a new YOLO-3D CNN model is applied to reject true/false pedestrian. The primary purpose is to evaluate the performance of the existing 3D CNN taking into consideration the problem of rejecting true false pedestrians based on images captured using the car's onboard cameras and light detection and ranging (LiDAR) sensors. PDA initially utilizes YOLOv3 to capture the entire image for training detector model capable of real-time forecasting. Next, as a feature extractor, it utilizes the MobileNet-SSD that provides great accuracy as well as good trading uptime. PDA then implements the Faster R-CNN method to detect different parts of the object, over the convolutional layer. Lastly, data augmentation techniques are applied in PDA to augment the data coverage by fully exploiting available training data. Simulation results indicate that the proposed pedestrian detection model and PDA improve the accuracy of real and false pedestrians while maintaining real-time requirements.

The Ingara airborne imaging radar system is a technology demonstrator aimed at evaluating the application of multi-mode radar to broad area land surveillance. An integrated system has been developed that includes an X-Band radar with SAR and MTI modes, real-time signal processing system, air-to-ground data link, automated target detection algorithms and a simple image analysis geographical information system.