Memory binding for performance optimization of control-flow intensive behaviors

Speculative execution refers to the execution of parts of a computation before the execution of the conditional operations that decide whether it needs to be executed. It has been shown to be a promising technique for eliminating performance bottlenecks imposed by control flow in hardware and software implementations alike. In this paper, we present techniques to incorporate speculative execution in a fine-grained manner into scheduling of control-flow intensive behavioral descriptions. We demonstrate that failing to take into account information such as resource constraints and branch probabilities can lead to significantly sub-optimal performance. We also demonstrate that it may be necessary to speculate simultaneously along multiple paths, subject to resource constraints, in order to minimize the delay overheads incurred when prediction errors occur. Experimental results on several benchmarks show that our speculative scheduling algorithm can result in significant (upto seven-fold) improvements in performance (measured in terms of the average number of clock cycles) as compared to scheduling without speculative execution. Also, the best and worst case execution times for the speculatively performed schedules are the same as or better than the corresponding values for the schedules obtained without speculative execution.

In maximum likelihood estimation, the real but unknown innovation distribution is often replaced by a nonparametric estimate, and thus the estimation procedure becomes semiparametric. These semiparametric approaches generally involve two steps: the first step that incorporate an initial estimate of the model parameter to produce a residual sample, and the second step that uses the residuals to estimate the likelihood, which is subsequently maximized to obtain the final estimate of the model parameter. Therefore, the characteristics of the initial input estimator may be carried over to the final semiparametric estimator, and the performance of the semiparametric estimator will be impaired if the input estimate is deficient. In this article we have studied a onestep semiparametric estimator where no initial input is necessary. The estimation procedure is illustrated via a generalized autoregressive conditional heteroskedasticity (GARCH) model. Asymptotic properties of the estimator are established, and finite sample performance of the estimator is evaluated via simulation. The results suggest that the proposed one-step semiparametric estimator avoids significant drawbacks of its two-step counterparts. (JEL: C02, C22, C51)

The non-response model in Knott etal. (1991, Statistician, 40, 217) can be represented as a tree model with one branch for response/non-response and another branch for correct/incorrect response, and each branch probability is characterized by an item response theory model. In the model, it is assumed that there is only one source of non-responses. However, in questionnaires or educational tests, non-responses might come from different sources, such as test speededness, inability to answer, lack of motivation, and sensitive questions. To better accommodate such more realistic underlying mechanisms, we propose a a tree model with four end nodes, not all distinct, for non-response modelling. The Laplace-approximated maximum likelihood estimation for the proposed model is suggested. The validation of the proposed estimation procedure and the advantage of the proposed model over traditional methods are demonstrated in simulations. For illustration, the methodologies are applied to data from the 2012 Programme for International Student Assessment (PISA). The analysis shows that the proposed tree model has a better fit to PISA data than other existing models, providing a useful tool to distinguish the sources of non-responses.

Nonparametric smoothing methods are used to model longitudinal data, but the challenge remains to incorporate correlation into nonparametric estimation procedures. In this article, we propose an efficient estimation procedure for varying-coefficient models for longitudinal data. The proposed procedure can easily take into account correlation within subjects and deal directly with both continuous and discrete response longitudinal data under the framework of generalized linear models. The proposed approach yields a more efficient estimator than the generalized estimation equation approach when the working correlation is misspecified. For varying-coefficient models, it is often of interest to test whether coefficient functions are time varying or time invariant. We propose a unified and efficient nonparametric hypothesis testing procedure, and further demonstrate that the resulting test statistics have an asymptotic chi-squared distribution. In addition, the goodness-of-fit test is applied to test whether the model assumption is satisfied. The corresponding test is also useful for choosing basis functions and the number of knots for regression spline models in conjunction with the model selection criterion. We evaluate the finite sample performance of the proposed procedures with Monte Carlo simulation studies. The proposed methodology is illustrated by the analysis of an acquired immune deficiency syndrome (AIDS) data set.

Efficient data ingestion and online data augmentation remain challenges in deep learning workflows, particularly when dealing with datasets containing non-standard formats or massive multidimensional arrays that natively optimised functions cannot fully manage. This work presents a parallel framework that integrates and global shared memory through a ring buffer architecture, enabling high-throughput data loading and flexible on-the-fly augmentation. The framework decouples data production from consumption, allowing multiple CPU workers to load and preprocess batches in parallel while completely bypassing the Python GIL and memory bottlenecks. Crucially, the framework supports both CPU-side and GPU-side augmentation strategies, adapting to whether complex conditional transformations or framework-native operations are required. The proposed approach was validated on two representative tasks: (i) sign language recognition from human pose CSV sequences, and (ii) hyperspectral image classification using massive arrays. Relative to standard sequential baselines, the proposed framework achieved up to $$27\times $$ 27 × acceleration in isolated data ingestion and up to $$28\times $$ 28 × in end-to-end training. Importantly, even against natively optimised parallel TensorFlow and PyTorch pipelines, it still delivered up to $$8\times $$ 8 × faster data loading and up to $$7\times $$ 7 × faster full training in memory-intensive scenarios. Overall, the proposed framework provides a scalable, multi-GPU compatible solution for deep learning pipelines, showing robust performance across both I/O-bound and memory-constrained scenarios in TensorFlow and PyTorch while alleviating memory fragmentation and allocation constraints.

This paper presents a novel variable step size Kalman Filter by augmenting the event handling procedure of Ordinary Differential Equation (ODE) solvers with the predictor-corrector scheme of well-known discrete Kalman Filter (KF). The main goal is to increase the estimation performance of Kalman Filter in the case of switching/stiff systems. Unlike fixed step size Kalman Filter the sample time (ST) is adapted in the proposed approach based on current estimation performance (KF innovation) of system states and can change during the estimation procedure. The proposed event handling algorithm consists of two main parts: relaxing ST and restricting ST. Relaxing procedure is used to avoid high computational time when no rapid change exists in system dynamics. Restricting procedure is considered to improve the estimation performance by decreasing the Kalman filter step size in the case of fast dynamical behavior (switching behavior). The accuracy and computational time are controlled by using design parameters. The effectiveness of the proposed approach is verified by simulation results using the bouncing ball example as a switching system.

The escalating demands of next-generation, beyond-5G services necessitate innovative approaches to dynamic resource management, critical for satisfying end-user expectations and maintaining quality of service (QoS). This study leverages the Open Radio Access Network (O-RAN) architecture's flexibility and programmability to introduce a novel deep reinforcement learning (DRL) strategy for QoS-aware intra-slice resource allocation. By employing intelligent agents and a Deep Q-Network (DQN)-based framework, our approach precisely tailors resource distribution within O-RAN, optimizing for enhanced mobile broadband (eMBB) and ultra-reliable low-latency communications (URLLC) slices. The proposed method, featuring intelligent QoS-aware resource allocation (IQRA) and its low-complexity variant (LIQRA), demonstrates significant throughput improvements for eMBB by 11.5% compared to state-of-the-art (SOTA) methods and reduces URLLC latency by 19.94% and 16.54%, achieving up to 45.5% lower latency than baseline. A streamlined algorithm effectively reduces computational complexity, ensuring robust performance under resource constraints. Simulation results underscore the algorithm's ability to substantially enhance 5G network slice performance, offering a parameterized solution for user association in O-RAN networks using DRL. This research not only meets high key performance indicators (KPIs) but also advances edge intelligence, fostering a more responsive network ecosystem.

To address the current problems of low resource allocation efficiency and unreasonable protection path planning in intelligent planning for intangible cultural heritage protection, this paper proposes and establishes an intelligent optimization model based on the Hybrid Quantum Ant Colony Algorithm (HQACA). By introducing a quantum bit encoding mechanism, the global search capability and convergence speed of the Ant Colony Algorithm (ACA) are improved in large-scale and complex heritage protection scenarios. The specific methods are as follows: 1) This paper quantifies the ICH protection needs as a multi-objective optimization problem, and constructs parameterized models such as heritage projects, resource constraints, and protection priorities; 2) It uses quantum bit encoding to achieve state space expansion and improve population diversity through quantum gates; 3) This paper designs a hybrid mechanism based on pheromone updating and local search to enhance the algorithm's ability to escape local optimality. An experiment using 50 ICHs in a province compared the performance of HQACA with classic ACA and a genetic algorithm (GA) in terms of resource utilization, scheduling time, and protection path cost. The results showed that HQACA maintained a stable resource utilization rate between 93.6% and 95.2%, converged within 60.5 rounds, and achieved a protection path cost below 1300. HQACA can more effectively address ICH protection resource allocation and path planning, significantly improving the scientific nature and efficiency of intelligent planning.

Analysis of spatio-temporal data is a common research topic that requires the interpolations of unknown locations and the predictions of feature observations by utilizing information about where and when the data were observed. One of the most difficult problems is to make predictions of unknown locations. Tensor factorization methods are popular in this field because of their capability of handling multiple types of spatio-temporal data, dealing with missing values, and providing computationally efficient parameter estimation procedures. However, unlike traditional approaches such as spatial autoregressive models, the existing tensor factorization methods have not tried to learn spatial autocorrelations. These methods employ previously inferred spatial dependencies, often resulting in poor performances on the problem of making interpolations and predictions of unknown locations. In this paper, we propose a new tensor factorization method that estimates low-rank latent factors by simultaneously learning the spatial and temporal autocorrelations. We introduce new spatial autoregressive regularizers based on existing spatial autoregressive models and provide an efficient estimation procedure. With experiments on publicly available traffic transporting data, we demonstrate that our proposed method significantly improves the predictive performances in our problems in comparison to the existing state-of-the-art spatio-temporal analysis methods.

Recent communication standards and storage systems (e.g. wireless access, digital video broadcasting or magnetic storage in hard disk drives) uses error correcting codes such as LDPC (Low Density Parity Check) or Turbo-codes to reliably transfer data between source and destination. For high data rate applications, Turbo and LDPC codes are decoded on parallel architectures. However, parallel architectures suffer from memory access conflicts and efficient memory mapping algorithms are required to design parallel interleaver architectures which are one of the most critical parts of parallel decoders. In this paper, we present a method that finds a conflict-free memory mapping for any interleaving law and associated parallelism constraint. The proposed approach always complies with the interconnection network topology the designer wants to infer. Moreover, contrary to traditional methods, the resulting architecture is optimized by reducing the cost of network and controller (network and memory controller) architectures. Our approach is compared with state of the art techniques and its interest is shown through the design of parallel interleavers used in different industrial applications such as High Speed Downlink Packet Access (HSDPA), Multi Band-Orthogonal Frequency-Division Multiplexing Ultra-WideBand (MB-OFDM UWB) and a WiMAX application.

Vulnerability analysis of distributed state estimation under joint deception attacks

With the growing numbers of both parallel architectures and related programming models, the benchmarking tasks become very tricky since parallel programming requires architecture-dependent compilers and languages as well as high programming expertise. More than just comparing architectures with synthetic benchmarks, benchmarking is also more and more used to design specialized systems composed of heterogeneous computing resources to optimize the performance or performance/watt ratio (e.g. embedded systems designers build System-on-Chip (SoC) out of dedicated and well-chosen components). In the High-Performance-Computing (HPC) domain, systems are designed with symmetric and scalable computing nodes built to deliver the highest performance on a wide variety of applications. However, HPC is now facing cost and power consumption issues which motivate the design of heterogeneous systems. This is one of the rationales of the European FiPS project, which proposes to develop hardware architecture and software methodology easing the design of such systems. Thus, having a fair comparison between architectures while considering an application is of growing importance. Unfortunately, porting it on all available architectures using the related programming models is impossible. To tackle this challenge, we introduced a novel methodology to evaluate and to compare parallel architectures in order to ease the work of the programmer. Based on the usage of micro benchmarks, code profiling and characterization tools, this methodology introduces a semi-automatic prediction of sequential applications performances on a set of parallel architectures. In addition, performance estimation is correlated with the cost of other criteria such as power or portability effort. Introduced for targeting vision-based embedded applications, our methodology is currently being extended to target more complex applications from HPC world. This paper extends our work with new experiments and early results on a real HPC application of DNA sequencing.

Perceptual hashing is conventionally used for content identification and authentication. In this work, we explore a new application of image hashing techniques. By comparing the hash values of original images and their compressed versions, we are able to estimate the distortion level. A particular image hash algorithm is proposed for this application. The distortion level is measured by the signal to noise ratio (SNR). It is estimated from the bit error rate (BER) of hash values. The estimation performance is evaluated by experiments. The JPEG, JPEG2000 compression, and additive white Gaussian noise are considered.We show that a theoretical model does not work well in practice. In order to improve estimation accuracy, we introduce a correction term in the theoretical model. We find that the correction term is highly correlated to the BER and the uncorrected SNR. Therefore it can be predicted using a linear model. A new estimation procedure is defined accordingly. New experiment results are much improved.

Process variation occurring during fabrication of complex VLSI devices induce uncertainties in operation parameters (e.g., supply voltage) to be applied to each device in order for it to fit within the allowed power budget and get the optimum power efficiency. Therefore, an efficient post manufacturing performance estimation mechanism is needed in order to tune operation parameters for each device during production. The current state-of-the-art approach of using Process Monitoring Boxes (PMBs) have shown some limitations in terms of cost and accuracy that limit their benefit. Simulation results on ISCAS'99 benchmarks using 28nm FD-SOI library show that the accuracy of PMB approaches is design dependent, and requires up to 8.20% added design margin. To overcome those limitations, in this paper we propose an alternative solution using transition fault (TF) test patterns, which is able to eliminate the need for PMBs, while improving the accuracy of performance estimation. The paper discusses a case study on real silicon comparing the performance estimation using functional test patterns and the TF based approach on a 28nm FD-SOI CPU. The results show a very close correlation between TF test patterns and functional patterns.

Fine-grained traffic flow measurement, which provides useful information for network management tasks and security analysis, can be challenging to obtain due to monitoring resource constraints. The alternate approach of inferring flow statistics from partial measurement data has to be robust against dynamic temporal/spatial fluctuations of network traffic. In this paper, we propose an intelligent Traffic (de)Aggregation and Measurement Paradigm (iSTAMP), which partitions TCAM entries of switches/routers into two parts to: 1) optimally aggregate part of incoming flows for aggregate measurements, and 2) de-aggregate and directly measure the most informative flows for per-flow measurements. iSTAMP then processes these aggregate and per-flow measurements to effectively estimate network flows using a variety of optimization techniques. With the advent of Software-Defined-Networking (SDN), such real-time rule (re)configuration can be achieved via OpenFlow or other similar SDN APIs. We first show how to design the optimal aggregation matrix for minimizing the flow-size estimation error. Moreover, we propose a method for designing an efficient-compressive flow aggregation matrix under hard resource constraints of limited TCAM sizes. In addition, we propose an intelligent Multi-Armed Bandit based algorithm to adaptively sample the most “rewarding” flows, whose accurate measurements have the highest impact on the overall flow measurement and estimation performance. We evaluate the performance of iSTAMP using real traffic traces from a variety of network environments and by considering two applications: traffic matrix estimation and heavy hitter detection. Also, we have implemented a prototype of iSTAMP and demonstrated its feasibility and effectiveness in Mininet environment.