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  • https://doi.org/10.1109/9780470545331.ch33Copy DOI Icon

MixedMode Simulation of PhaseLocked Loops

  • Jan 1, 2009
  • Behzad Razavi
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Abstract

This paper describes behavioral models for mixed-mode and multi-level simulation of phase-locked 100ps(PLLs). PLLs are a difficult class of systems to evaluate using conventional circuit simulators because of the mixed analog digital signals involved, and extensively long runtimes required to capture the performance. Behavioral modeling techniques and a mixed-signal simulator, the AT&T Bell Laboratories ADAMS simulator, are used to overcome these limitations. An all analog PLL is simulated at the behavioral level to measure the lock-in characteristics as well as the tracking range. A high-speed digital PLL is simulated at the behavioral level, as well as at a multi-level using device-level models for the phase detector, to measure the lock-in time and detect false locking.

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