Wideband characterization of a Doherty amplifier using behavioral modeling

In this paper a behavioral power amplifier model with substantially lower normalized mean-square error than the well-known and widely used parallel Hammerstein or tapped delay line model is presented. This is significant since the parallel Hammerstein model currently must be considered to be the baseline for behavioral power amplifier modeling efforts. The proposed model does also have at least as low total error as any other model know n to the authors for measurements on class-AB LDMOS power amplifiers. Further, the proposed model exhibits an equal or lower out-of-band error than the parallel Hammerstein model The parameters of the model can be extracted using straightforward system identification techniques. Together this makes the proposed model a strong candidate to replace the parallel Hammerstein model as the model of choice for behavioral power amplifier modeling for many applications.

In this paper a behavioral power amplifier model with substantially lower normalized mean-square error than the well-known and widely used parallel Hammerstein or tapped delay line model is presented. This is significant since the parallel Hammerstein model currently must be considered to be the baseline for behavioral power amplifier modeling efforts. The proposed model does also have at least as low total error as any other model known to the authors for measurements on class-AB LDMOS power amplifiers. Further, the proposed model exhibits an equal or lower out-of-band error than the parallel Hammerstein model The parameters of the model can be extracted using straightforward system identification techniques. Together this makes the proposed model a strong candidate to replace the parallel Hammerstein model as the model of choice for behavioral power amplifier modeling for many applications.

In this paper, we evaluate the effect of applying peak-to-average power ratio (PAPR) reduction and digital pre-distortion (DPD) on two types of radio frequency power amplifiers when an orthogonal frequency division multiplexing (OFDM) signal is used. The power amplifiers under test are a standard class-AB amplifier and a Doherty amplifier. The PAPR reduction methods are based on a state-of-the art convex optimization formulation and on the standard clipping and filtering technique. The DPD method consists of modeling the behavior of the power amplifier using a parallel Hammerstein model, and then extracting the inverse parameters based on the indirect learning architecture. To achieve better DPD performance, extracting the DPD parameters based on multiple-step iterations is investigated. The cases where PAPR reduction and DPD are applied separately and combined are studied and investigated. Power amplifier figures of merit are evaluated. Good performance is shown when combining both pre-processing techniques up to a certain operating point where DPD performance deteriorates due to generation of strong peaks in the signal. In addition, a difference in the power amplifier behavior is reported and analyzed.

Power amplifier (PA) behavior is inextricably linked to the characteristics of the transistors underlying the PA design. All transistors exhibit some degree of memory effects, which must therefore be taken into account in the modeling and design of these PAs. In this paper, we will present new trends for the characterization, device modeling, and behavioral modeling of power transistors and amplifiers with strong memory effects. First the impact of thermal and electrical memory effects upon the performance of a transistor will be revealed by comparing continuous wave and pulsed RF large-signal measurements. Pulsed-RF load-pull from the proper hot bias condition yields a more realistic representation of the peak power response of transistors excited with modulated signals with high peak-to-average power ratio. Next, an advanced device modeling method based on large-signal data from a modern nonlinear vector network analyzer instrument, coupled with modeling approaches based on advanced artificial neural network technology, will be presented. This approach enables the generation of accurate and robust time-domain nonlinear simulation models of modern transistors that exhibit significant memory effects. Finally an extension of the X-parameter (X-parameter is a trademark of Agilent Technologies Inc.) behavioral model to account for model memory effects of RF and microwave components will be presented. The approach can be used to model hard nonlinear behavior and long-term memory effects and is valid for all possible modulation formats for all possible peak-to-average ratios and for a wide range of modulation bandwidths. Both the device and behavioral models have been validated by measurements and are implemented in a commercial nonlinear circuit simulator.

In this paper, we propose an auto-companding technique for the analog behavioral modeling via wavelet collocation method. The companding function is automatically constructed according to the singularities of the input-ouput function of the circuit block. Such a general-purpose technique can be applied for the automatic modeling of arbitrary building block of arbitrary input-output function. Moreover, compared with the published modeling approaches, this method works more efficiently in reducing both the modeling error and the number of basis functions in wavelet expansion.

In view of the influence of model errors in conventional BeiDou prediction models for clock offsets, a semiparametric adjustment model for BeiDou Navigation Satellite System (BDS) clock offset prediction that considers model errors is proposed in this paper. First, the model errors of the conventional BeiDou clock offset prediction model are analyzed. Additionally, the relationship among the polynomial model, polynomial model with additional periodic term correction, and its periodic correction terms is explored in detail. Second, considering the model errors, combined with the physical relationship between phase, frequency, frequency drift, and its period in the clock sequence, the conventional clock offset prediction model is improved. Using kernel estimation and comprehensive least squares, the corresponding parameter solutions of the prediction model and the estimation of its model error are derived, and the dynamic error correction of the clock sequence model is realized. Finally, the BDS satellite precision clock data provided by the IGS Center of Wuhan University with a sampling interval of 5 min are used to compare the proposed prediction method with commonly used methods. Experimental results show that the proposed prediction method can better correct the model errors of BDS satellite clock offsets, and it can effectively overcome the inaccuracies of clock offset correction. The average forecast accuracies of the BeiDou satellites at 6, 12, and 24 h are 27.13%, 37.71%, and 45.08% higher than those of the conventional BeiDou clock offset forecast models; the average model improvement rates are 16.92%, 20.96%, and 28.48%, respectively. In addition, the proposed method enhances the existing BDS satellite prediction method for clock offsets to a certain extent.

New mobile applications require the use of Radio Frequency Power Amplifiers (RF PA) in a context of reconfigurability and adaptability. In this paper, we propose a modeling study of RF PA in this context. The proposed approach is a combination of a Feedback-Wiener (FW) structure with a Memory Polynomial (MP) model, which gives a pruned Volterra series. A FIR filter is used in the FW model as a feedback path to reproduce the PA memory effects. Also, a recursive identification algorithm based on the key-term separation principle is proposed and used for an experimental characterization of an LDMOS PA (50W–500MHz to 2.5GHz), with different carrier frequencies, bandwidths and output powers. The comparison with a conventional Generalized Memory Polynomial model (GMP) shows that the proposed model presents the same performances in term of behavioral modeling, with the advantage of a reduced number of parameters.

Summary form only given, as follows. An accurate packaged model is reported for GaAs HVHBT 120W amplifiers at 2140MHz. The model can precisely simulate small signal S-parameters as well as large signal harmonic load-pull power sweep. Very good agreement between simulation and measurement has been achieved. The model is then applied to simulate a 250W symmetric Doherty amplifier. The results of simulation agrees well with measurement. The difference in efficiency between simulation and measurement is only 1.6%.

Two novel models with lower complexity are proposed for linearization of 2×2 MIMO transmitters with nonlinear crosstalk. Crossover modified memory polynomial (COMMP) model is introduced as an extension of the 2-D modified memory polynomial (2-D MMP) model and COMMP-CPWL model is derived from the COMMP model but without high-order terms which are replaced by the canonical piecewise linear function. Genetic Algorithm (GA) is used to achieve optimal digital predistortion (DPD) performance and least-square (LS) algorithm is adopted to extract the models coefficients. Experimental results show that both models can achieve nearly the same DPD performance and model accuracy as the 2×2 Parallel Hammerstein (PH) model while requiring fewer model coefficients.

In modern distributed energy systems (DES), focus is shifting from the conventional centralized approach towards distributed architectures. However, modeling and analysis of these systems is more complex, as it involves the interface of multiple energy sources with many different type of loads through power electronics converters. The integration of power electronics converters allows distributed renewable energy sources to become part of modern electronics power distribution systems (EPDS). It will also facilitate the ongoing research towards DC-based DES which is mostly composed of commercial DC-DC converters whose internal structure and parameters are unknown. For the system level analysis, the behavioral modeling technique is the only choice. Since most power electronics converters are non-linear systems and linear models can’t model their dynamics to a desired level of accuracy, hence non-linear modeling is required for accurate modeling. The non-linear modeling approach presented here aims to develop behavioral models that can predict the response of the system over the entire operating range. In this work, either a lookup table or a polytopic structure-based modeling technique is used. The technique is further applied to cascade and parallel connected converters, being two DES scenarios. First the procedure is verified via application to switching models in a simulation and then validated for commercial converters via experiments. The results show that the developed behavioral models accurately predict both the transient and steady state response.

This paper presents an improved behavioral modeling technique that generates large-signal models for nonlinear amplifiers or devices based on load-pull AM-AM and AM-PM measurement datasets. The generated behavioral model characterizes the incident and scattering waveforms at two ports in the frequency domain based on the large-signal scattering function theory. The advantage of this technique is that it is derived entirely from load-pull measurements and provides an analytic method to utilize the load-pull measurements in practical designs. Examples are given to demonstrate the ability of the behavioral models to predict the load-related nonlinearities of the device-under-test.

Dual-frequency piezoelectric microelectromechanical systems (MEMS) microphones based on highly doped AlSc30%N thin films are developed for aeroacoustic measurements with high sensitivity, wide bandwidth, and large dynamic range. Comparing with the previous version based on lead zirconate titanate (PZT) thin films, the sensitivity of AlSc30%N based dual frequency MEMS microphones is significantly improved and no direct current bias is required for the new AlSc30%N material. The microfabrication, packaging, and testing of MEMS microphones with two pairs of triangular cantilevers were conducted using the cleanroom facilities and characterization tools. The MEMS die structure was characterized by a focused ion beam scanning electron microscopy (FIB-SEM). The resonant frequencies and mode shapes of large and small cantilevers were measured by laser Doppler vibrometer (LDV) to evaluate their mechanical performance. The aeroacoustic characterizations were conducted at the BACCHUS test bench in Airbus. The sensitivity of 3.2mV/[email protected], signal-to-noise ratio (SNR) of 60.2 dB (ref. 94 dB SPL, 30kHz), frequency range up to 55 kHz, and dynamic range up to 147 dB SPL were obtained in the first preliminary test. The MEMS microphone samples were also acoustically characterized within high-speed air flow. The overall performance of the dual-frequency piezoelectric MEMS microphones based on AlSc30%N thin films is better than the state-of-the-art microphones taking into account key parameters such as form factor, acoustic performance, and product price.

This paper describes behavioral models for mixed-mode and multi-level simulation of phase-locked 100ps(PLLs). PLLs are a difficult class of systems to evaluate using conventional circuit simulators because of the mixed analog digital signals involved, and extensively long runtimes required to capture the performance. Behavioral modeling techniques and a mixed-signal simulator, the AT&T Bell Laboratories ADAMS simulator, are used to overcome these limitations. An all analog PLL is simulated at the behavioral level to measure the lock-in characteristics as well as the tracking range. A high-speed digital PLL is simulated at the behavioral level, as well as at a multi-level using device-level models for the phase detector, to measure the lock-in time and detect false locking.

In this paper an equivalent complex baseband representation of the analog component related non-linearity of digital transmitters relying on 1-bit complex baseband encoding is derived. By exploiting the properties of the pulsed RF encoding the novel behavioral modeling technique is able to represent accurately the non-linear memory effects of the power amplification stage. Furthermore, a band-limited kernel technique leads to more efficient modeling of the complete digital transmitter, and to relaxed sampling rate. For the parameter estimation the linear regression, common to Volterra model identification, can be employed. According to the simulation and measurement based verification results, the novel modeling technique excels the state-of-the-art in terms of modeling accuracy. It can be assumed that the given methodology serves both as a basis for future behavioral models and for the development of advanced encoding techniques for linearization purposes.

The inherent nonlinear behavior exhibited by power amplifiers (PAs) in saturation mode is a major impediment in wireless systems to achieve higher power efficiency, and higher spectral efficiency. Although PA behavioral modeling and digital predistortion (DPD) techniques are widely utilized at transmitter to characterize and linearize such distorted nonlinear output of PAs, the nonlinear distortions with memory effects have become more severe due to simultaneous strong crosstalk between multiple PA branches in multiple-input multiple-output (MIMO) arrays. Furthermore, current multi-input behavioral models suffer from a sharp increase in number of coefficients as the number of transmitter path increases in MIMO. In overcoming these challenges, we propose a decomposed cross-correlation based single-input-single-output (CC-SISO) behavioral modeling architecture. The proposed solution utilizes a low-cost, novel cross-correlation based method to estimate and cancel the simultaneous nonlinear and reverse crosstalk from multiple PA branches. Once the crosstalk is mitigated, the MIMO DPD can be implemented with single-input DPD blocks which significantly reduces the complexity. Furthermore, CC-SISO DPD eliminates the requirement for signal feedback paths before and after the PA, and thus reduces overall hardware implementation complexity. Through simulations, we demonstrate that the proposed CC-SISO architecture can reduce the overall complexity of state-of-art multi-input DPD models for MIMO systems.