Modeling and Analysis of Real-Time Software Based on Resource Communicating Sequential Process

With the progress of low-power research on real-time systems, the estimation and analysis of energy consumption of real-time systems becomes a hot topic. Process Algebra is a formal method fit for analyzing the functional properties of real-time systems, but it can not analyze the energy consumption properties. This paper proposes a formal method support for modeling and analyzing energy consumption of real-time software. Resource Timed Communicating Sequential Process (RTCSP) is proposed in this paper can handle it efficiently by extending resource information on Timed Communicating Sequential Process (TCSP). In this paper, the power consumption of instructions in real-time systems is mapped into the resource of RTCSP, the energy consumption of real-time software can be modeled and optimized by using RTCSP, the optimal path algorithm is proposed to calculate the minimum energy consumption reachability path of real-time systems. This formal method improves the accuracy and efficiency of energy calculation, the calculation results can be used to quantitatively analyze and optimize the energy consumption of real-time systems.

Recently, significant progress has been made in the development of timed process algebras for the specification and analysis of real-time systems. This paper describes a timed process algebra called ACSR, which supports synchronous timed actions and asynchronous instantaneous events. Timed actions are used to represent the usage of resources and to model the passage of time. Events are used to capture synchronization between processes. To be able to specify real systems accurately, ACSR supports a notion of priority that can be used to arbitrate among timed actions competing for the use of resources and among events that are ready for synchronization. The paper also includes a brief overview of other timed process algebras and discusses similarities and differences between them and ACSR.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The CSP (communicating sequential processes) method is useful for the development of sequence control mechanisms. From the specifications in CSP, one can investigate the nature and workings of a sequence control mechanism by the process composition calculation or algebra, prove deadlock absence by the algebra, and find the most suitable module structures of the control programs. In this paper, specifications of a silo system with concurrently working components are described in CSP, the movements are investigated by process composition calculations, and the deadlock absence of the system is proved by the calculations. Based on the discussions, specifications of a silo system with two source silos, two measuring hoppers, a mixer, two conveyors and two destination silos are described in CSP, and the system is implemented in the programming language Ada. The author's studies include the relation of CSP specifications to Ada programs. >

Communicating Sequential Processes (CSP) is a process algebra, designed for modeling and analyzing the behavior of concurrent systems. Several security protocols are modeled with CSP and verified using model-checking or theorem proving techniques successfully. Unlike other authentication protocols modeled using CSP, each of the Efficient Multi-chained Stream Signature (EMSS) protocol messages are linked to the previous messages, forming hash chains, which introduces difficulties for modeling and verification. In this paper, we model the EMSS stream authentication protocol using CSP and verify its authentication properties with model checking, by building an infinite state model of the protocol which is reduced into a finite state model.

Schedulability analysis of software-intensive systems requires solution techniques that go beyond worst-case assumptions, fostering a cross-fertilization between the areas of real-time systems and performance engineering. We address probabilistic schedulability analysis of tasks in single-processor non-preemptive real-time systems. To this end, we consider periodic tasks with offsets, scheduled by Fixed Priority (FP) or Earliest Deadline First (EDF), and managed by the discarding policy or the rejection policy to control deadline misses. Each task has a Worst Case Execution Time (WCET) which can be a deterministic value or a random variable, notably characterized by a non-Markovian distribution possibly with bounded support. A continuous-time stochastic model of task-set is specified through Stochastic Time Petri Nets (STPNs) and solved by regenerative transient analysis based on stochastic state classes. The evaluation of performance measures on resource allocation and missed deadlines enables the analysis of design choices and the estimation of over-provisioned resources that are likely to be unused at run-time. Feasibility and effectiveness of the approach are validated on randomly generated task-sets for different processor utilizations.

In competitive sports, the most direct and effective way to improve athletes’ competitive level is to strengthen training. At present, the training mode is still mainly based on coaches’ experience and athletes’ physical conditions, and lacks scientific and effective data information as the basis for planning. In this paper, the software is developed in the core construction of recessed Linux, the VIX bus technology is take advantage of gather sports data, and the data mining technology based on collective information characteristic extraction is designed. This paper uses big data mining method to mine the information of sports evaluation, pick up the autocorrelation characteristics of data information flow of sports training real-time data analysis system, constructs the association rule feature set combined with the prior knowledge of sports evaluation, and realizes the database construction of sports training real-time data analysis system by using the association rule feature extraction and big data information fusion processing technology. The simulation results show that the accuracy of sports assess decision-making information mining using the real-time data analysis system of sports training is high, and the dependability of the system is satisfied.

In this chapter we outline a process algebra, whose name — Petri Box Calculus (PBC) — arises from its original Petri net semantics [6, 7]. PBC combines a number of features taken from other process algebras, such as COSY (Concurrent Systems notation, [62]), CCS (Calculus of Communicating Systems, [80, 81]), SCCS (Synchronous CCS, [81]), CSP (Communicating Sequential Processes, [58]), TCSP (Theoretical CSP, [59]) and ACP (Algebra of Communicating Processes, [2]). However, there are some fundamental differences with each of these process algebras since PBC has been designed with two specific objectives in mind: To support a compositional Petri net semantics, together with an equivalent — more syntax-oriented — structured operational semantics (SOS) [89]. To provide as flexible as possible a basis for developing a compositional semantics of high-level concurrent specification and programming languages with full data and control features.

As a dynamic memory virtualization technique, ballooning is widely applied in many virtualization platforms, i.e. Xen and VMware ESX Server. Since ballooning technology enables the guest OS to surrender unused memory back to the host during runtime, and it can increase utilization and flexibility of memory. Despite the rapid development and extensive use of memory virtualization technologies, it is still a challenge to analyze and verify its validity and some major properties through formal methods. In this paper, we model the ballooning under Xen architecture including Xen hyper visor, a set of virtual machines and balloon drivers using the process algebra Communication Sequential Process (CSP) in order to verify some resource control properties of ballooning. The model is implemented with Process Analysis Toolkit (PAT). As a result, the ballooning used in Xen architecture satisfies these major resource control properties in VM requirement document.

Communicating Sequential Processes (CSP) is a language used to describe and reason about concurrent systems. It consists of a process algebra combined with a functional language. This combination poses unique problems when attempting to design a type checker. In this paper the differences between a conventional functional language type checker and a type checker for the CSP language are discussed. This type checker was developed to identify polymorphic types, an important first step towards the goal of automating data independence [4]. The result of this work has been incorporated into the Adelaide Refinement Checker [8] (ARC) - a CSP based tool suite for model checking concurrent systems.

Real-time systems must avoid hazardous situations. To achieve this, their functionality should be investigated under time constraints. In this paper, a modeling based on Hierarchical Communicating Real-time State Machine (H- CRSM) and analysis methodology is proposed to examine statically ANSI-C code to obtain the hazardous events in the input system. A hazardous event equation is taken as input to the proposed system. The output is a list of hazardous scenarios. A path in the code showing the cause of the undesirable event is associated with each hazardous scenario. The strength of the proposed methodology is that the process of hazardous situations detection does not require running the ANSI-C program multiple times with different input values. It also focuses on analyzing the software level of the life cycle. Most of the verification tools check the system level. The system level may be bug-free but the software level may not.

This document is intended to contribute to the area of validation and verification of communicating real time systems, with emphasis put on parametric reachability analysis of systems modeled using timed automata.Reachability analysis is a crucial aspect of validation and verification of software and hardware systems. The reachability analysis for real time systems is area that is studied by many researchers in academic and industrial communities. However, not much work has been done for systems, where time constraints are expressed using parameters. This is serious disproportion with real world, where specifications of most of the communication protocols or embedded software and hardware systems are indeed parameterized.This thesis presents a complete framework for forward and backward parametric reachability analysis. The solution presented here can be used as a base of algorithms for validation and verification of software and hardware real-time systems, modeled as timed automata with parameters. The results of the thesis can be easily applied to model checking or test generation tools and algorithms.The core idea of the thesis is a concept of Extended Difference Bound Matrix (EDBM). This is a data structure that stores relations between all system"s clocks and parameters. In contrast to Parametric DBM, that is the state-of-the-art data structure for parametric analysis, EDBM does not require storing constraints on clocks and constraints on parameters separately. This leads to significant benefits regarding memory consumption and time necessary to perform basic operations for symbolic analysis.The maturity of the solution was proven by implementation of a proof-of-concept tool and by experiments performed with modern communication protocol. The results show that even complex systems can be efficiently handled by the framework.

We present a new net-reduction methodology to facilitate the analysis of real-time systems using Delay Time Petri Nets (DTPNs). Net reduction is one of the most important techniques for reducing the state-explosion problem of Petri nets. However, the application of net reduction to current timed-extensions of Petri nets (such as Merlin's Time PNs) is very limited due to the difficulty faced in the preservation of timing constraints. To overcome this problem, we introduce DTPNs which are inspired by Merlin's (1976) Time PNs, Senac's (1994) Hierarchical Time Stream PNs, and Little's (1991) Timed PNs. We show that DTPNs are much more suitable for net reduction. Then, we present a new set of DTPN reduction rules for the analysis of schedule and deadlock analysis. Our work is distinct from the others since our goal is to analyze real-time systems and the reduction methods we propose preserve both timing properties (schedule) and deadlock. To evaluate our framework, we have implemented an automated analysis tool whose main functions include net reduction and class-graph generation. The experimental results show that our net-reduction methodology leads to a significant contribution to the efficient analysis of real-time systems.

Timing correctness of hard real-time systems is guaranteed by schedulability analysis and worst-case execution time (WCET) analysis of programs. Traditional WCET analysis mainly deals with application programs and has achieved success in industry. Timing analysis of application programs along cannot guarantee correctness of complete systems consisting RTOS. WCET tools designed for application program analysis have been applied to analyze RTOS routines by several research groups, but poor WCET estimations have been reported. Timing analysis of real-time systems considering both applications and RTOS has not been fully studied. So we intend to give a survey of related work on WCET analysis of RTOS. By summarizing previous work, challenges of WCET analysis of complete real-time systems are presented, and some possible further research potentials are unleashed.

Real-time software is becoming more prevalent in avionics systems such as unmanned aerial vehicles and spacecrafts. More often, these systems operate with limited human interaction or an increased latency in human response. Therefore, these systems require autonomous fault detection and a repair mechanism to respond to off nominal conditions that could arise. In order to prevent a hazard, these systems require assurance that they will operate in a safe manner while successfully completing a mission. Assurance, as a software engineering activity involves the reduction of risk, and inversely, an increase in confidence in a software system. In the context of fault management, this becomes a question of increasing confidence that a software system can detect and respond to the offnominal conditions occur. This activity is not always straight forward as off-nominal conditions in complex real-time systems do not always manifest as singular events, but rather as a combination of symptoms. Furthermore, for fault management assurance to be useful it needs to be rigorous. Therefore, the approach needs to be supported by a standard, repeatable framework. The foundation for this framework is in the ability to model the fault management system integrated in the hardware and software avionics real-time system. Models can assist in assuring both functional and quality attribute requirements such as reliability. The Architecture Analysis and Design Language (AADL) is a Society of Automotive Engineers (SAE) standard notation (AS5506/1) for the modeling and analysis of real-time systems. AADL has been extended to model fault management behavior through the AADL Error Annex, also an SAE standard. At its core, the AADL Error Annex provides rules for how software and hardware components are allowed to propagate an error across the avionics real-time system modeled in AADL. Because a standard notation is being used, there is intrinsic confidence to the approach. This paper will explore how the assurance of software fault management can be applied in practice. First, it is important to briefly review AADL and the AADL Error Annex as well as common terminology related to software fault management. Next, the application of software fault management assurance will be discussed. The first step in this application is to understand the very basic (atomic) hardware and software faults that occur at the component level. This information can be collected in the form of a failure modes and effects analysis (FMEA). An analysis is required in order to evaluate the ability of the software fault management system to, at the very least, detect the symptoms. This analysis answers two fundamental questions. First, to what degree are faults visible to the avionics software? Second, to what degree does the avionics software handle these faults? This paper presents an example to demonstrate the assurance of software fault management. The software fault management assurance framework proposed in this paper utilizes a standard notation, coupled with a formal mechanism for modeling faults. This provides a rigorous foundation for analysis on the avionics software real-time system in a repeatable manner. Therefore a model based assurance activity of a software fault management system can successfully be applied.

Real-time multiprocessor systems have an increasing importance in current technology and are the source of innovations to build new applications that require high levels of computations (in for example, industrial processes, transportation, telecommunications, multimedia and medical equipment). In the context of real-time systems, it is not sufficient to prove the correctness of applications in term of results but also that those results are delivered in time. The following papers are extended, peer-reviewed, journal-versions of papers focusing on multiprocessor systems that have been selected by the conference program committee of the 19th Real-Time and Network Systems Conference (RTNS’2011) for their high quality. RTNS’2011 was held in Nantes, France in September 2011. The annual RTNS conference is mainly focused on the following topics: realtime system design and analysis; infrastructure and hardware for real-time systems; and real-time applications in the automotive, avionics, telecommunications, process control and the multimedia industries. Each paper was extended to add significant extra material and the resulting papers were re-reviewed and subject to the usual editorial process. The result is a special issue that we hope will be of interest to the real-time community. In recent years, multiprocessor architectures have become a firm favorite with the real-time community, and multicore processors are found in products ranging from small portable cell phones to large computer servers. New scheduling approaches