Modelling concurrent interactions

SUMMARYWe propose a theoretical testing framework and a test generation algorithm for concurrent systems specified with true‐concurrency models, such as Petri nets or networks of automata. The semantic model of computation of such formalisms is labelled event structures, which allow to represent concurrency explicitly. We introduce the notions of strong and weak concurrency: strongly concurrent events must be concurrent in the implementation, while weakly concurrent ones may eventually be ordered. The ioco type conformance relations for sequential systems rely on the observation of sequences of actions and blockings; thus, they are not capable of capturing and exploiting concurrency of non‐sequential behaviours. We propose an extension of ioco for labelled event structures, named co‐ioco, allowing to deal with strong and weak concurrency. We extend the notions of test cases and test execution to labelled event structures and give a test generation algorithm building a complete test suite for co‐ioco. Copyright © 2014 John Wiley & Sons, Ltd.

An abstract definition of bisimulation is presented. It enables a uniform definition of bisimulation across a range of different models for parallel computation presented as categories. As examples, transition systems, synchronisation trees, transition systems with independence (an abstraction from Petri nets) and labelled event structures are considered. On transition systems the abstract definition readily specialises to Milner's strong bisimulation. On event structures it explains and leads to a revision of history-preserving bisimulation of Rabinovitch and Traktenbrot, Goltz and van Glabeek. A tie-up with open maps in a (pre)topos, as they appear in the work of Joyal and Moerdijk, brings to light a promising new model, presheaves on categories of pomsets, into which the usual category of labelled event structures embeds fully and faithfully. As an indication of its promise, this new presheaf model has ``refinement'' operators, though further work is required to justify their appropriateness and understand their relation to previous attempts. The general approach yields a logic, generalising Hennessy-Milner logic, which is characteristic for the generalised notion of bisimulation.

The Unified Modeling Language - UML - is the most used specification language, and the way the world models not only application structure, behavior, and architecture, but also business process and data structure. In this paper, we aim to demonstrate a system development methodology by generating the UML diagrams from the requirements of the Automatic Banking Machine (ABM) System and discuss their relationships, differences and suitability. The high-level requirements of the system are specified by using use-case diagram, activity diagram, state chart diagram, collaboration diagram, sequence diagram, and component diagram, and the low-level requirements of each component using class diagrams. We briefly introduce each diagram, their usage, their advantages and some limitations, and then we discuss the relationships and differences between two or more diagrams, and suitability for modeling the different parts of the system.

We introduce an approach that deals with the verification of UML collaboration and sequence diagrams in respect to the objects internal behaviors which are commonly represented by state machine diagrams. The approach is based on the translation of theses diagrams to Maude specifications. In fact, Maude is a declarative programming language, an executable formal specification language, and also a formal verification system, which permit the achievement of the approach goals. We define in details the rules of translating UML diagrams elements into their corresponding Maude specifications. We present the algebraic structures that represent the OR-States and the AND-states in a state machine diagram, and the structure that represents the collaboration and the sequence diagrams. Also, we explain the mechanism of the execution and the verification of the translated specification, which is based on rewriting logics rules.

We introduce an approach that deals with the verification of UML collaboration and sequence diagrams in respect to the objects internal behaviors which are commonly represented by state machine diagrams. The approach is based on the translation of theses diagrams to Maude specifications. In fact, Maude is a declarative programming language, an executable formal specification language, and also a formal verification system, which permit the achievement of the approach goals. We define in details the rules of translating UML diagrams elements into their corresponding Maude specifications. We present the algebraic structures that represent the OR-States and the AND-states in a state machine diagram, and the structure that represents the collaboration and the sequence diagrams. Also, we explain the mechanism of the execution and the verification of the translated specification, which is based on rewriting logics rules.

Presents an approach to designing smart monitoring and control devices based on linearization of the system obtained from factoring the discrete system covariance matrix. The methods are nonparametric which allows the smart devices to operate with only a low level logic.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

When it comes to practical software design, UML is the standard for modeling software applications. However, the design of complex business management systems requires much more than just UML for design. In the case of process modeling, UML is far too expressive to be understood by the average business user. Thus, BPMN was introduced. Although there is an important difference in abstraction levels of rules and processes, they can be complementary. A formal model for the integration was previously provided by us. In it, the BPMN component defines the high level behavior of the system while the low level logic is defined by rules in XTT. In this chapter we continue that discussion on a practical level. We discuss challenges that need to be addressed to provide full integration, not just on the design but also the runtime level. We demonstrate how the SKE design process can be applied to this goal. Then we discuss selected metrics for the evaluation of process complexity.

The two most critical phases of SDLC are the specification and the designing phase as they involve the transformation of the semantics from real world domain to computer software systems. Unified Modelling Language (UML) has been accepted as blue print for design and specification of software critical systems. But, UML structures have the weakness in preciously defining the semantics of a system. Any misinterpretation in safety critical system’s specification may risks loss of lives. Formal methods are mathematical tools and techniques which are proven very adequate, principally, at requirement specification and design level. However, formal methods are not welcomed because of rigorous use of mathematics. Therefore, a bridge is required between UML and formal methods to overcome the above insufficiencies. The endeavour of this paper is to propose a new approach by integrating UML and Z notation, a formal specification language. The main focus of this paper is on transforming the UML diagram: use case diagram, class diagram and sequence diagram to Z Schema for capturing both the syntax and semantics, particularly for safety critical system. The resultant formal model of the approach are analyzed and verified by using Z/Eves tool.

The development of a family of applications in a domain can be greatly eased if patterns in the domain are systematically reused. Systematic use of such patterns can be achieved by tools that support the specification of patterns and their instantiation in a specific application context. In this paper, we present a prototype tool called RBML-Pattern Instantiator (RBML-PI) that generates application-specific UML class diagrams and sequence diagrams from a pattern specification described in the Role-Based Metamodeling Language (RBML), a pattern specification language defining a domain-specific sub-language of the UML. We give an overview of the RBML using the Visitor design pattern, and demonstrate the tool using an RBML specification for the CheckIn-CheckOut (CICO) domain pattern that specifies services to check in and check out items. We use the CICO pattern specification to generate an application-specific UML model of a library system using RBML-PI.

In a wide range of application areas, system behavior is modeled using variations of scenarios and state machines. In telecommunications, ITU standards SDL (Specification and Description Language) and MSC (Message Sequence Charts) are used for formal specifications and descriptions. Also, for behavioral modeling of object-oriented software systems, UML interaction diagrams (sequence or collaboration diagrams) and statechart diagrams are commonly used. Use cases can be conveniently refined using interaction diagrams, which in turn aid in recognizing class operations and associations and in building statechart specifications of object behaviour. The aim of this workshop is to build a shared understanding on the relation between scenarios and state machines and to gain insight on techniques and tools that may leverage from combining these approaches to behaviour modeling. In this workshop, we will discuss the usage of scenario-based approaches in software engineering. An emphasis area is the relation between scenarios and state-machines. Areas of interest of this one-day workshop include, but are not limited to the following three main discussion topics: 1) Models and notations (requirements for different application areas, shortcomings in current notations, new suggestions for models or notations, categorizations); 2) Algorithms (e.g., synthesizing state machines from scenarios, implied scenarios, generating scenarios from state machines, consistency checks); 3) Tools (tool support for the issues above, different application areas). Moreover, we will identify the limitations and shortcomings of current approaches and outline possible directions for future research in the domain. A related workshop (scenario-based roundtrip eng.) was organized at OOPSLA 2000.

For many real-time applications (e.g. command, control, and communications), parallel computers offer a natural computing platform. However, very little attention has been paid to the specification requirements of real-time systems implemented on parallel machines. Towards this end, we propose a specification language PRETSEL (Parallel Real-Time Specification Language). The PRETSEL specification language is based on a traditional two-level view of parallel computing whereby a parallel computation is viewed as a collection of interacting (data) parallel algorithms. This view is naturally reflected in PRETSEL syntax where at the lower level various constructs are provided for the specification of a data-parallel real-time algorithm (data-parallelism). At the upper level another set of constructs is provided to combine such tasks in a variety of way (task-parallelism). Furthermore, the PRETSEL language allows for the specification of performance requirements. PRETSEL is currently being evaluated for real-time avionics applications. We describe the syntax and operational semantics of PRETSEL and establish results relating the functional and the temporal behaviors.

Event structures and trace monoids

The specificity of impairments in specific reading disabilities (SRD) and specific language impairments (SLI) has recently been questioned, with many children recruited for studies of SRD and SLI demonstrating impairments in both reading and oral language development. This has implications for the results of SRD and SLI studies where both reading and oral language skills are not assessed. Thus there is a need to compare the profiles of children with both oral language and reading impairments to groups of children with SRD and SLI. The reading, oral language, short-term auditory memory, phonological processing, spelling, and maths abilities of 151 children (aged between 7 and 12 years) drawn from a Learning Disabilities Clinic were assessed. Five groups were identified, including children who demonstrated either a specific reading disability or a specific language impairment and children who showed evidence of both reading and oral language impairments. Differences were found between the groups on maths, phonological processing, short-term auditory memory, and spelling measures, with the children displaying both language and reading deficits generally performing at a lower level than the children with specific reading or language deficits. It was concluded that more careful screening needs to be conducted in both clinical and research settings to accurately identify the nature of deficits in children with reading and oral language difficulties. Furthermore, a third and separate category of children with a mixed pattern of impairments needs to be considered.

Mining large data sets is no longer the prerogative of computer scientists - specialists in a wide variety of domains are performing analytics as a day-to-day activity. Often such analyses are specific to the domain and analysts are required to devise new algorithms or techniques. For such scenarios, providing a high-level programming environment that delivers high performance on clusters is a challenge. We propose a framework that supports high-level programming using domain abstractions in data mining while delivering scalable performance on commodity clusters i.e. clusters of multi-core workstations. This framework includes a domain specific programming language, DWARF, to enable data mining specialists to rapidly prototype algorithms. DWARF is supported by a compiler that automatically parallelizes code by identifying domain specific patterns and translating them to parallel code that exploits data parallelism and task parallelism. The compiler generates code for a hybrid virtual machine supporting distributed memory model at the top level and shared memory model nested within. The code generated by the compiler can be scheduled on commodity clusters. We compare the proposed framework with other frameworks commonly used for data mining on distributed platforms.

Many large scale circuits and systems contain a mixture of synchronous and asynchronous (self-timed) subsystems; examples include digital control units and sequencers, processing units that have asynchronous interfaces to busses or memories, and systems that contain modules that are clocked by independent, locally generated clocks. This paper addresses some of the formal issues that arise in the specification and synthesis of such “mixed-mode” systems. In particular, we outline a specification technique suitable for such systems, formalize the notion of timing disciplines in this context, and indicated how the introduction of timing disciplines into a design affect the associated specifications. We also outline the correlations between the semantic models underlying such specifications, called temporally annotated labeled event structures (abbreviated TALES) and timing diagrams that are commonly used for specifying some of the temporal characteristics of interfaces. Some experiments in prototyping some of the implementation strategies for asynchronous, self-timed and mixed-mode systems are summarized.KeywordsEvent StructureTiming DiagramCausal IndependenceInterface ProtocolSynchronous ComponentThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.