Modelling of temperature distribution along PCB thickness in different substrates during reflow

This study investigates the effects of printed circuit board (PCB) thickness on adjustable fountain and conventional wave soldering. The pin-through-hole (PTH) vertical fill is examined with three PCBs of different thicknesses (i.e., 1.6, 3.1, and 6.0 mm) soldered through adjustable fountain and conventional wave soldering at conveyor angles of 0∘ and 6∘. The vertical fill of each PCB is the focus. The PTH solder profile is inspected with a non-destructive X-ray computed tomography scanning machine. The percentages of the PTH vertical fill of both soldering processes are also estimated and compared. The aspect ratio of the PCB is also investigated. Experimental results reveal that adjustable fountain wave soldering yields better vertical fill than conventional wave soldering. The vertical fill level of adjustable fountain wave soldering is 100%, 90%, and 50% for the 1.6, 3.1, and 6.0 mm PCB thickness, respectively. FLUENT simulation is conducted for the vertical fill of the solder profile. Simulation and experimental results show that the PTH solder profiles of the two soldering processes are almost identical. The effect of PCB thickness on PTH voiding is also discussed.

This paper discusses the thermal management challenges presented when using power flip chips on organic laminate structures, and evaluates design variables that would produce the lowest thermal resistance between the die surface and a product housing. Power integrated circuits are often mounted in a package that features design elements for both electrical interconnect and thermal management. One such package is the TO-220. This package allows the electrical interconnect path to be separate from the thermal path by using the center pin as the electrical connection for the drain, and the tab as the thermal management path. When this package is not used, and the die is placed directly on the Printed Circuit Board (PCB) as a flip chip, the electrical and thermal paths come very close in proximity, creating conflicting requirements under the flip chip. This paper addresses these issues and proposes a solution for thermally managing a power flip chip. Included in this paper are basic design options for optimizing the thermal path and how it interacts with electrical interconnect requirements. Specific chip design considerations such as flip chips with two sets of solder bumps for thermal and electrical connection are discussed. Unique PCB technologies including embedded heat-sinks are also evaluated. Detailed evaluations using Finite Element Analysis (FEA) models are shown to determine the optimized design and the interaction between several variables including solder bumps, PCB vias and PCB thickness are discussed. Empirical test results using special thermal test die and various PCB configurations are also presented.

The paper presents soldering tests on biodegradable printed circuit boards (PCB) focusing on different alternative base materials. The aim of the work was to investigate and optimize different low-temperature soldering profiles on cellulose-acetate (CA) and polylactide (PLA) biopolymer-based PCBs with the application of special lead-free solder alloy suited for the temperatures. The investigations were focused on the minimization of the heating effect on the heat-sensitive biopolymers, where on the other hand, sufficient thermal energy is required to melt the solder alloys. The soldering profiles were created with a custom vapour phase soldering (VPS) approach where the heat transfer is controlled with an adaptive height-setting, temperature tracking sample holder. The profiles were evaluated according to their heating factor values. The soldered joints were evaluated with X-Ray microscopy and Shear Tests. The deformation of the PCB tracks was also investigated. The preliminary results reveal the priority of CA for further experiments.

Flexible electronics and sensors are a key enabling element for the realization of wearables and geometry adaptive devices needed to follow current trends such as the Internet of things or Industry 4.0. Within this paper, we present a new and flexible packaging platform by the fabrication of an ultra-thin and highly flexible printed circuit board (PCB).The thermoplastic polymer Parylene, which combines a variety of unique properties such as optical transparency, biostability and biocompatibility according to ISO 10993, thermal stability as well as low permeability for gases and water, was used as the base for the new PCB.Particularly, its mechanical properties, especially the absence of intrinsic stresses, as well as its low Young’s modulus and good bendability are advantageous when using Parylene films as a free-standing substrate for flexible applications. The chemical inertness of Parylene against all common acids, bases and solvents ensures its compatibility with established standard microsystem technologies.For the realization of ultra-thin flexible PCBs, Parylene was used as a substrate as well as for the encapsulation and protection layer, respectively. Furthermore, Parylene was the dielectric between the metallic conductive layers. These redistribution layers (RDL) were deposited and patterned by standard microsystem technologies, such as sputtering, lithography and wet chemical etching. Hence, structure sizes of down to 10 µm were successfully realized. Different metals, such as gold, copper, and aluminum were tested for the RDL. Alternatively, printing technologies such as screen printing and aerosol jet printing were successfully demonstrated for the if conductive silver layerse. The electrical connection between the various RDL was of special interest throughout the study and was realized by etching vertical vias through the Parylene using oxygen plasma. Due to the low total thickness of the flexible Parylene PCB of 20 µm or even less, the obtained vias through the Parylene feature an advantageous low aspect ratio. For the contact formation through the vias, different methods were investigated, e. g. sputtering, printing and electrochemical deposition.Finally, the fabricated flexible Parylene PCB were characterized with respect to their bendability and electrical properties. Doing so, the resistivity and capacitance were measured as well as the frequency response between 20 kHz and 500 MHz. Particularly, for frequencies below 1 MHz the realized flexible Parylene PCBs show a good electrical performance.A third function of Parylene with respect to the realization of an ultra-thin and flexible PCB is its usage as a barrier or capping layer. Doing so, new approaches such as embedding electronic or sensor components in the flexible PCB can be enabled. Other integration technologies such as wire bonding, printing or gluing were investigated with respect to their usability for the new flexible PCB as well. Besides, also the direct fabrication of sensors on the Parylene flexible PCB was successfully demonstrated by the realization of a flexible potentiometric pH sensor.The presented new type of ultra-thin PCB is a versatile platform for the realization of flexible electronics, sensors and devices. Due to its biocompatible properties, the flexible Parylene PCB can be used for medical applications but also for the integration of MEMS, chemical sensors and optical components, respectively. Doing so, it enables the realization of smart systems for wearable applications and their integration into light weight constructions. Within this paper, the concept of this new approach, the respected fabrication and integration technologies as well as possible applications are presented in detail. Figure 1

The paper focuses on biodegradable Printed Circuit Boards (PCB) from the aspect of PCB fabrication technology and soldering. Different biodegradable Cellulose Acetate (CA) PCBs were used during the tests (one sided and two sided), and the possible application of pre-preg was also taken into account to improve pad adhesion on the base material. The surfaces of the boards were evaluated in order to obtain information about copper adhesion. FR4 test boards were also investigated as a reference, both for soldering and surface analyses. The soldering profile setup was focused on minimizing high temperatures on the heat-sensitive biopolymer substrates. The soldering profiles were created with a custom vapour phase soldering (VPS) device. The customized solder profile setting is conducted with an adaptive temperature-tracker sample holder. The boards and the solder joints were investigated with non-destructive optical microscopy, X-ray microscopy (deformation and joint analysis), and destructive shear tests. The results are promising for future application of biodegradable PCBs.

In this research project we provide one quick design method for a high current density power distribution board design and improvement on a high end server system. It is based on system power source to sink the current path for design PCB (Printed Circuit Board) copper shape dimension and thickness, and add some power or ground via for stitching each power or ground plane on a multi-layer PCB design to reduce DCR (Direct Current Resistance), and also considers airflow for cooling the power distribution board to make a lower temperature increase with lower power loss and a higher power efficiency with performance per watt.

A plated-through hole (PTH) in multi-layer printed wiring boards (PWB) is defined as hole in which electrical connection is made between internal or external conductive patterns, or both, by plating of metal on the wall of the hole. The recent trend to increase the packaging density at all levels has resulted in a significant increase in PWB wiring layers and in turn for PTH density in order to communicate between the layers of circuitry. The increase in overall PCB thickness, coupled to the decrease in PTH diameter makes the PTH integrity during the assembly process and subsequent field stresses one of the primary reliability concerns in PWB production and usage. Thermo-mechanical stresses mainly due to mismatch in out-of-plane (z-direction) coefficient of thermal expansion (CTE) between the PTH metal and the laminated material can result in the failure of the PTHs. Failure of a PTH constitutes an electrical discontinuity which may be caused by fracture of the plating material at the barrel, fracture at the land-barrel junction, or delamination of the plating from the PWB. This paper will discuss the reliability performance of the PTHs when subjected to T/C (Temperature Cycle) stresses. During the initial reliability stressing through 1000 T/C 'B' (-55 to 125/spl deg/C) and T/C 'C' (-65 to 150/spl deg/C) electrical opens were observed. Physical analysis showed that the opens were due to barrel cracking of the PTHs. Extensive mechanical modeling and experimental validation were used to suggest changes in the materials, process and design to eliminate barrel cracking in high aspect ratio PTHs. Results of these analyses will be discussed in detail.

In this paper the wetting properties of lead free solder alloys were investigated on different printed circuit boards (PCB) during Vapour Phase Soldering (VPS), which is an alternative reflow method with non-conventional heat-transfer mechanism. Our motivation was to investigate the phenomenon on PCBs with different thermal capacities, with different heating power and with different solder alloys. The aim of the research is to clear the relations between the thermal capacities of the) PCBs and the spreading of the solder on it, and to investigate the effect of the change of heating power on the solder spreading during VPS. In addition, the impact of the VPS on different solder alloys and the performance of the VPS machine in the wake of the contact angle quality was investigated. Findings show that the thickness of the PCB is not affecting significantly the spread and the wetting. The composition of the alloy, the paste, and the heating power points to observable differences in the final results.

Purpose – The paper aims to present a comparative study of various thermocouple (TC) attaching methods for the proper measurement of soldering temperature profiling during vapour phase soldering (VPS). The heat transfer process during VPS is different from common methods, while the required heat for reflow is provided by the condensation. The condensate is a flowing layer on the board, where the dynamic behaviour also affects the local conditions on the surfaces. Temperature measurements based on TCs are also affected this way; it is important to investigate the process for deeper understanding. Design/methodology/approach – Bare printed circuit boards (PCBs) were prepared for standard K-Type TCs attachment with industry standard materials: kapton polyimide tape, aluminium tape, SMD adhesive and high-temperature solder (HTS). Heating experiments were performed in a batch-type VPS oven with Galden LS240 fluid and fixed oven parameters. Findings – According to the specific attachment requirements, HTS and Alu-tape are the suggested methods for better profiling reliability and repeatability. Alu-tape is the preferred all-around method, for fast, exchangeable, cheap, reliable and repeatable profiling in a VPS oven. It was presented that the heating factor (Q?) gives more reliable comparison overview; the time period-based comparisons may be affected by the thermal inertia, while heating factor also includes temperature conditions at the given time points. Originality/value – The paper presents the reliability of the presented methods for VPS and present suggestions for the use of different TC ends and attaching materials during condensation heating of the PCBs. Also a new approach on profiling data evaluation based on the heating factor is presented and suggested for wider use.

Shadow moire technique is already well-established as a technique for evaluating component warpage. Improvements to the metrology have increased its usefulness for evaluating various board-level manufacturing technologies. This experiment used the technique for two key board-level applications: i) Bare printed circuit board (PCB) warpage during the lead-free reflow: PCB warpage is becoming more significant due to the higher temperature required for lead-free reflow. This work used shadow moire dynamic reflow simulation to explore the effect of three variables - board thickness, glass transition temperature, and vendors - on board warpage. The test data showed clearly that board thickness is the most significant variable; ii) Assembled board warpage under mechanical preload from thermal solutions and under thermal cycling: One of the heatsink design approaches for desktop motherboards is to apply a preload to the CPU area of a motherboard in order to ensure thermal performance. This approach requires a more careful control of the preload. Board warpage is significant and is identified as a good metrology for preload estimation. Motherboards under three different preloads in the CPU area were measured. Both the global board warpage and the local board warpage around the CPU area were measured for preload correlations. The measured board warpage was correlated to the board preload successfully. In addition to these two issues, other examples are discussed briefly to demonstrate the capability of the board level shadow moire technique. The work proved that the metrology has become an indispensable thermal-mechanical analysis for manufacturing technology evolutions.

Estimation of the direct leakage of rotary air preheaters based on temperature distribution modeling

"Electronic manufacturing is currently one of the fastest growing industrial areas. This is due to the rapid advances in the computer and telecommunications sectors. Due to these advances, new surface mount devices have been developed to achieve greater miniaturisation at lower costs. As a result, a new surface mount technology has been developed to mount these devices onto printed circuit boards. However, problems exist with aspects of this process, principally open solder joints which result from circuit board warpage. The aim of this thesis is to undertake a) both an experimental and theoretical investigation of the reflow solder process and b) to develop thermal and structural models to analyse circuit board warpage. This research should aid manufacturing engineers in understanding the influence of the solder reflow process parameters on board warpage. Extensive experimental testing of the circuit board materials during the process is also presented. The thermal model detailed in this thesis simulates a) forced convective heat transfer through air impingement to the boards and b) the three dimensional temperature distribution within a composite laminate. The thermal model predicts the temperature distribution within a populated laminated composite circuit board to within 3% when compared to experimental data. The experimental results show that the convective heat transfer coefficient is primarily dependant on Reynolds number, and also the orifice to plate distance and orifice diameter. It was found that at high Reynolds number, the heat transfer coefficient increases significantly at low orifice to board distance. This heat transfer rate has to be balanced against the maximum speed of the air to prevent the components been blown off the boards. The 5mm diameter orifice provides the optimum balance between air speed and heat transfer rate. The structural model simulates the influence of a) board support, b) reflow temperature profile, c) components on the board and d) board layup on circuit board deformation. The experimental appraisal and model predictions show that the warpage of the printed circuit boards is dependant on a) support of the board during the process, b) symmetry of the board layup, c) coefficients of thermal expansion of the board materials, d) temperature distribution in the boards i.e. symmetric or nonsymmetric about board centre and e) temperature applied to the board. This research proves that if adequate support is applied to the boards during the reflow soldering process then, the warpage of the printed circuit boards may be kept within acceptable margins. Board warpage exists in current printed circuit boards because a) the boards cannot be manufactured truly symmetric in layup and b) Non-uniform temperature distributions are present in the board during the solder reflow process which leads to non-uniform expansion of the constituent laminate layers due to their varying coefficients of thermal expansion."

This study investigates lignocellulose nanofibrils (LCNF) as a sustainable alternative material for printed circuit board (PCB) substrates, demonstrating an application through the development of an eco-friendly computer mouse demonstrator. LCNF is derived from lignin-rich cellulose pulp, a side stream product of biorefinery processes, combining the natural strength of cellulose fibrils with lignin to enhance mechanical and electrochemical properties. The research outlines the process of fibrillating lignin-rich cellulose pulp at 10 kW/h per kg into LCNF, followed by thermal and pressure treatment (at Δp = 50 – 1500 kN, ΔT = 30 – 120 °C) to achieve a rigid PCB substrate. Comprehensive characterization of the LCNF substrate included assessments of its mechanical properties (flexural and tensile testing), dimensional stability, electrical properties, surface uniformity and thermal conductivity. The LCNF PCB was integrated in a computer mouse demonstrator featuring inkjet printing of circuit layouts and electronic component assembly, while the mouse housing was designed and 3D-printed using eco-friendly Wood-PLA filament. Electrical properties characterization of the printed circuit and resulting functionality of the computer mouse showcases a sustainable approach to eco-electronics using wood-derived materials. This study underscores the potential of wood-derived nanomaterials like LCNF to reduce electronic waste (e-waste) associated with conventional PCB materials and promote the development of a more eco-friendly electronics, contributing to sustainable, high-performance ecoPCBs and advancing green technology.

The dynamic response of the printed circuit board (PCB) in a standard board-level drop impact test has been modeled as a spring-mass system, a beam, and a plate. Analytical solutions for the time-response and amplification of the deflection, bending moment, and acceleration at any point on the PCB have been developed and validated with finite element analysis. The analyses have shown that (i) the response of the PCB was dominated by the fundamental mode and (ii) the response of the PCB depends heavily on the ratio between the frequency of the PCB and the input acceleration pulse. The bending moment on the PCB has been shown beyond doubt to be responsible for the interconnection stress; the maximum moment on the PCB can be most effectively reduced through reducing the PCB thickness. The rapid receding of the higher modes in the moment response suggests that it can be adequately and effectively modeled using the standard implicit time-integration code.

Modeling heat transfer and chemical reactions during pyrolysis of a single PCB particle.