Modified Capacitor Voltage Balance Method for Novel Four-Level Nested Neutral Point Clamped Dual-Active-Bridge Converter

The analysis of the conducted studies of the operation of high-voltage power lines (LEP) showed that the maximum power losses per corona are characteristic of increased voltages on high-voltage power lines with their low load, as well as in bad weather. Thus, a 5% increase in voltage at low line load leads to an increase in power losses per corona up to 30%. When it rains, power losses per corona for a 330 kV transmission line increase by 10 times compared to losses in good weather, for a 500 kV transmission line, the increase in losses is 12 times, and for a 750 kV transmission line - 13 times. During frost, the maximum power losses per crown are observed, which for a 330 kV transmission line increase by 23 times compared to losses in good weather, for a 500 kV transmission line, the increase in losses is 25 times, and for a 750 kV transmission line - 21 times. It should be noted that deterioration of weather conditions, in which there is an increase in corona power losses, is observed for more than 20% of the entire period of operation of the transmission lines during the year. Under such conditions, more than 80% of the total power losses per corona in the transmission line occur. The development and implementation of organizational and technical measures aimed at reducing power losses at the crown of power lines is an important practical task, the solution of which will contribute to increasing the efficiency of the electrical networks of Ukraine. Studying the possibility of influencing the amount of power losses due to the use of modern wire designs is an urgent task at the stage of designing power lines. The use of innovative brands of wires can lead to an increase in power losses per corona, due to their design features. Heat-shrinking films can be used to apply an insulating layer to sections of power lines, which will prevent corona and reduce losses associated with it. It is necessary to study the distribution of electric field strength along the span of the transmission line to determine the quantitative indicators of power losses per corona

Neutral Point Clamped (NPC) converter configuration is suitable for operation at Medium Voltage DC (MVDC) level as it allows the use of a higher DC bus voltage than the blocking capability of individual switching devices. The Active NPC (ANPC) configuration offers more flexibility than NPC in terms of control and power loss distribution. NPC/ANPC phase leg aspires to be an ideal candidate for the MVDC side of a Dual Active Bridge (DAB) converter which is used in a wide range of applications requiring bidirectional power flow, voltage matching and soft-switching. Operation under Zero Voltage Switching (ZVS) and the conducted Electromagnetic Interference (EMI) performance of the ANPC converter phase leg is being analyzed in this paper. Based on the analysis, a Printed Circuit Board (PCB) bus-bar has been designed to suppress the high frequency conducted EMI of the system. Minimization of parasitic capacitance from drain to heat sink has also been discussed.

The inherent problem of dc-link capacitor voltage imbalance in multilevel diode-clamped converters limits their development and industrial applications. By using conventional space vector PWM (CSVPWM), for higher voltage levels (>3), the balancing of capacitors voltages cannot be attained under some operational conditions. Virtual vector PWM (VVPWM) assures the balancing of capacitor voltages for all operational conditions with the expense of computation burden by rapid increase in triangular regions for higher levels as compared to CSVPWM. To overcome this problem, this paper presents a simplified virtual vector PWM (SVVPWM) algorithm for four-level diode-clamped converter. The pair of new virtual vectors is defined in such a way that the space vector diagram of four level converter is transformed into three level space vector diagram that reduces the computation burden by decreasing the number of triangular regions. The proposed modulation algorithm guarantees the balancing of middle capacitor voltage in each carrier cycle and the balancing of bottom and top capacitor voltages in a fundamental cycle. The simulation results validate the proposed algorithm under the full range of load power factor and modulation index.

The most critical problem of the modular DC-DC converter (MDCC) is the voltage balancing of the submodule (SM) capacitors, the MDCC with stepped 2-level modulation has been developed and presents a good solution, however, this type of modulation has many restrictions when there is a wide range of capacitance tolerance of the SM capacitors that results inaccurate capacitor voltages balancing. To solve this problem, this paper discusses a proposed method of capacitor voltage balancing. Compared with stepped 2-level modulation, the voltage balancing method using modified duty cycle modulation offers the merits: i) reduction in output voltage and SM capacitor voltages overshoot during dynamic operation and improvement in the time response of the system and; ii) accurate voltage balancing over wide range of capacitance tolerance of each SM capacitor; and iii) the sorting algorithm replaced with modified duty cycle modulation method for the SM capacitor voltages balancing which reduces the computation burden. The proposed method ensures a stable voltage balancing, improves the time response of the system, and decreases the voltage and current overshoot during the dynamic response compared with prior art of MDCCs, where the stepped 2-level modulation is adopted. An analytical simulation of the MDCC is presented using MATLAB/Simulink to explain the operation.

High-frequency dc solid-state transformer (DCSST) plays an important role in DC bus connection, voltage conversion, electrical isolation, and bidirectional power transmission in dc distribution networks. In various DSSCT topologies, the dual-active-bridge (DAB) scheme becomes a typical solution for DCSST due to its various advantages. However, the DAB scheme still has drawbacks during practical applications. In this article, a DAB with half-bridge submodules (HSDAB) is proposed. By replacing the switches in front bridge arm with half-bridge submodules (SMs), the proposed HSDAB scheme maintains the advantages of conventional DAB and obtains bidirectional dc fault-handling capability, reducing the application of large dc capacitors and dc circuit breaker; therefore, the volume and construction cost of DCSST can be effectively reduced. Besides, a high-frequency-link (HFL) voltage regulation strategy for HSDAB is also proposed in this article. The HFL voltages can be adjusted to match the HFL transformer voltage ratio during the whole operating range, reducing the current stress, HFL reactive power, and power loss of DCSST. Moreover, the proposed HSDAB scheme can also be applied as a basic circuit to establish multiple modular architecture DCSST, flexibly connecting low-voltage dc, medium-voltage dc, and high-voltage dc buses in the dc distribution network. The topology, operation principle, control structure, corresponding bidirectional dc fault handling, and HFL voltage regulation strategy of the proposed HSDAB scheme are investigated. The experimental results verify the correctness and effectiveness of the analysis and proposed scheme.

PurposeMaintaining a balanced neutral point, reducing power loss, execution time are important criteria for the controlling of neutral point clamped (NPC) inverter. However, it is tough to meet all the challenges and also supplying the load current within the harmonic limit. This paper aims to maintain load current quality within the Institute of Electrical and Electronics Engineers 519 standard and meet the above-mentioned challenges.Design/methodology/approachThe output load current of a three-level simplified neutral point clamped (3 L-SNPC) inverter is controlled in this paper using model predictive control (MPC). The 3 L-SNPC inverters is considered because fewer semiconductor devices are used in this topology; this will enhance the reliability of the system. MPC is used as a controller because it can handle the direct current-link capacitors’ voltage balancing problem in a very intuitive way. The proposed 3 L-SNPC yields similar current total harmonic distortion (THD), transient and steady-state responses, voltage stress and over current protection capability as the conventional NPC inverter. To reduce the computational burden of the proposed SNPC system, two simplified MPC strategies are proposed, namely, single voltage vector prediction-based MPC and selective voltage vector prediction-based MPC.FindingsThe system shows a current THD of 2.33% at 8.96 kHz. The overall loss of the system is reduced significantly to be useful in medium power applications. The required execution times for the simplified MPC strategies are tested on the hardware dSPACE 1104 platform. It is found that the single voltage vector prediction-based MPC and the selective voltage vector prediction-based MPC are computationally efficient by 8.28% and 62.9%, respectively, in comparison with the conventional MPC-based conventional NPC system.Originality/valueMultiple system constraints are considered throughout the paper and also compare the SNPC to the conventional NPC inverter. Proper current tracking, over-current protection, overall power loss reduction especially switching loss and maintaining capacitor voltages balance at a neutral point are achieved. The improvement of execution time has also been verified and calculated using hardware-in-loop of the dSPACE DS1104 platform.

This study suggests a novel ultra‐step‐up dc–dc converter with low normalised voltage stress across the power devices. The proposed converter incorporates the conventional boost converter with a self‐lift circuit and charge pump concept and utilises a voltage multiplier cell at the output side. In the input side, two inductors are magnetised during the switch on‐time. During the switch off‐time, the stored energy in these inductors, charge pump capacitor and input source, is delivered to the load. Accordingly, the proposed converter is capable of providing high voltage gains with a small duty cycle. Besides, the voltage stress across the power devices is low. Therefore, the MOSFET switch with low R DS‐on and devices with reduced nominal voltage can be used which in turn reduces the conduction and turn‐on losses. The analysis of the voltage and current stresses is accomplished. The circuit performance is compared with other solutions in the literature in terms of voltage gain and normalised voltage stress of the semiconductors. Eventually, to validate the theoretical analysis, the experimental results are given.

The DC transformer is a fundamental component in DC distribution networks, enabling isolation, voltage conversion, and power transfer, and has therefore attracted significant research interest. Among available topologies, the isolated modular multilevel DC transformer (iMMDCT) integrates the advantages of the modular multilevel converter (MMC) and the dual-active bridge (DAB), offering high-voltage capability, large power handling, modular scalability, and flexible control. With these features, it is regarded as a strong candidate for medium-voltage (MV) DC applications. However, the iMMDCT requires a large number of submodules (SMs) capacitors as energy storage elements. The frequent insertion and bypassing of SMs generate circulating currents in the converter arms, leading to increased losses, elevated device stress, and reduced system reliability. To address this problem, this paper proposes a circulating current suppression method by incorporating an additional full-bridge SM into each arm of the iMMDCT. Simulation studies conducted in MATLAB/Simulink validate the feasibility and effectiveness of the proposed approach.

This paper presents a new, simple and generalized approach to calculate flying capacitor currents for an n-level flying capacitor converter without the use of look-up tables. The performance of the proposed method has been studied for a three-, four- and five-level flying capacitor converter in MATLAB/Simulink environment.

A modular converter structure for medium voltage DC (MVDC) applications is presented in this paper. The new converter structure is designed in such a way that, the modularity is available not only for voltage but also for current ratings, using the available devices. The new converter will be applicable for a wide range of medium voltage applications and using its modularity it also can be scaled up for high voltage applications. The proposed-converter control is described and the overall operation is explained through simulation. A simple active-reactive power control is utilized for the converter control. It has been highlighted, through simulation, that the proposed converter has a high degree of design flexibility introduced by its high number of redundant switching states. These redundancies are implemented for controlling the capacitor voltages of the converter modules. More importantly, they provide the converter with a DC and AC sides fault-handling capability; a function that is essential for an MV converter. It is explicitly shown that the converter can provide ancillary services to the grid during DC faults.

A reliable modular DC-DC converter that is well-suited to the MVDC grid applications is presented in this dissertation. This converter benefits from zero current turn-off and soft turn-on switching. Each power module is designed and controlled such that it employs two small film capacitors for transferring the power from the input to the output. This feature eliminates the need for electrolytic capacitors that have high failure rates. Furthermore, each power module is configured as an isolated converter, using an integrated high frequency transformer. Each power module in the proposed modular converter sees only one semiconductor on the conduction path to transfer energy from the input to the link capacitors or from the link capacitors to the output, which results in relatively low conduction losses. Another advantage of the proposed converter is the possibility of having bidirectional flow of power. The zero current turn-off feature in the proposed converter allows using any type of active switches, even Silicon Controlled Rectifiers (SCRs), which are naturally commuted switches. SCRs have numerous advantages over the other power switches, including higher voltage ratings and current ratings, lower power losses, lower cost, and higher reliability, which are all of particular importance in the MVDC grid application. The main limitation of SCRs is that they have natural commutation and cannot be turned off with gate signals. The approach employed in this dissertation enables the use of SCRs in the proposed modular DC-DC converters. The input and output terminals of the power modules can be connected in series or in parallel to form modular converters that facilitate sharing voltage or current in high power applications. In this dissertation, an input-parallel output-series (IPOS) modular configuration is considered to increase the voltage blocking capability at the output and handle high currents at the input of the converter. The dissertation studies the principles of the operation of this converter and presents its design procedure. Also, a modified topology for reducing the number of inputs switches is proposed. Multi-port configurations that allow having several independent input sources in this modular DC-DC converter are presented in this dissertation. In addition, a brief comparison between the proposed topology and a dual active bridge (DAB)-based modular converter, which is the most common DC-DC converter topology used in MVDC grid, is carried out. In addition, the performance of the proposed modular converter is evaluated through simulations and experiments--Author's abstract

In this paper, the thermal performance analysis and optimization of the package of a specific multi-heat source power device is carried out. Firstly, the finite element analysis software ANSYS Icepak is used as a tool to build a simplified model of the array type multi-power device package module. Secondly, the impact of five variable parameters on thermal performance of multi-heat source power devices is analyzed. These parameters are chip size, chip power consumption, die attach material, packaging material, package size. Finally, through the orthogonal test analysis method, the junction temperature and thermal resistance of the package are selected as the test indexes, and five parameters are selected as the orthogonal test factors to analyze the influence of the five parameters on the thermal performance. The results show that the thermal conductivity of the die attach material is most significant regardless of the package junction temperature or thermal resistance. By summarizing the influence of various factors on the thermal performance of power devices, the suggestions for optimizing the thermal performance of multi-heat source power devices are proposed. The results obtained have important guiding significance for the thermal performance optimization of power devices.

Power Electronic Traction Transformers (PETT) are a trend in railway traction because of higher power density and efficiency. A PETT system achieves this by having Medium Frequency Transformers (MFT) in their converter modules as galvanic isolation. The latest PETT systems use Wide Band Gap (WBG) semiconductors to further increase system efficiency. All state-of-the-art PETT systems are developed for the Medium Voltage (MV) AC Railway Electrification Systems (RES). This work however, proposes a PETT system for a novel MV DC RES. In another article, we already studied, evaluated and presented different state of the art PETT topologies to choose an optimal one for this application. The paper will present simulation results for an 8-module Input Series Output Parallel (ISOP) MVDC PETT system capable of 1.2MW of total power. The converter topology used in the modules is Dual Active Bridge (DAB). In this paper, a decoupling method is also deduced for 8 modules to control each module separately. Results show how modules with different initial capacitor voltage are self-balancing and stabilizing at the same input voltage value. The results and theoretical notions obtained in this project will lay the foundation of a novel smart MVDC RES.

Current-fed isolated DC-DC converters are widely studied and adopted in low-voltage high-current applications, such as photovoltaic (PV) systems, fuel cells, and energy storage systems. This is due to the advantages they provide, including low input current ripple and high step-up ratio. In high-voltage DC-DC applications or thin-film PV modules with higher maximum power point (MPP) voltage ranges, high-voltage switches are required as switches in conventional two-level dual active bridge (DAB) DC-DC converters must withstand the whole port voltage. In this paper, a three-level current-fed neutral-point-clamped (3L-CF NPC) DC-DC converter is designed and implemented, utilizing low-voltage rating MOSFETs and offering high control flexibility and low electromagnetic interference (EMI) due to the limited dv/dt. First, the operation principle, power characteristics, and current characteristics in different modes under the dual-phase shift (DPS) modulation scheme are discussed. It has been discovered that certain operating regions impose voltage stress on the primary switches under this modulation strategy. A detailed circuit analysis is presented to identify the coordinates of the safe operation region with reduced voltage stress, demonstrating the expansion of the safe operation region for 3L-CF NPC compared to 3L-voltage-fed (VF) NPC. An extensive analysis of zero-voltage switching (ZVS) conditions is performed for both primary and secondary switches to determine the soft-switching areas under various operating and design conditions. Moreover, the trajectories of control parameters, aimed at optimizing the turn-off current and RMS values of switches under different source and load conditions, are identified for the purposes of efficiency improvement. Finally, the performance of the proposed converter is verified with experimental results from a laboratory prototype, exhibiting high efficiency, voltage balancing, no voltage stress, and ZVS across various load conditions.

The development of DC custom power protection devices is still in infancy that confines the sensitive loads integrated into medium-voltage (MV) and low-voltage (LV) DC networks. Considering the DC doubly-fed induction generator (DC-DFIG) based wind energy conversion system (WECS), this paper proposes a dual active bridge (DAB) based DC unified power quality conditioner (DC-UPQC) with the integration of super-conducting magnetic energy storage (SMES) to maintain the terminal voltage of DC-DFIG and regulate the current flow. The principle of the proposed DC-UPQC has three parts, i.e., parallel-side DAB (PDAB), series-side DAB (SDAB), and SMES, used for the voltage compensation, current and power regulation, and energy storage, respectively. The circuit principle of the PDAB and SDAB and the modeling of SMES are analyzed in this paper. A DC dual control strategy is also proposed to deal with the DC voltage oscillation generated by the AC-side asymmetrical fault. A case study of DC-DFIG interfaced with DC power grid is carried out, integrated with the proposed SMES-based DC-UPQC to verify the high-power applications of the proposed structure. Finally, an experiment is implemented, and the results demonstrate the correctness of the theoretical analysis and the feasibility of the proposed structure.