MPROLOG (Multi Value Prolog) Manual and Source Code.

This paper presents a new method of rule based fuzzy logic inferencing solely based on a many-valued logic, Lukasiewicz many-valued logic. Fuzzy logic can be considered as an extended set many-valued logic. Many-valued logic is extended from two-valued logic but differs from it in that each has different sets of primitives. The authors believe that fuzzy logic should be solely based on many-valued logic. In this paper, an implication connective of Lukasiewicz many-valued logic is proposed to be a basis of the conditional proposition in a new fuzzy logic inferencing method. Corresponding to this implication connective, a max-/spl delta/ composition is derived from Lukasiewicz many-valued logic and it is shown to fit human intuition. The advantage of the new fuzzy logic inferencing, over other fuzzy logic inferencing, is that it provides a solid theoretical basis for further study of its inferencing behavior when used in a certain application, such as in a fuzzy controller. An example, using machine vision to detect surface flaws of machined parts, is given. >

Chapter 20 - Automated Deduction for Many-Valued Logics

Quantum logic, usually interpreted as non-distributive but two-valued logic, is reinterpreted as many-valued logic. This allows to explain the logical background of the wave-particle duality exhibited in the double-slit experiment in a better way than it can be done with the use of classical two-valued logic.

Examining the significance of high-level programming features in source code author classification

Object-oriented methods create software artifacts through the application of a large number or rules. Rules are typically formulated in two-valued logic. There are a number of problems on how rules are defined and applied in current methods. First, two-valued logic can capture completely neither method developers' intuition nor software engineers' perception or artifact types. Second, artifacts are generally produced based only on a subset of relevant properties. Third, two-valued logic does not modal explicitly contextual factors, which can affect the validity of methodological rules. Fourth, no means is supplied to deal with multiple design alternatives and to measure the quality of each alternative during the development process. High loss of information, early elimination of artifacts and process iterations are some of possible fastidious effects. To reduce these problems, this paper proposes fuzzy logic-based methodological rules. Thanks to its ability to cope with uncertainty and imprecision, and to compute with real-world linguistic expressions, fuzzy logic appears to be a natural solution for improving current methods.

Many-valued logic based interval reasoning plays an increasingly important role in fuzzy and other many-valued extensions of two-valued (crisp) logic. It is often overlooked that many-valued logic (MVL) reasoning has a richer inference rule base than the crisp (i.e. classical two-valued) logic. Indeed some rules that are not possible in the crisp logic (which is point-based) do come to existence when we accept intervals as the basic elements of the semantic space ([0, 1] or a more general lattice) into which the logic expressions are valuated [11, 8, 37].

This study presents new low‐power multiple‐valued logic (MVL) circuits for nanoelectronics. These carbon nanotube field effect transistor (FET) (CNTFET)‐based MVL circuits are designed based on the unique characteristics of the CNTFET device such as the capability of setting the desired threshold voltages by adopting correct diameters for the nanotubes as well as the same carrier mobility for the P‐ and N‐type devices. These characteristics make CNTFETs very suitable for designing high‐performance multiple‐ V th circuits. The proposed MVL circuits are designed based on the conventional CMOS architecture and by utilising inherently binary gates. Moreover, each of the proposed CNTFET‐based ternary circuits includes all the possible types of ternary logic, that is, negative, positive and standard, in one structure. The method proposed in this study is a universal technique for designing MVL logic circuits with any arbitrary number of logic levels, without static power dissipation. The results of the simulations, conducted using Synopsys HSPICE with 32 nm‐CNTFET technology, demonstrate improvements in terms of power consumption, energy efficiency, robustness and specifically static power dissipation with respect to the other state‐of‐the‐art ternary and quaternary circuits.

In this short paper we will discuss on saturated and κ-saturated models of many-valued (t-norm based fuzzy) logics. Using these peculiar structures we show a representation theorem à la Di Nola for several classes of algebras including MV, Gödel, product, BL, NM and WNM-algebras. Then, still using (κ)-saturated algebras, we finally show that some relevant subclasses of algebras related to many-valued logics also enjoy the joint embedding property and the amalgamation property.

As in binary, a multiple-valued programmable logic array (PLA) realises a sum-ofproducts expression specified by the user. However, in multiple-valued logic, there are many more operations than in binary, and an important question is the choice of operations which provides the greatest number of functions for a given chip area. In this paper, we analyse various PLA configurations using operations realised in the peristaltic multiple-valued CCD technology. We compare a multiple-valued CCD PLA implementation with four other proposed designs and show that there is a significant difference in chip area required to realise the same set of functions. The basis of comparison is the set of 4-valued unary functions.

Lisp is a very flexible and powerful language, but up to now it has not been used intensively for applications in scientific computing. The main reason is the prejudice that Lisp is slow. While this prejudice may have been true in early stages of Lisp’s history, it is not really true today. Furthermore, the virtues of Lisp are becoming more and more important. In this contribution, we support this point of view: first, by comparing the efficiency of BLAS routines written in C and Common Lisp and second, by discussing the recently developed toolbox FEMLISP for solving partial differential equations with finite element methods and multigrid.

: The question of whether branching-time temporal logic or linear-time temporal logic is best for reasoning about concurrent programs is one of the most controversial issues in logics of programs. Concurrent programs are usually modelled by labelled state-transition graphs in which some state is designated as the initial state. For historical reasons such graphs are called Kripke structures. In linear temporal logic operators are provided for describing events along a single time path (i.e., along a single path in a Kripke structure). In a branching-time logic the temporal operators quantify over the futures that are possible from a given state (i.e., over the possible paths that lead from a state). It is well known that the two types of temporal logic have different expressive powers. Linear temporal logic, for example, can express certain fairness properties that cannot be expressed in branching-time temporal logic. On the other hand, certain practical decision problems like model checking are easier for branching-time temporal logic than for linear temporal logic. This paper provides further insight on which type of logic is best. It is shown that if two finite Kripke structures can be distinguished by some formula that contains both branching-time and linear-time operators, then the structures can be distinguished by a formula that contains only branching time operators. Specifically, we show that if two finite Kripke structures can be distinguished by some formula of the logic CTL (i.e., if there is some CTL formula that is true in one but not in the other), then they can be distinguished by some formula of the logic CTL.

Chapter 6 - Classes of fuzzy set and logic Theories

The first and second order lattices in fuzzy logics are identified as generalization of the first and second order lattices in two-valued logic. In this context, the language of fuzzy theory are restated in order to show the flexibility gained by the relaxation of basic axioms of the two-valued logic. Example of knowledge representation are presented with Type I and Type II fuzzy sets and logics together with second order semantic uncertainty information contained within the boundaries of Type II fuzzy sets.

In this paper we present a many-valued logic programming, based on reinterpreted Belnap's 4-valued bilattice: we introduce the new semantics for a 4-valued implication by relative pseudo-complement, used for intuitionistic logics. This kind of logic programming is particularly useful for data integration with possibly incomplete and inconsistent information. We define an ontological encapsulation of the epistemic many-valued logic programs with negation, based on this bilattice, into 2-valued meta logic programs. Obtained 2-valued logic semantically reflects original epistemic many-valued logic, and can be used in order to define many-valued logic entailment and inference closure for many-valued truth assignments.

A new era of digital computation investigates the advantages of non-binary machine logic over the conventional binary logic. Multi Valued Logic [MVL] systems, where the radix is greater than 2 are evolving as a thrust area of research. Ternary logic has gained wide popularity and offers several potential opportunities for the improvement of present VLSI circuit designs. Ternary gates form the fundamental element for numerous ternary circuits, making its efficient design and simulation indispensable. This paper presents the implementation and simulation of ternary gates (TNOT, TNAND, TNOR) using injected voltage method. The binary CMOS logic is exploited to achieve the ternary logic values. The performance analysis of the ternary gates in terms of rise time, fall time and power dissipation is examined using Tanner Tool, version 13.02. The prominent subsets (S-Edit, L-Edit, T-Spice and W-Edit) of the tanner tool are used to derive the various device parameters and further verify the functionality of the gates. The layouts of the designed gates are also presented.