Multiprocessor scheduling for high quality digital audio

The throughput of a parallel execution of a DSP algorithm is limited by the iteration bound, which is the minimum period between the starts of consecutive iterations. It is given byTi?=max (Ti/Di), whereTi andDi are the total time of operations and the number of delays in loopi, respectively. The execution throughput of a DSP algorithm can be increased by reducing theTis, and this reduction can be realized by taking as many operations as possible out of loops without changing the semantic of the calculation. Since many DSP algorithms extensively use the four basic arithmetic operations, a simple and effective way of doing this reduction is to apply commutativity, associativity and distributivity on these operations. This paper presents an optimization technique, calledLoop Shrinking, which reduces the iteration bound by using the above method. Loop Shrinking is based on a heuristic method which is time-efficient for simple cases but can also tackle complex examples. An implementation of Loop Shrinking is presented in this article. The results show that it can yield a reduction in the iteration bound near or equal to careful hand-tuning.

The study presents an execution core which can be reconfigured either for calculation of digital convolution or for computation of discrete orthogonal transform by appropriate local buffer initialization of processing cells. It is shown that the data flow pattern can be changed by a single bit control signal. The proposed core can be connected to port 1 of Intel 8051 to derive the necessary control signals for reconfiguration. The core can be used as a pluggable module with existing microcontroller when DSP algorithms are required to be implemented. Using such execution core the computational load of the processor can be significantly reduced as the math-intensive components of the DSP algorithm is relegated to the execution core. The use of such pipelined core will not only caters to the need of real-time performance, but also it will facilitate scalability, reusability and flexibility for wide varieties of DSP functionalities.

Chapter 7 - Practical DSP for the Cortex-M4

Recently the border between DSP processors and general-purpose processors has been diminishing as general-purpose processors have obtained DSP features to support various multimedia applications. This chapter provides a view to general-purpose DSP processors by considering the characteristics of DSP algorithms and identifying important features in a processor architecture for efficient DSP algorithm implementations. Fixed-point and floating-point data paths are discussed. Memory architectures are considered from parallel access point of view and address computations are shortly discussed.

The authors describe two multiprocessor compiler techniques that generate synchronous multiprocessor schedules for multiple-rate algorithms represented by fully specified flow graphs (FSFGs) which contain up-samplers and down-samplers. The first scheduling technique is based on a modified multi-cyclic multiprocessor compiler that finds globally optimal solutions. The second technique generates near-optimal solutions by trading global optimality for a lower scheduling complexity. These scheduling techniques are illustrated with examples.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Multiprocessor scheduling in a genetic paradigm

The potential speedup of applications has motivated the widespread use of multiprocessors in recent years. Future real-time systems are likely to be built on multiprocessor architectures. Efficient scheduling algorithms for multiprocessors are needed so that tasks will have predictable behaviors. In this paper, recent results on multiprocessor real-time scheduling algorithms are reviewed. The review takes the form of an analysis of the problems presented by different application requirements and characteristics. A scheduling algorithm for real-time systems to be implemented on multiprocessors is proposed. This algorithm is appropriate for real-time tasks with precedence constraints.

The objective of a static scheduling algorithm is to minimize the overall execution time of the program, represented by a directed task graph, by assigning the nodes to the processors. However, sometimes it is very difficult to estimate the execution time of several parts of a program and the communication delays under different circumstances. In this paper, an uncertain intelligent scheduling algorithm based on an expected value model and a genetic algorithm is presented to solve the multiprocessor scheduling problem in which the computation time and the communication time are given by stochastic variables. In simulation examples, it shows that the algorithm performs better than other algorithms in uncertain environments.

&lt;p&gt;This paper deals with multiprocessor scheduling with rejection technique where each job is provided with processing time and a given penalty cost. If the job satisfies the acceptance condition, it will schedule in the least loaded identical parallel machine else job is rejected. In this way its penalty cost is calculated. Our objective is to minimize the makespan of the scheduled job and to minimize the sum of the penalties of rejected jobs. We have merged ‘CHOOSE ‘and ‘REJECTION PENALTY’ algorithm to reduce the sum of penalties cost and makespan. Our proposed ‘Improved Reject penalty algorithm’ reduce competitive ratio, which in turn enhances the efficiency of the on-line algorithm. By applying our new on-line technique, we got the lower bound of our algorithm is is 1.286 which is far better from the existing algorithms whose competitive ratio is at 1.819. In our approach we have consider non-preemption scheduling technique.&lt;/p&gt;

Task scheduling plays an important part in the improvement of parallel and distributed systems. The problem of task scheduling has been shown to be NP hard. The time consuming is more to solve the problem in deterministic techniques. There are algorithms developed to schedule tasks for distributed environment, which focus on single objective. The problem becomes more complex, while considering biobjective. This paper presents bi-objective independent task scheduling algorithm using elitist Nondominated sorting genetic algorithm (NSGA-II) to minimize the makespan and flowtime. This algorithm generates pareto global optimal solutions for this bi-objective task scheduling problem. NSGA-II is implemented by using the set of benchmark instances. The experimental result shows NSGA-II generates efficient optimal schedules.

The scarcity of water resources is the driving force behind modernizing irrigation systems in order to guarantee equal rights to all beneficiaries and to save water. Traditional distribution systems have the common shortcoming that water must be distributed through some rotational criteria. This type of distribution is necessary to spread the benefits of scarce resources. Irrigation systems based on on-demand delivery scheduling offer flexibility to farmers and greater potential profit than other types of irrigation schedules. However, in this type of irrigation system, the network design has to be adequate for delivering the demand during the peak period whilst satisfying minimum pressure constraints along with minimum and maximum velocity constraints at the farm delivery points (hydrants) and in the pipes, respectively. In this paper, optimum design and management of pressurized irrigation systems are considered to be based on rotation and on-demand delivery scheduling using a genetic algorithm. Comparison is made between the two scheduling techniques by application to two real irrigation systems. Performance criteria are formulated for the optimum design of a new irrigation system and better management of an existing irrigation system. The design and management problems are highly constrained optimization problems. Special operators are developed for handling the large number of constraints in the representation and fitness evaluation stages of the genetic algorithm. The performance of the developed genetic algorithm is assessed in comparison to traditional optimization techniques. It is shown that the methodology developed performs better than the linear programming method and that solutions generated by the modified genetic algorithm show an improvement in capital cost. The method is also shown to perform better in satisfying the constraints. Comparison between on-demand and rotation delivery scheduling shows that a greater than 50% saving can be achieved in total cost at the cost of reducing flexibility in the irrigation time. Finally, it is shown that minimizing standard deviation of flow in pipes does not result in the best distribution, and therefore minimum cost, neither for systems with uniform flows or those with large variations in discharge at hydrants.

Heterogeneous multiprocessor architectures allow embedded real-time systems to better match computing resources to each application's needs and dynamic workload requirements, thereby providing many opportunities for improved performance with reduced power consumption. Unfortunately, guaranteeing real-time requirements on heterogeneous multiprocessors remains a critical problem due to the lack of appropriate scheduling algorithms and analysis methods. In this paper, we consider EDZL (Earliest Deadline First until Zero-Laxity) for performance asymmetric multiprocessor scheduling. EDZL has been shown to outperform other scheduling policies such as global EDF on identical multiprocessors. We show that EDZL is still effective on performance asymmetric multi-processors, and present an efficient EDZL schedulability test. Experimental results show that EDZL scheduling is able to schedule up to 20% more task sets than global EDF and that our new EDZL schedulability test can accept up to 30% more schedulable task sets than a presently exiting one.

In smart grid several scheduling techniques have been proposed for load management in commercial, industrial and residential areas to minimize electricity cost, Peak to Average ratio (PAR) and provide user comfort maximization. Demand Side Management (DSM) is necessary for optimized results. Smart grid is a digital technology with two-way communication between the utility company and electricity consumers. Energy Management Controller (EMC) are used to maintain record of all appliances, operation time of appliances and cost which we have to pay for it. Smart grid motivates users to shift the load in Off Peak Hours (OPH) form Peak Hours (PH) through providing incentive in OPH. By this act consumers save money against load shifting from high price hours to low price hours. In this paper, Genetic Algorithm (GA) and Earthworm Optimization Algorithm (EWA) based schemes is proposed to minimize electricity cost and Peak to Average Ratio (PAR) while maximizing User Comfort (UC) via appliances scheduling.

In future wireless packet networks, it is anticipated that a wide variety of data applications, ranging from WWW browsing to Email, and real time services like packetized voice and videoconference will be supported with varying levels of QoS. Therefore there is a need for packet and service scheduling schemes that effectively provide QoS guarantees and also are simple to implement. This paper describes a novel dynamic admission control and scheduling technique based on genetic algorithms, focusing on static and dynamic parameters of service classes. A performance comparison of this technique on a GPRS system is evaluated against data services and also a traffic mix comprising voice and data.

Modified particle swarm algorithm for scheduling agricultural products