Optimized silicon photonic components for high-performance interconnect systems

Purpose — The purpose of this paper is to document in part the study that was conducted for a research project ASHRAE RP-1650, which investigates the training requirements for sustainable high-performance building (HPB) operations and maintenance (O&M). This paper documents the intent, procedures and findings of a portion of the research project, which includes a survey of O&M practices for high performance buildings in the industry. The purpose of the survey as reported in this paper was to confirm and refine the level of understanding of KSCs for operating HPBs as perceived by O&M personnel in the industry. The details of the survey and the results are presented in this paper. The survey was sent out to facility managers in the industry who are involved with the O&M of HPB systems and equipment. 221 facility managers were surveyed in this study. Design/methodology/approach — This study utilizes a concurrent mixed-method research, which considers both qualitative and quantitative responses. Findings — The study found that while most technicians were ‘moderately well' to ‘very well' trained for the configuration and components as well as the installation, repair and replacement of different high performance equipment and systems, they lacked essential knowledge to address issues such as: controls; tracking of variables; programming and operation of modulation devices implemented in high-performance systems and equipment. This finding implied a lack of ‘Systems Thinking' approach, which the study found to be pertinent and essential for the O&M of HPB systems and equipment. Originality/value — The study is utilized to identify gaps between the training requirements for O&M of HPBs identified from the literature review of the research project and the current industry practices. The identified gaps are valuable to develop learning objectives for training programs that are aimed to train personnel responsible for the O&M of HPBs.

Conceptual modeling is drawing more attention among researchers from many organizations and different disciplines including high-performance low-power multicore systems. As the popularity and demand grow, more processing power is required by the mission critical systems. Several chip vendors have developed teraflop computing systems (like Intel 80-Core Research Chip). Even though IBM offers the Roadrunner supercomputer, NSF and other research organization are looking for more powerful petascale computer system. In a petascale computer system, thousands to millions of processing cores are expected to work together using petabytes of memory to produce the expected performance. A high performance system like Roadrunner requires a very sophisticated power management system. No wonder, such a gigantic system costs millions of dollars. Conceptual modeling offers the opportunity to conduct research on complex and expensive systems in an inexpensive way. In this work, we address some key conceptual modeling issues and discuss a methodology to develop conceptual models of petascale computer systems. Important features of this methodology include data acquisition to improve accuracy by capturing the important details about the system under consideration and (system-to-) model abstraction to make the modeling manageable without eliminating any significant characteristics of the target system. We believe our findings help develop sound conceptual models of complex high performance petascale computer systems.

The number of Earth observation satellites from China increases dramatically recently and those satellites are acquiring a large volume of imagery daily. As the main portal of image processing and distribution from those Chinese satellites, the China Centre for Resources Satellite Data and Application (CRESDA) has been working with PCI Geomatics during the last three years to solve two issues in this regard: processing the large volume of data (about 1,500 scenes or 1 TB per day) in a timely manner and generating geometrically accurate orthorectified products. After three-year research and development, a high performance system has been built and successfully delivered. The high performance system has a service oriented architecture and can be deployed to a cluster of computers that may be configured with high end computing power. The high performance is gained through, first, making image processing algorithms into parallel computing by using high performance graphic processing unit (GPU) cards and multiple cores from multiple CPUs, and, second, distributing processing tasks to a cluster of computing nodes. While achieving up to thirty (and even more) times faster in performance compared with the traditional practice, a particular methodology was developed to improve the geometric accuracy of images acquired from Chinese satellites (including HJ-1 A/B, ZY-1-02C, ZY-3, GF-1, etc.). The methodology consists of fully automatic collection of dense ground control points (GCP) from various resources and then application of those points to improve the photogrammetric model of the images. The delivered system is up running at CRESDA for pre-operational production and has been and is generating good return on investment by eliminating a great amount of manual labor and increasing more than ten times of data throughput daily with fewer operators. Future work, such as development of more performance-optimized algorithms, robust image matching methods and application workflows, is identified to improve the system in the coming years.

Long-Term Outcomes of Laser Prostatectomy for Storage Symptoms: Comparison of Serial 5-Year Followup Data between High Performance System Photoselective Vaporization and Holmium Laser Enucleation of the Prostate

With the extraordinary growth in parallelism at all system scales driven by multicore architectures, computing performance is increasingly determined by how efficiently high-bandwidth data is communicated among the numerous compute resources. High-performance systems are especially challenged by the growing energy costs dominated by data movement. As future computing systems aim to realize the Exascale regime-surpassing 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> operations per second-achieving energy efficient high-bandwidth communication becomes paramount to scaled performance. Silicon photonics offers the possibility of delivering the needed communication bandwidths to match the growing computing powers of these highly parallel architectures with extremely scalable energy efficiency. However, the insertion of photonic interconnects is not a one-for-one replacement. The lack of practical buffering and the fundamental circuit switched nature of optical data communications require a holistic approach to designing system-wide photonic interconnection networks. New network architectures are required and must include arbitration strategies that incorporate the characteristics of the optical physical layer. This paper reviews the recent progresses in silicon photonic based interconnect devices along with the system level requirements for Exascale. We present a co-design approach for building silicon photonic interconnection networks that leverages the unique optical data movement capabilities and offers a path toward realizing future Exascale systems.

This study intends to investigate how the relationship between high-performance work systems and job satisfaction is influenced by perceived organizational support. The relationship between high-performance work systems and employee job satisfaction was investigated based on the social exchange perspective, and the moderating impact of perceived organizational support was examined. The claim that High-Performance Work Systems will increase social relationships between employers and employees was backed by theory. Data was collected from faculty members, and administrative staff of three public institutions and two private universities in Bahawalpur.326 was the total study sample for this study. For the collection of data, a survey research questionnaire approach was used. It was a cross-sectional study. IBM SPSS Statistics 29.0.0.0(241) is used for the purpose of Data Analysis. Cronbach Alpha and Regression were calculated. According to the results, high-performance work systems are more likely to have a beneficial effect on employees' Job Satisfaction through Perceived Organizational Support. University staff are urged to take into account the significance of implementing High-Performance Work Systems so as to increase employee satisfaction in light of the paper's findings. Evidence from the study supports the idea that Perceived Organisational Support has a moderating effect on the association between Job satisfaction and the High Performance of Work Systems that employers have implemented.

Over the past two decades, 3D techniques combined with heterogeneous integration, combining different functions and materials, have emerged as a key enabler for overcoming the physical and scaling limits of traditional 2D integration. These approaches are now expanding across multiple domains, including CMOS, memories, photonics, imagers, and RF systems, with the aim of delivering next-generation integrated systems for advanced computing (AI), analog/RF, and imaging applications. In this presentation, we will explore the fundamental techniques, recent advancements, and some challenges associated with achieving integration. Special emphasis will be placed on the role of hybrid bonding and sequential 3D integration schemes, as well as their implications for energy efficiency, device performance, and system-level innovations.3D integration has transitioned from a niche research area to a cornerstone technology in microelectronics, driven by its potential to address high density interconnect and traditional 2D scaling bottlenecks for several applications and enable heterogeneous integration at unprecedented scales. At the heart of this technological evolution are advanced schemes such as wafer thinning, Through-Silicon Vias (TSVs), hybrid bonding, and sequential 3D integration techniques. These techniques have been pivotal in shrinking the interconnect length, reducing latency, and enhancing data bandwidth in computing systems. In parallel, developments in wafer-to-wafer, die-to-wafer, and chiplet integration are enabling the seamless merging of diverse materials enabling functionalities such as logic, memory, photonics, and RF. Compact form factors are achieved enabling to boost performances of the most demanding applications such as Artificial Intelligence or Tb/s transceiver applications [1].Recent studies highlight significant progress in hybrid bonding technology, which achieves high-density interconnects at the submicron scale, thereby optimizing power delivery and thermal management in stacked devices [2]. Meanwhile, sequential 3D integration [3][4] where layers of transistors are fabricated sequentially on the same substrate, is emerging as a game-changing paradigm. It promises ultra-high-density integration with minimal parasitics, creating new opportunities for energy-efficient and high-performance systems. Several applications are foreseen including C-FETS, memories and imagers [5] .Photonic interconnects will enter in next generation 3D IC integration, addressing challenges in data bandwidth, power consumption and signal integrity and enabling photonic interposers for next generation of components for data centers and communication systems [7]. Similarly, RF [8] and analog domains [9] benefit from 3D stacking by improving front-end module integration with specific materials (III-V, HR, ...), leading to enhanced performance and higher frequencies.Despite these achievements, significant challenges remain. Thermal dissipation is a critical bottleneck [10] , particularly in densely 3D stacked architectures where hotspots can severely impact reliability and performance. Moreover, the mechanical stresses induced during bonding and processing can affect device yield and long-term stability. Our recent work in advanced thermal management and stress engineering underscores the need for interdisciplinary approaches to address these challenges. Solutions such as microfluidic cooling, novel materials for thermal interface layers and specific bonding technologies are being actively explored. Furthermore, while heterogeneous integration is currently feasible at the wafer scale—such as wafer-to-wafer hybrid bonding, which is already in mass production—expanding application fields will require advancements in die-to-wafer integration techniques.Looking ahead, the convergence of 3D integration with emerging paradigms such as neuromorphic computing, quantum technologies, multispectral and smart imagers, and advanced packaging promises to redefine system design at all levels. The synergy between 3D technologies and heterogeneous integration of advanced materials, such as 2D semiconductors, III-V, ferroelectric or oxide semiconductor [11] materials, further expands the horizon for innovation.In conclusion, 3D integration has proven to be a transformative force in microelectronics, offering pathways to overcome traditional limitations and unlock new performance dimensions. Intensive researches worldwide continues contribute to push the boundaries of what is possible, paving the way for smarter, more efficient, and highly integrated systems.

Hybrid rocket propulsion is a tipping point technology in the sense that a small, short term investment could have game changing consequences in developing green, safe, affordable and high performance systems needed in future space missions. In order to demonstrate the advantages of hybrids most effectively, the effort should be concentrated on improving the Technology Readiness Level (TRL) of the technology for a carefully selected class of missions. Arguably upper stage motors used in small launch vehicles constitute a perfect platform for this purpose due their relatively small scale and high performance requirements. The advanced hybrid rockets that are being developed by SPG are believed to have the capability to deliver high performances desirable for upper stages, while retaining the cost, environmental and simplicity advantages of the classical hybrids. In order to demonstrate the performance capabilities of advanced hybrid rockets, a design study has been conducted to replace the Orion 38 solid rocket motor with a LOX/paraffin-based system. The LOX hybrids delivering the same level of total impulse as Orion 38 system are determined to be 15-18% lighter. It has been shown that switching to higher performance hybrid upper stages could lead to payload increases up to 40% for a typical launch vehicle. The additional cost, environmental, safety, stop/restart/throttling advantages are expected to make the hybrids desirable alternatives to the existing upper stage systems.

One of the strategies used in active portfolio management is the matrix model which can be used to form different portfolios with different characteristics of stocks or companies. In this study, with the data of 156 companies listed on the Tehran Stock Exchange during the period 2011 to 2018 using the network matrix model and based on throughput accounting criteria, portfolio formation and their performance with the portfolios of the new network matrix model (Defensive, neutral and aggressive stocks) and market portfolio were compared. The results show that the proposed network matrix model portfolios based on throughput accounting criteria have higher performance than the new network matrix model in terms of Sharpe, Sortino, upside potential, and omega criteria. Also, portfolios consisting of stocks of companies with high system performance, in addition to the above criteria, have higher performance in terms of Jensen's Alpha criteria than the new network matrix model, and in terms of upside potential and omega criteria, have higher performance than the market portfolio. The performance of portfolios consisting of stocks of companies with low system performance has a stronger correlation with the market portfolio compared to the new network matrix model.

Study of effects of beam-column connection and column rigidity on the performance of SPSW system

We are delighted to introduce a Special Issue on Optical Interconnects for the IET Optoelectronics magazine. This issue presents the current status as well as some of the outstanding progress that has been witnessed in the rapidly evolving area of optical interconnects. Today, data centres (DC) and high-performance computers are struggling with limited interconnect capacity and increased power consumption while trying to meet overwhelming bandwidth demands. As photonics technologies have been rapidly maturing, optical interconnects have come into the spotlight as the means to cope with the emerging bandwidth, energy, and capacity needs. As such, a wealth of photonic interconnect solutions across the DC hierarchy has unfolded, covering from electro-optic boards to transceiver development, on-chip and on-board switches and interconnects as well as novel noninvasive monitoring methods for light controlling for compensating thermal crosstalk, fabrication tolerances and unstable environmental conditions. At the same time, the increased penetration of optical interconnects in short-reach communications, such as board and chip levels, has triggered new challenges in photonics technologies calling for new innovations with respect to integration techniques and packaging methods. This Special Issue of IET includes integrated circuits, assembly techniques, systems-level architectures, and controlling methods related to short reach ‘chip-to-chip’, ‘in-the-box’, and ‘box-to-box’ communications. Specific areas covered by this special issue include: Silicon photonic transceiver technologies and flat DC topologies; High-speed electro-optic hosting boards and fast, energy-efficient electronics; DC switches and co-packaged optic (CPO) technologies; and Noninvasive controlling techniques for complex photonic integrated circuits. The four papers in this special section promote high-performance optical interconnect architectures and key technologies to tackle the rising bandwidth demands of DCs. They cover (a) co-packaged DC optics, (b) silicon technology transceiver modules and high-speed hosting boards for multisocket server board (MSB) interconnects and (c) automated controlling architecture for complex photonic systems; Items (b) and (c) draw from impressive achievements accomplished through the recently completed European H2020 Project ICT-STREAMS. This report written by C. Mickenberg tries to shed light on motivating factors behind co-packaged optics (CPO), the trade-offs involved and their potential impact on data centre network architectures. The article reviews the evolution of DC switch application-specific integrated circuit (ASICs) and DC optics, provides a future road map and finally discusses the potential impact of CPO on the network architecture. This topic is covered by two articles. The first, written by M. Morallis-Pegios, proposes using silicon photonics to advance interconnect throughput, socket connectivity and energy efficiency in MSB layouts by enabling a flat-topology wavelength division multiplexing (WDM) point-to-point optical MSB interconnect scheme. WDM silicon photonic transceivers coassembled with their electronic circuits achieving a 50-Gb/s line rate and 400-Gb/s aggregate data transmission are demonstrated. The article also proposes silicon photonic Arrayed Waveguide Grating Router (AWGRs) that can offer collision-less time-of-flight connectivity for up to 16 nodes. The second article covering that area is written by T. Lamprecht and reports on the development of electro-optic hosting boards for on-board transceiver subassemblies which is required to eventually form the Tb/s multi-socket onboard communication. The article also discusses the electrical interface as well as photonic board requirements, including the manufacturing technique and the assembly concept that was followed to deliver terabyte per second multichip optical communication. This article, written by F. Zanetto, introduces a novel dithering technique for real-time control of multiple cascaded photonic integrated devices, proposing a calibration-free strategy to support the development and real-life diffusion of increasingly complex photonic systems. The article elaborates on the implementation of a calibration-free automated control loop exploiting integral controllers to close a real-time feedback and stabilise the optimum working point of the employed photonic devices. The effectiveness of the proposed architectural approach is experimentally validated with the error-free routing and transmission of a 30-Gbit/s optical signal traversing a cascade of micro-ring resonator filters. All of the articles selected for this Special Issue present a wide variety of key topics and significant results addressing optical interconnects in high-performance data communication systems, including new progress on architectures, systems and packaging techniques as well as novel optimised controlling methods. As guest editors, we would like to thank all of the authors for their high-quality submissions that significantly contribute to the optical interconnect field. We would also like to thank the reviewers for their valuable and constructive technical comments that greatly enhance the Special Issue, because their feedback and comments ensure the high quality of the IET Optoelectronics Journal. We hope that this IET Special Issue will provide a useful reference of the state-of-the-art in optical interconnects to readers, and we anticipate such technological perspectives will stimulate new advancements and technological outcomes that will in turn enrich the growing field of optical interconnects. This work was supported by the E.C. through the H2020-ICT-STREAMS research project (688172).

Some high performance computing (HPC) applications exhibit increasing real-time requirements, which call for effective means to predict their high execution times distribution. This is a new challenge for HPC applications but a well-known problem for real-time embedded applications where solutions already exist, although they target low-performance systems running single-threaded applications. In this paper, we show how some performance validation and measurement-based practices for real-time execution time prediction can be leveraged in the context of HPC applications on high-performance platforms, thus enabling reliable means to obtain real-time guarantees for those applications. In particular, the proposed methodology uses coordinately techniques that randomly explore potential timing behavior of the application together with Extreme Value Theory (EVT) to predict rare (and high) execution times to, eventually, derive probabilistic Worst-Case Execution Time (pWCET) curves. We demonstrate the effectiveness of this approach for an acoustic wave inversion application used for geophysical exploration.

Knowledge of the effectiveness and efficiency of computers is important when working with high performance systems. The monitoring of such systems is advantageous in order to foresee possible misfortunes or system failures. Ganglia is a software system designed for high performance computing systems to retrieve specific monitoring information. An alternative storage facility for Ganglia's collected data is needed since its default storage system, the round-robin database (RRD), struggles with data integrity. The creation of a script-driven MySQL database solves this dilemma. This paper describes the process took in the creation and implementation of the MySQL database for use by Ganglia. Comparisons between data storage by both databases are made using gnuplot and Ganglia's real-time graphical user interface.

Differential and pass-transistor CMOS logic for high performance systems

Objective: The objective of this study was to report the safety, efficacy and functional outcomes following photoselective vaporisation of prostate (PVP) with GreenLight laser for benign prostatic enlargement (BPE). Material and methods: We retrospectively analysed men who underwent PVP from April 2011 to August 2019 for BPE. Preoperative, intraoperative and postoperative details were retrieved from electronic data software. The perioperative and functional outcomes were analysed. Results: A total of 147 patients, with a mean age of 65.4 years, underwent PVP (51 patients – high performance system (HPS), 120 Watts; 96 patients – xcelerated performance system (XPS), 180 Watts). In 20 (13.6%) patients, antiplatelet or anticoagulant were continued in the perioperative period. The mean operative time, lasing time, catheterization time and hospital stay were 54.4 minutes, 38.0 minutes, 48.7 hours and 2.73 days, respectively. Postoperatively, all the functional outcomes IPSS (international prostate symptom score), QOL (quality of life), Qmax (maximum flow rate) and PVR (postvoid residue) were significantly improved from the baseline. The most common complication was dysuria (36.7%). There was no significant perioperative bleeding complications in high-risk men who were on antiplatelet or anticoagulant therapy. Conclusion: PVP is a safe, efficacious and durable surgical option in BPE including patients on antiplatelet or anticoagulant therapy. Level of evidence: Level 4