Parallel Execution of Devs in Shared-memory Multicore Architectures

Complex models in science and engineering need better techniques to execute simulations efficiently. As we need high performance computers with many processors and memory to execute complex simulations faster, we face a problem with the consumption of energy. Therefore, we need new ways to define efficiency in simulations, measured not only in terms of computation time, but in terms of the amount of energy required to execute them. The Discrete-Event System Specification (DEVS) formalism, a well-known technique for modeling and simulation, includes simulation algorithms that allow running DEVS models in parallel computers. Nevertheless, no studies exist on the execution of DEVS simulations on parallel computers efficiently in terms of energy use. In this work, we show an energy efficiency evaluation of the execution of DEVS simulations on a shared-memory multicore architecture. The results presented show that executing in parallel can improve energy efficiency in these architectures.

The Routed Discrete Event System Specification (RDEVS) is a modular and hierarchical Modeling and Simulation (M&S) formalism based on the Discrete Event System Specification (DEVS) formalism that provides a set of design models for dealing with routing problems over DEVS. At the formal level, RDEVS models (as DEVS models themselves) are defined mathematically. However, software implementations of both formalisms are based on an object-oriented paradigm. Furthermore, at the implementation design level, the RDEVS formalism is represented by a conceptual model that uses DEVS simulators as execution engines. Even when RDEVS models can be executed with DEVS simulators, the resulting data (obtained as execution outputs) remains DEVS-based, restricting the study of event flows between models influenced by routing policies. This paper shows how the RDEVS formalism design was enhanced to include event tracking in the models without altering their expected behavior during simulation. Such an improvement is based on adding new features to existing RDEVS components. These features are defined as trackers, which are responsible for getting structured data from events exchanged during RDEVS executions. The proposed solution employs the Decorator pattern as a software engineering option to achieve the required goal. It was deployed as a Java package attached to the RDEVS library, devoted to collecting structured event flow data using JavaScript Object Notation (JSON). The results highlight the modeling benefits of adding event tracking to the original capabilities of the RDEVS formalism. For the M&S community, the novel contribution is an advance in understanding how best modeling practices of software engineering can be used to enhance their software tools in general and the RDEVS formalism in particular.

System models are constructed to design, study, and understand complex systems. According to the systems modeling language (SysML) that is a standard for model-based system engineering, all engineering activities should be performed using a common model. To validate complex system models defined in SysML, simulation is usually employed. There are numerous efforts to simulate SysML models using different simulation methods and tools. However, the efficient support of automated generation of executable simulation code is still an issue tangled by the research community. This paper introduces DEVSys, an integrated framework for utilizing existing SysML models and automatically producing executable discrete event simulation code, according to model driven architecture (MDA) concepts. Although this approach is not simulation-specific, discrete event system specification (DEVS) was employed, due to the similarities between SysML and DEVS, mainly in system structure description, and the mature, yet ongoing research on expressing executable DEVS models in a simulator-neutral manner. DEVSys framework elements include (a) a SysML profile for DEVS, enabling integration of simulation capabilities into SysML models, (b) a meta-model for DEVS, allowing the utilization of MDA concepts and tools, (c) a transformation of SysML models to DEVS models, using a standard model transformation language as query/view/transform (QVT), and (d) the generation of DEVS executable code for a DEVS simulation environment with an extensible markup language (XML) interface. The definition and implementation of DEVSys elements, as well as the process for its application are demonstrated and discussed, with the aid of a simple working example.

Discrete Event Systems Specification (DEVS) formalism supports the specification of discrete event models in a hierarchical and modular manner. Efforts have been made to develop the simulation environments for the modeling and simulation (M&S) of systems using DEVS formalism, particularly in defense M&S domains. This paper introduces the DEVSim++ toolset and its applications. The Object-Analysis Index (OAI) matrix is a tabular form of objects and analysis indices for requirements analysis. DEVSim++ is a realization of DEVS formalism in C++ for M&S. VeriTool is a DEVS model verification tool. DEVSimHLA is a library to support High-level Architecture (HLA) in DEVSim++. Other tools, including KComLib, FOM2CPPClass, and KHLAAdaptor, are used to develop a smart adaptor that allows for the interoperation of simulators of any kind. PlugSim is a distributed simulation framework using plug-in methods. These tools are utilized in every stage of the M&S development process, as well as in every application of the M&S missions to the military domain. Accordingly, the applications implemented by the toolset are used in the training, analytic, and acquisition missions of the Republic of Korea military branches. We expect the DEVS applications to become more prolific as M&S demands grow, and our toolset is already proven as complete and efficient in the domain of defense M&S.

In this chapter, we formalize the multi-perspective architecture framework using the system-theoretic paradigm provided by the discrete event system specification (DEVS) formalism. The developed integration approach that allows linking up the isolated perspectives has been formalized through a concept based upon DEVS formalism called parameterized DEVS, whereby concurrent simulation processes cause live update through output-to-parameter integration. This sets up the basis for development of DEVS-based holistic models for efficient management of healthcare systems. Results of real case-based simulations are presented to show how holistic models provide new insights not heretofore attainable with unit and facility specific models.

Artificial neural networks (ANNs), a branch of artificial intelligence, has become a very interesting domain since the eighties when back-propagation (BP) learning algorithm for multilayer feed-forward architecture was introduced to solve nonlinear problems. It is used extensively to solve complex nonalgorithmic problems such as prediction, pattern recognition and clustering. However, in the context of a holistic study, there may be a need to integrate ANN with other models developed in various paradigms to solve a problem. In this paper, we suggest discrete event system specification (DEVS) be used as a model of computation (MoC) to make ANN models interoperable with other models (since all discrete event models can be expressed in DEVS, and continuous models can be approximated by DEVS). By combining ANN and DEVS, we can model the complex configuration of ANNs and express its internal workings. Therefore, we are extending the DEVS-based ANN proposed by Toma et al. [A new DEVS-based generic artficial neural network modeling approach, The 23rd European Modeling and Simulation Symp. (Simulation in Industry), Rome, Italy, 2011] for comparing multiple configuration parameters and learning algorithms and also to do prediction. The DEVS models are described using the high level language for system specification (HiLLS), [Maïga et al., A new approach to modeling dynamic structure systems, The 29th European Modeling and Simulation Symp. (Simulation in Industry), Leicester, United Kingdom, 2015] a graphical modeling language for clarity. The developed platform is a tool to transform ANN models into DEVS computational models, making them more reusable and more interoperable in the context of larger multi-perspective modeling and simulation (MAS).

Discrete event system specification (DEVS), a formalism for modeling and simulation, has been recently applied to the engineering of CPS, which also makes the necessity of model checking for DEVS arisen. Model-transformation-based approaches were first proposed; timed or linear hybrid automata are obtained from DEVS models, and then verified using model checkers. But, due to the different semantics in state transitions, the transformation often involves manual tasks, such as abstraction and approximation. To eliminate such manual tasks, we have proposed a DEVS subclass that is less expressive, but verifiable. For reachability analysis, its models can be interpreted as transition systems and region automata (RA). Although our DEVS subclass and RA have different semantics with respect to model execution, they are equivalent in terms of reachability analysis. Thus, the reachability could be analyzed based on model checking techniques of timed automata. In many DEVS-based environments, models should be developed by programming languages. To enables the modelers to specify CPS in a visual way, we have proposed a visual modeling language based on our subclass. In our language, the behavior and structure of CPS are graphically specified by basic model diagrams and coupled model diagrams, respectively. Based on our subclass and languages, we have implemented a proof-of-concept environment that supports visual modeling of CPS as well as simulation and reachability analysis of the models. To enable the consideration of the hybrid nature and heterogeneity in CPS, DEVS subclasses, languages, verification techniques and environments will be further investigated.

Discrete Event System Specification (DEVS) is a popular formalism for modeling complex dynamic systems using a discrete-event abstraction. At this abstraction level, a timed sequence of pertinent "events" input to a system (or internal timeouts) cause instantaneous changes to the state of the system. Main advantages of DEVS are its rigorous formal definition and its support for modular composition. This tutorial introduces the Classic DEVS formalism in a bottom-up fashion, using a simple traffic light example. The syntax and operational semantics of atomic (i.e., non-hierarchical) models are introduced first. Coupled (i.e., hierarchical) models are introduced to structure and couple Atomic models. We continue to actual applications of DEVS, for example in performance analysis of queueing systems. All examples are presented with the tool PythonPDEVS, though this introduction is equally applicable to other DEVS tools. We conclude with further reading on DEVS theory, DEVS variants, and DEVS tools.

We introduce a generic method based on the Discrete Event System Specification (DEVS) formalism to model and simulate a Controller Area Network (CAN) port connected to a network with other nodes. The models are tested in software and then implemented in hardware. We show a streamlined development process to model, simulate, and test the use of the CAN network for any general application using the Cadmium simulation environment for software simulations and executing the models on hardware using Real-Time (RT-) DEVS. With this method, different scenarios can be tested in the modeling and simulation phase before the models are ported onto embedded hardware.

A hybrid model is a combination of models developed in various simulation development environments. A war game model is a kind of hybrid model and consists of multiple level models. Engineering level models are interested in the change of values via time and process mathematical equations, and most of them are developed in MALTAB/Simulink. Engagement level models are concerned about state transitions by events and modeled using the Discrete Event Systems Specification (DEVS) formalism. This paper proposes a framework for interoperation of simulation tools for engineering and engagement level models simulation. The framework employs the High Level Architecture (HLA) to reuse existing models and suggests specific interfaces for MATLAB/Simulink. The proposed framework is demonstrated through simulation of a simple war game model including heterogenous models.

선박에 현대화된 다양한 항해장비들이 설치됨에도 불구하고 여전히 해양사고가 자주 일어나는데, 이런 사고의 주요 형태 중 하나가 충돌 사고이다. 우리나라 해양사고의 약 1/4이 충돌에 의한 사고이고, 이 중 대부분이 인적오류가 원인인 것으로 알려져 있다. 따라서, 항해사의 의사결정을 도울 수 있는 지능적인 지원 도구가 필요한데, 이와 관련하여 충돌위험을 추정하는 다양한 방식들이 꾸준히 소개되어 왔으며 충돌위험 상황에 대해 사람에게 친숙한 언어적 표현을 반영하여 추론하기 위해 퍼지를 활용한 연구 결과들이 많다. 이런 기존 연구들의 충돌위험도는 현재시점에서 선박들의 속도나 방향 상태가 유지되는 것을 기준으로 충돌위험도를 추정한다. 그러나, 실제 선박에서는 충분히 피항 가능 상황임에도 불구하고 충돌 위험으로 판단되어 잦은 경고를 울리는 시스템들에 대해 항해사들이 느끼는 불편함이 적지 않아 보조 장치들의 알람 기능을 꺼놓은 경우도 많은 것으로 알려져 있다. 이 연구는 선박들의 일반적인 피항 패턴을 반영한 가까운 미래 시점의 충돌위험도 예측에 관한 것으로서, 퍼지추론과 DEVS 형식론에 기반한 충돌 위험 예측 모델을 제안한다. Even thought modernized marine navigation devices help navigators, marine accidents has been often occurred and ship collision is one of the main types of the accidents. Various studies on the assessment method of collision risk have been reported, and studies using fuzzy theory are remarkable for the reason that reflect linguistic and ambiguous criteria for real situations. In these studies, collision risks were assessed on the assumption that the current state of navigation ship would be maintained. However, navigators ignore or turn off frequent alarms caused by the devices predicting collision risk, because they think that they can avoid the collisions in the most of situations. This paper proposes a model of predicting ship collision risk considering the general patterns of collision avoidance, and the approach is based on fuzzy inference and discrete event system specification (DEVS) formalism.

The industry has experienced significant advancements in recent years, primarily focusing on smart manufacturing, culminating in the Industry 4.0 (I4.0) revolution I4.0 emphasizes interconnectivity, real time data capture and transmission among machines, autonomy, and machine learning, providing manufacturing companies numerous growth opportunities. The Industrial Internet of Things (IIoT) is a core component of this revolution, becoming integral to each system and increasing complexity due to the vast number of interconnected devices and diverse physical components. The variety of virtual services distributed across the architectural layers of industrial systems (cloud, fog, edge) and the various connection types between IIoT devices introduce security and privacy challenges, which are critical issues for any system incorporating IIoT. To fully leverage IIoT’s potential, addressing these security and privacy concerns is essential. Research and design in this domain are challenging, particularly when creating a simulation environment to study a system’s behavior over time. Despite the extensive research in IoT and the significant benefits of simulation based approaches, there remains a challenge in creating detailed representations from the underlying IoT nodes to the application layer in the cloud, along with the underlying networking infrastructure. To assist researchers and practitioners in overcoming these challenges, we propose the Discrete Event System Specification (DEVS) formalism. DEVS provides a mathematical framework for modeling systems, whether discrete or continuous events, allowing for the simulation of these systems within the DEVS environment. Every system, whether real or conceptual, has a time base, inputs, outputs, and functions to determine the next state, as well as outputs that reflect the current state and inputs. Simulating the system within the DEVS environment allows one to study its behavior to predict and optimize performance patterns.

DEVS는 이산 사건 시스템을 명세하는 집합론에 근거한 수학적인 틀이다. 이러한 DEVS를 통해 시스템을 시뮬레이션할 때는 명세된 DEVS로부터 구현된 모델과 시뮬레이션 엔진으로 이루어진 실행 환경이 필요하다. 시뮬레이션 엔진은 스케줄링 알고리즘을 통해 모델을 해석하고 실행하는데, 주로 DEVS의 계층적이고 모듈러한 특성을 따라 계층적인 스케줄링 방법을 사용한다. 그러나 이 방법은 계층적인 구조로 인해 시간 관리와 메시지 패싱에 있어서 오버헤드가 존재한다. 본 논문에서는 이러한 오버헤드를 해결하기 위해 이벤트 지향 시뮬레이션을 적용한다. 이벤트 지향의 시뮬레이션은 이벤트에 의해서 모델이 실행되며 이벤트 리스트에 의해 이벤트가 관리된다. 이벤트 리스트에 의해서 시간 관리가 되고 메시지 패싱이 이루어지기 때문에 계층적인 오버헤드를 줄이고 성능 향상을 이룰 수 있다. 본 논문은 이벤트 리스트를 이용한 실행 환경을 제안하고 이러한 실행 환경을 위한 모델 구현 방안에 대해 논하며, 각 실행 환경의 성능을 비교, 분석한다. DEVS(Discrete Event Systems Specification) is a set theoretic formalism developed for specifying discrete event system. For execution of DEVS, we need an execution environment, which consists of simulation engine and models interpreted by the simulation engine. Common existing environments use hierarchical scheduling algorithm for DEVS execution. This hierarchical scheduling is a proper algorithm for DEVS execution because of hierarchical and modular characteristics. But this algorithm has overheads owing to message passing and time management. To overcome these overheads, we apply event-oriented simulation to DEVS execution and we remove hierarchical overheads. In eventoriented simulation, the scheduling of model execution is performed by events and event list. We propose three event-oriented execution environments for DEVS and experiment about the performance of our proposed environments in comparison with the existing execution environment using the hierarchical scheduling. The experimental results show our environments works better than existing environment using the hierarchical scheduling.

In this paper, we introduce a novel parallelization technique for Discrete Event System Specification (DEVS) simulation of continuous and hybrid systems. Here, like in most parallel discrete event simulation methodologies, the models are first split into several sub-models which are then concurrently simulated on different processors. In order to avoid the cost of the global synchronization of all processes, the simulation time of each sub-model is locally synchronized in a real-time fashion with a scaled version of physical time, which implicitly synchronizes all sub-models. The new methodology, coined Scaled Real-Time Synchronization (SRTS), does not ensure a perfect synchronization in its implementation. However, under certain conditions, the synchronization error introduced only provokes bounded numerical errors in the simulation results. SRTS uses the same physical time-scaling parameter throughout the entire simulation. We also developed an adaptive version of the methodology (Adaptive-SRTS) where this parameter automatically evolves during the simulation according to the workload. We implemented the SRTS and Adaptive-SRTS techniques in PowerDEVS, a DEVS simulation tool, under a real-time operating system called the Real-Time Application Interface. We tested their performance by simulating three large-scale models, obtaining in all cases a considerable speedup.

This paper presents the results obtained with a tool used to model and simulate discrete event systems, based on Discrete Event systems Specification (DEVS) formalism. Its main features are presented and its use shown through application examples. The use of this formal approach allowed development of safe and cost-effective simulations. A simulated processor was built to study the different levels of a computer system. The goal was to help the full comprehension of the computer behaviour used in computer organization courses. The environment helped the students understand these complex systems and also allowed them to make empirical comparisons and performance studies for educational purposes.