Performance characteristics digital boundary current control AC-DC converter

This paper presents a novel zero-crossing point detection method for boundary current mode PFC converter. In the conventional boundary current mode, the zero-crossing point is detected by observing the inductor voltage. When the digital controller is used in the conventional method, the detection of the zero-crossing point is delayed due to the delay time caused by the processing of DSP. And the detection of the zero-crossing point is also delayed by the effect of the parasitic capacitance of main components in the PFC converter. As a result, the boost converter operates under the discontinuous mode. The harmonic currents occur and the power factor becomes low when the boost converter operates under the discontinuous mode. In order to make the boost converter to operate under the boundary current mode, it is necessary to reduce the delay time caused by the DSP's processing and the parasitic capacitance. The proposed zero-crossing detection circuit is formed by the differentiation circuit and the differential amplifier circuit and the RS-FF. In the proposed method, the delay time of zero-crossing point detection can be reduced and the boost converter can operate under the boundary current mode with high accurate. Simulation results show that compared with the conventional method, the zero-crossing point detection delay time characteristics are improved in the proposed method.

Mathematical modeling and analysis of converters is an essential and critical phase in the design stage of the system. High current switching and inductor ripple causes electromagnetic interference in the system. Paralleling of the converters and smart switching control will reduce the stress on the converter switches. Substantial ripple reduction in the source and load current can be achieved by optimally choosing the transfer ratio. Multiphase technique increases the ripple frequency resulting in lesser filter requirements. A two phase bidirectional converter operating in continuous current conduction mode is modeled and digital average current mode control technique is proposed to regulate the output voltage. A 700 watt system is designed and the simulation and experimental results are presented.

In this paper, a digital-based pulse train (PT) control technique for a boost power factor correction (PFC) converter operating in a discontinuous conduction mode (DCM) is presented, which can achieve nearly unity power factor (PF) over a universal input voltage range. Different from traditional digital control techniques, which usually require complex arithmetic operations, the digital-based PT control technique only needs a simple operation. Besides, a DCM boost PFC converter with digital PT control can operate at a high switching frequency, which is less dependent on the processing speed of a digital controller. Thus, the proposed control strategy can be implemented with general purpose digital controllers, such as low-speed and low-cost microcontroller unit, for the DCM boost PFC converter where the cost is a focus. The operation principle of the digital PT controlled DCM boost PFC converter is analyzed. Experimental results are provided, which show that high PF and low input current total harmonic distortion can be maintained over a universal input voltage range of 90–264 V ac.

Aluminum electrolytic capacitor (AEC) is one of the most age-affected components in ac–dc conversion, and its equivalent series resistance ( ESR ) is an important index for reflecting the healthy condition of AEC. In AEC-used boost power factor correction (PFC) converters, ESR of AEC causes a small jump in the switching ripple of output voltage at switching moments, especially at turn- off moments. This small jump is hardly observed at line-frequency scale, either using time-domain analysis or frequency-domain analysis. However using time–frequency analysis this jump is very prominent due to its singularity. In this article, an online ESR estimation method of AEC is proposed by using the wavelet transform (WT) based time–frequency analysis. The relationship between ESR and the jump amount of output voltage at turn- off moments is analyzed first, and then the ESR calculation model is derived using WT with the wavelet basis of the first derivative of Gaussian function. An appropriate sampling interval for the output voltage and the inductor current is determined. Besides, the online ESR estimation scheme is implemented including the hardware and software designs. Furthermore, a prototype of boost PFC converter with 220 V ac input and 360 V dc output is built, where an average current mode control chip UC3854 is used. Four factors are discussed for estimation accuracy in the experiment, and the estimated results are consistent with the results measured by LCR meter with a relative error less than 10%.

In this paper, a single-stage bidirectional isolated direct-matrix-based AC-DC converter with a power factor correction is proposed. This AC-DC converter can control not only the DC output voltage or current, but also the AC grid current with a single conversion stage, which helps to achieve a higher power density with a lower complexity. A modulation scheme that can achieve a zero voltage switching (ZVS) or zero current switching (ZCS) operation in all switches is developed. Hence, the switching frequency of the converter can be increased higher, leading to the smaller passive components. The proportional-resonant (PR) controller is utilized to achieve the unity power factor and low total harmonic distortion (THD) current. The proposed topology has been verified by simulation results for a 3.3 kW system.

The pulse width prediction control technique has been widely used in AC-DC converters with power factor correction in boost topology, where satisfactory results have been reported without the need to use classic control laws. However, this technique has not been explored for other types of ACDC converters with power factor correction. In this work, the use of this technique is proposed in an AC-DC converter with power factor correction in a half-bridge boost topology. This topology presents high efficiency because it uses the least number of semiconductors compared to other topologies. In this technique the duty cycle is predicted by processing the average values of state and input variables of the converter in half bridge boost topology, using only four multiplications and five additions, which implies less complexity in its implementation. For its validation simulations were performed using MATLAB R simulink, where it was possible to observe values of power factor and THD comparable with other control methods such as non-linear carrier control, and conventional analog control, both reported in the literature.

Цифрові системи керування все частіше застосовуються у силовій електроніці, що обумовлено рядом переваг цифрового керування над аналоговим. У даній статті представлений коректор коефіцієнта потужності з адаптивним цифровим керуванням по піковому струму. Описано принцип керування по піковому струму та вказані переваги і недоліки даного методу. Наведена схема коректора з адаптивним цифровим керуванням. Проведене комп’ютерне моделювання підтвердило працездатність розробленого коректора. Бібл. 14, рис. 6.

An AC -DC converter with power factor correction (PFC) function is proposed in this paper. In the proposed converter, the boost PFC stage and the active-clamp DC-DC converter stage are merged into a single converter to reduce the overall cost and improve the power density. An active-clamp DC-DC converter stage can suppress the switch voltage stresses and provide zero-voltage-switching (ZVS) operation of the switches. The boost converter in PFC stage operates in discontinuous conduction mode (DCM) and it provides naturally high power factor. Due to the ZVS operation, the switching losses of the proposed converter are significantly reduced and the efficiency is improved. Steady-state analysis is performed. Simulation results are also provided to verify the effectiveness of the proposed converter.

The paper presents a single-stage high-power-factor electronic ballast for metal halide lamps. The proposed ballast integrates a buck-boost converter, a buck converter and a full-bridge inverter into a single power conversion circuit. The buck-boost converter served as a power-factor corrector (PFC) is designed to operate at discontinuous conduction mode (DCM) to achieve nearly a unity power factor at the input line. By adjusting the duty-ratio of the active switches of the PFC, the lamp power is remained at rated value for universal input voltage ranged from 90 V rms to 264 V rms . The four active switches of the full-bridge inverter, an inductor and a capacitor form a bidirectional buck converter which supplies a low frequency square-wave current for the lamp at to avoid the lamp from happing acoustic resonance. The circuit operation is analyzed in detail to derive the design equations. A prototype electronic ballast for a 70 W metal halide lamp is built and tested. Experimental measurements are provided to verify that the proposed ballast has the merits of a nearly unity input power factor, high circuit efficiency and the metal halide lamp is free of acoustic resonance.

This paper presents a wide range output voltage interleaved flyback power factor correction circuit, two parallel-connected flyback converter are interleaved, it could provides high efficient and wide range output voltage. The system on programmable chip (SoPC), NIOS II, which is based on field programmable gate array (FPGA) is used to implement the digital controller. To simplify the circuit, discontinuous conduction mode (DCM) PFC structure is choose, in this method, the inductor current feedback could be skipped. So, no circuit is used to get the inductor current, but only an extra analog to digital converter to get the feedback voltage is added to circuit. However, the power factor correction will be approached well. The experiment results show the system have nearly unity power factor, and good dynamic response over a wide output power range.

Since parabolic current control has fast transient response and high control precision with constant switching frequency, it is an attractive current control strategy for voltage source inverters. The employment of parabolic current control delivers great performance on current waveform control or voltage waveform control. The implementation of parabolic current control usually requires high speed digital-to-analog converters (DACs) to generate a pair of parabolic carriers as the control band. With increases in switching frequency, this requirement becomes more critical because the speed of DAC limits the update rates of the parabolic carriers. This impacts the smoothness and punctuality of the parabolic control band. To solve this issue, a parabolic current control based digital current control strategy is proposed in this paper. The proposed method uses the sensed current of the output inductor to calculate the next duty-cycle. To improve the transient response speed, a duty-cycle adjustment is presented. The performance of the proposed digital control method is verified in simulation.

The boost type dc-dc converter is used for compensation of dc bus voltage in the dc power feeding system such as the renewable energy system. It should be operated stably to improve reliability of the system. The peak current mode control is applied to operate stably because the boost type dc-dc converter tends to be unstable. However, a peak value of reactor current cannot be captured in the digital controller. In this paper, a digital peak current mode control boost converter with conversion from current to frequency and using a frequency detector for a peak current detection in real time is presented. The effectiveness of the proposed method is verified by the comparison of the transient response under changing an input voltage between the conventional PID control and the proposed method.

A novel three-phase major circuit topology is proposed in this paper and its circuit design is also given. Its characteristic is that specific PFC integrated circuit is not applied in this AC-DC converter, there are less circuit components and its power factor is very high. Moreover, its operation principle and power factor correction principle are discussed and analyzed in detail. Its simulation results operating in different duties using MATLAB/SIMULINK are also given. The rationality and correctness of its circuit topology and principle are explained and verified by theory analysis and simulation results.

Interactive digital control using PMBus protocol can significantly improve performance, efficiency and reliability in high frequency low voltage DC (LVDC) microgrid applications using online optimization through shared clock and data. Modeling and analysis of digitally controlled standalone DC-DC converters, considering finite sampling delays, have been well reported in the past; however, modeling and analysis of fast scale stability and performance limits, under finite sampling delay and clock shift, have not been investigated so far in digitally controlled LVDC microgrids. This paper considers an intermediate bus architecture (IBA), consisting of an intermediate bus converter (IBC) followed by a point-of-load (PoL) converter, under clock-synchronized digital current mode control (DCMC). Considering the IBA dynamics, a discrete-time (DT) framework is proposed, and DT small-signal models are derived for stability and performance analysis. It is shown that the clock shift between individual converters and the sampling delays of their corresponding digital controllers have significant impacts on the fast-scale stability of the overall IBA system, which may lead to severe fast-scale instability with complex nonlinear phenomena and resulting in much higher (inductor) current ripple and RMS quantities. Simulation case studies are presented, and the stability boundaries are found to be consistent with the analytical predictions. The proposed framework will be helpful to design stable digital control in DC microgrids.

The three-phase bridge topology of the bi-directional boost type improved power quality ac-dc converter (IPQC) is capable of providing power transfer between a high voltage dc (HVDC) link and a relatively low voltage ac system with improved power quality at input ac mains in terms of high power factor and low THD. This paper presents unity power factor operations, in the rectification and inversion modes, with near sinusoidal line currents; of the IPQC that employs IGBTs. The current forced control (CFC) strategy is implemented with closed loop control, adopting the hysteresis-band current control (HCC) pulse width modulation (PWM) technique. Simulation results confirm the efficacy of the control technique.