Performance evaluation of thread prefetching for recursive data structures

The memory wall problem is one of the important issues in modern computer system, and it affects the system performance in spite of the powerful processor. The emergence of multi-core processors has further exacerbated the problem???On the other hand, the increasing use of the linked data structure in applications aggravates the memory access latency. This paper utilizes multi-threading technology based on CMP, and dispatches a helper thread when the program is running which prefetches the demanded data into the shared cache in advance to hide the long memory access latency. The helper thread shows great performance by controlling the distance between helper thread and main thread. Simple analysis of the effect of the computation workload between the accesses of the pointers to prefetching is also provided.

The era of information technology has, unfortunately, contributed to the tremendous rise in the number of criminal activities. However, digital artifacts can be utilized in convicting cybercriminal and exposing their activities. The digital forensics science concerns about all aspects related to cybercrimes. It seeks digital evidence by following standard methodologies to be admitted in court rooms. This paper concerns about memory forensics for the unique artifacts it holds. Memory contains information about the current state of systems and applications. Moreover, an application's data explains how a criminal has been interacting the application just before the memory is acquired. Memory forensics at the application level is currently random and cumbersome. Targeting specific applications is what forensic researchers and practitioner are currently striving to provide. This paper suggests a general solution to investigate any application. Our solution aims to utilize an application's data structures and variables' information in the investigation process. This is because an application's data has to be stored and retrieved in the means of variables. Data structures and variables' information can be generated by compilers for debugging purposes. We show that an application's information is a valuable resource to the investigator.

GreenC5: An adaptive, energy-aware collection for green software development

Reversing the syntactic format of program inputs and data structures in binaries plays a vital role for understanding program behaviors in many security applications. In this paper, we propose a collaborative reversing technique by capturing the mapping relationship between input fields and program data structures. The key insight behind our paper is that program uses corresponding data structures as references to parse and access different input fields, and every field could be identified by reversing its corresponding data structure. In details, we use a finegrained dynamic taint analysis to monitor the propagation of inputs. By identifying base pointers for each input byte, we could reverse data structures and conversely identify fields based on their referencing data structures. We construct several experiments to evaluate the effectiveness. Experiment results show that our approach could effectively reverse precise input formats, and provide unique benefits to two representative security applications, exploit diagnosis and malware analysis.

As the computing environments are continuously moving towards battery-operated mobile and handheld systems, the development of energy-saving mechanisms for such devices has recently become a technical challenge. Dynamic voltage scaling (DVS) has historically been considered an effective method to reduce the processor power consumption. Conventional DVS techniques typically consider only processor utilisation issues in a policy-making process. However, as memory-bound multimedia applications are becoming popular in handheld devices, the DVS policies should consider the so-called ‘memory wall’ problem to maximise energy gain. Recent DVS techniques suffer from the inefficiency of their policies caused by the memory-wall problem while executing multimedia applications, and no previous research on DVS considers the problem explicitly. The existence of the memory wall problem in a real system is revealed and a metric that can be used to detect the problem in advance is found. A memory-aware DVS (M-DVS) technique that takes the memory wall problem fully into consideration is proposed. The experimental results on a PDA show that M-DVS can reduce ∼8% of additional power consumption, compared with conventional DVS, without any QoS degradation for handling multimedia clips.

Detection of Obfuscation in Java Malware

Efficient multicore programming demands fundamental data structures that support a high degree of concurrency. Existing research on non-blocking data structures promises to satisfy such demands by providing progress guarantees that allow a significant increase in parallelism while avoiding the safety hazards of lock-based synchronizations. It is well-acknowledged that the use of non-blocking containers can bring significant performance benefits to applications where the shared data experience heavy contention. However, the practical implications of integrating these data structures in real-world applications are not well-understood. In this paper, we study the effective use of non-blocking data structures in a data deduplication application which performs a large number of concurrent compression operations on a data stream using the pipeline parallel processing model. We present our experience of manually refactoring the application from using conventional lock-based synchronization mechanisms to using a wait-free hash map and a set of lock-free queues to boost the degree of concurrency of the application. Our experimental study explores the performance trade-offs of parallelization mechanisms that rely on a) traditional blocking techniques, b) fine-grained mutual exclusion, and c) lock-free and wait-free synchronization.

Tensors are one of the most widely used data structures in modern Machine Learning applications. Although they provide a flexible way of storing and accessing data, they often expose too many low-level details that may result in error prone code that is difficult to maintain and extend. Abstracting low-level functionalities into high-level operators in the form of a query language is a task in which the Data Management community has extensive experience. It is thus important to understand how such an experience can be applied in the design of useful languages for tensor manipulation.In this short paper we study a matrix and a tensor query language that have been recently proposed in the database literature. We show, by using examples, how these proposals are in line with the practical interest in rethinking tensor abstractions. On the technical side, we compare the two languages in terms of operators that naturally arise in Machine Learning pipelines, such as convolution, matrix-inverse, and Einstein summation. We hope our results to provide a theoretical kick-off for the discussion on the design of core declarative query languages for tensors.

Flash-based Solid State Disks (SSDs) have been a great success story over the last years and are widely used in embedded systems, servers, and laptops.One often overlooked ability of NAND flash is that flash pages can be overwritten in certain circumstances. This can be used to decrease wear out and increase performance.In this paper, we analyze the potential of overwrites for the most used data structure in database applications: the B-Tree. We show that with overwrites it is possible to significantly reduce flash wear out and increase overall performance.

Graphs, generally used as data structures in computer science applications, have steadily shown a growth in mapping various types of relationships, from maps to computer networks to social networks. As graph layouts and visualizations have been at the forefront of graph drawing research for decades, it consequently led to aesthetic heuristics that not only generated better visualizations and aesthetically appealing graphs but also improved readability and understanding of the graphs. A variety of approaches examines aesthetics of nodes, edges, or graph layout, and related readability metrics. In this paper we focus on the edge crossing problem and propose a solution that incorporates Gestalt principles to improve graph aesthetics and readability. We introduce the concept of breaks in edges at edge crossings. A break is a gap in an edge drawing occurring in the vicinity of an edge crossing. At every edge crossing, one of the incident edges is broken, which will prevent any unintentional Gestalts that occur at edge crossings that reduce the readability of a graph drawing. We present our preliminary results and user studies that show that this technique could play a role in improving graph readability.

The advent of manycore in computing architecture causes severe energy consumption and memory wall problem. Thus, emerging technologies such as on-chip memory and nonvolatile memory (NVRAM) have led to a paradigm shift in computing architecture era. For instance, nonvolatile memories like PRAM can be viable DRAM replacements, achieving competitive speeds at lower power consumption. On-chip memory such as 3D-stacked memory can solve the limitation of memory bandwidth. The confluence of these trends offers a new opportunity to rethink traditional computing system and memory hierarchies.In an attempt to mitigate the energy and memory wall, we propose a new architecture with a hierarchical and a hybrid main memory for manycore system, termed MN-MATE. The hierarchical memory consists of on-chip memory, which is called M1 memory, and a conventional DRAM memory is replaced by a hybrid memory of DRAM and PRAM, called M2 memory. On the top of the system, we designed and evaluated efficient management techniques to achieve the high performance and the low energy usage, including hierarchical memory management, power-aware hybrid memory management, and file caching on a hybrid memory. Preliminary results show that these techniques can improve performance and reduce energy usage. As a case study, we introduce the MaaS (Matching-as-a-Service) application which requires the large amount of memory and high computing power.

Future microprocessors will have more serious memory wall problems since they will include more cores and threads in each chip. Similarly, future applications will have more serious memory bloat problems since they are more often written using object-oriented languages and reusable frameworks. To overcome such problems, the language runtime environments must accurately and efficiently profile how programs access objects. We propose Barrier Profiler, a low-overhead object access profiler using a memory-protection-based approach called pointer barrierization and adaptive overhead reduction techniques. Unlike previous memory-protection-based techniques, pointer barrierization offers per-object protection by converting all of the pointers to a given object to corresponding barrier pointers that point to protected pages. Barrier Profiler achieves low overhead by not causing signals at object accesses that are unrelated to the needed profiles, based on profile feedback and a compiler analysis. Our experimental results showed Barrier Profiler provided sufficiently accurate profiles with 1.3% on average and at most 3.4% performance overhead for allocation-intensive benchmarks, while previous code-instrumentation-based techniques suffered from 9.2% on average and at most 12.6% overhead. The low overhead allows Barrier Profiler to be run continuously on production systems. Using Barrier Profiler, we implemented two new online optimizations to compress write-only character arrays and to adjust the initial sizes of mostly non-accessed arrays. They resulted in speed-ups of up to 8.6% and 36%, respectively.

Applications continue to increase in size and complexity which makes debugging and program understanding more challenging. Programs written in managed languages, such as Java, C#, and Ruby, further exacerbate this challenge because they tend to encode much of their state in the heap. This paper introduces dynamic shape analysis, which seeks to characterize data structures in the heap by dynamically summarizing the object pointer relationships and detecting dynamic degree metrics based on class. The analysis identifies recursive data structures, automatically discovers dynamic degree metrics, and reports errors when degree metrics are violated. Uses of dynamic shape analysis include helping programmers find data structure errors during development, generating assertions for verification with static or dynamic analysis, and detecting subtle errors in deployment. We implement dynamic shape analysis in a Java Virtual Machine (JVM). Using SpecJVM and DaCapo benchmarks, we show that most objects in the heap are part of recursive data structures that maintain strong dynamic degree metrics. We show that once dynamic shape analysis establishes degree metrics from correct executions, it can find automatically inserted errors on subsequent executions in microbenchmarks. These suggests it can be used in deployment for improving software reliability.

As clearly evidenced by Grady Booch in his book Software Components with Ada (Booch, 1987), data structures are an important part of reusable software components. The need for some of these software components arises, because of limitations in programming language design. In particular, the lack of recursive data structures in many languages requires contortions on the part of programmers that hampers the creation, the reuse, the portability, and the reliability of software components. We describe a preprocessor that translates definitions of recursive data structures to Ada.

Drivers' route choice model is essential in transportation software such as navigation, fleet management, and simulation, where the random utility models (RUM) have dominated for years. The authors investigate here whether machine learning (ML) models could be applied into this field, and whether these approaches outperform the traditional models in goodness‐of‐fit and prediction. The application framework and data structure are proposed, where the challenging problems lie in: (i) to pool data from multiple origin–destination pairs; and (ii) to interpret results for behaviour analysis. All RUM and ML models are applied in a real network. Results suggest that the random forest, one of the ML models, has satisfying performances with acceptable computation time, making it suitable for large network and real‐time analysis. This study shows that the ML models can be adopted for behaviour analysis, such as to prioritise the importance of variables, compute the elasticity, and forecast for scenarios. Future directions on combining the RUM and ML models are discussed.