Radiated emission of various PDN designs

In this paper, the reduction of power distribution network noise and jitter at high-speed output buffer by using on-chip linear voltage regulator module circuit is introduced and analyzed. The transient response of typical on-chip linear VRM circuit is analyzed in power gating condition. When the on-chip linear VRM circuit is inserted between on-chip PDN and operating high-speed output buffers, the on-chip PDN noise and jitter at output buffer are significantly reduced. The larger on-chip decoupling capacitor leads to the lower PDN noise generated by on-chip linear VRM circuit. The on-chip linear VRM also reduces the impact of the aggressor buffer to the victim buffer in different PDN, resulting in the improved performance of the victim buffer. Reduction of PDN noise and jitter at output buffer using on-chip linear VRM are validated based on SPICE simulation with 110 nm CMOS technology library.

The characteristic of dielectric electromagnetic band gap (EBG) structure was studied for suppressing the electromagnetic noise in power distribution network (PDN), and the method, which divides a high dielectric constant (high-DK) cylinder into a high-DK film part and a conductive part, was proposed to extend the bandgap of dielectric EBG. The scattering parameters between two ports, located in a pair of power and ground planes, were simulated to evaluate the noise isolation performance for dielectric EBG structure and embedded capacitance respectively. The effects of the parameters such as relative permittivity and substrate thickness, and so on were analyzed. On the basis of the calculated results, a modified dielectric EBG structure was provided, which can be used for thick substrate of printed circuit board (PCB). Finally, the behavior of an EBG model for low frequency application is also studied. The obtained results show that the embedded capacitance has fine performance at a wide frequency range, but high dielectric constant and small thickness is required. Same as the embedded capacitance, the dielectric EBG is also in relation to the permittivity and thickness of dielectric material, however, it can more deeply suppress the noise within its forbidden frequency band. Moreover, the performance and application of dielectric EBG structure are enhanced using proposed method.

Electromagnetic Bandgap (EBG) structures are increasingly utilized by a variety of microwave and optical devices as filters for unwanted signals. One such application is their incorporation in power distribution network (PDN) of electronic circuits where the EBG structure replaces one of the reference voltage planes thus forming a shielded EBG structure. The EBG induces a wide (on the order of few GHz) omni-directional stopband in the operating frequency range of the PDN which mitigates the so called simultaneous switching noise (SSN) on the power plane. The challenging aspect in designing an EBG for such applications is to achieve a wide stopband centered at low GHz frequencies while maintaining a reasonably small unit cell size and a low profile. Indeed, the dimensions of the unit cell of the EBG structure for low frequency designs can become relatively large with respect to the size of the host dielectric substrate. Therefore, availability of a systematic design approach that can provide a fast and accurate means of performance prediction to enable geometry tweaking and design optimization will be of critical importance in utilizing EBG structures in such applications.

Algorithms featuring fast and accurate estimation of worst-case eye diagram have been proposed to replace the time-consuming random bit simulation in channel design. However, when the interaction between nonlinear I/O circuits and power distribution network (PDN) noise is included, most of those approaches fail to maintain accuracy. Based on the superposition of multiple bit pattern responses (SMBP) concept, Ren and Oh [1] developed an algorithm to fast predict the eye diagram that theoretically captures any nonlinearity in the circuit. In this paper, a test circuit with PDN was constructed to examine the performance of this algorithm. The experiment results show good agreement with the results simulated by long PRBS in HSPICE.

Wen-Sheng Zhao from Hangzhou University, China, talks to Electronics Letters about the paper ‘Novel electromagnetic bandgap structure for wideband suppression of simultaneous switching noise’, page 1243 Wen-Sheng Zhao My research fields include interconnect modelling, multiphysics simulations and microwave sensor design. My major research topic is signal and power analysis of silicon via (TSV)-based 3D integrated systems. In recent years, the fourth industry revolution has shown an urgent need to develop next generation memory modules. As a key technology of industry 4.0, TSV-based high-bandwidth memory (HBM) has attracted a lot of interest from both the research and industrial worlds. To guarantee the system performance, it is necessary to perform signal/power/thermal integrity analysis for an HBM module. We are currently working on the issues related to the physical design of HBM modules (such as TSV modeling, equaliser design, and power noise suppression). Modern circuits are developing towards miniaturisation, high frequency and low power consumption, which puts strict constraints on the signal and power integrity design. For example, the operating voltages are continuously lowered, thereby limiting noise margin in power distribution network (PDN). Under such circumstances, power/ground noise is becoming a serious problem. To resolve this issue, various techniques including decoupling capacitor and electromagnetic bandgap (EBG) have been proposed and are under study. In comparison with decoupling capacitor, EBG structure can provide wideband noise suppression, and has been widely explored in the chip, package, and board. To improve the system performance, it is always desirable to increase the stopband bandwidth and rejection level of EBG structure. In this Letter, a power plane with coplanar EBG etched in the S-bridge EBG was proposed. With the proposed EBG structure, an ultrawide bandgap from 0.28 to 25 GHz with a high suppression level of -45 dB was achieved. Moreover, the signal integrity performance of the proposed EBG power plane was examined. The signal integrity can be ensured by utilising differential traces as the transmission structure. The proposed design can be used to reduce power/ground noise efficiently for mixed signal systems. We expect the proposed design to provide performance improvements in various mixed-signal systems in the immediate future. Currently, we are also working on developing EBG structures for silicon interposer and on-chip PDN. In the longer term, we expect that the EBG structures can be further explored and used in the physical design optimisation of HBM systems. As the clock frequency of the circuit system is continuously increased, the frequency of the simultaneous switching noise (SSN) also increases. However, the low-frequency components of the noise are not reduced accordingly. Therefore, the major issue we faced was developing a wide stopband EBG structure with a low cutoff frequency. Moreover, as grooves etched on the power/ground plane have an adverse impact on the signal transmission, we had to pay special attention to ensure signal integrity in the EBG design procedure. When we began studying TSV technologies, there was very little real-world deployment. Although several semiconductor giants such as Samsung presented some TSV based memory modules, these systems remained in the laboratory stage. Nowadays, TSV technology has matured, and the TSV-based HBM modules have been used in many graphics processing units since 2015. We are currently working on the physical design and optimisation (including signal and power integrity analysis) for TSV-based integrated systems. We have seen the introduction of many kinds of techniques (e.g., EBG, equaliser, differential signaling, and active decoupling) which will be helpful for future designs. There is no doubt that further improvements are always desirable to promote wide applications of TSV based integrated systems.

Electromagnetic Bandgap (EBG) structures have been successfully applied for suppressing the Simultaneous Switching Noise (SSN) between the power and ground planes. Aimed at the relative narrow bandwidth and the poor performance in low frequency of the conventional Uniplanar-Compact EBG (UC-EBG) structure, a novel EBG structure formed by adding spiral-shaped metal strips on the conventional UC-EBG is proposed. This new EBG structure significantly enhance the equivalent inductance between the neighboring nuit cells, as well as change the character of the stop-band. Simulation results show that the new EBG structure can achieve a bandwidth reach 4.35GHz.This stop-band is 47.5% wider than the conventional UC-EBG structure, and 17.5% wider than the reference EBG structure in literature. The excellent SSN suppression is achieved between 0.18-4.53GHz in the depth of -40dB.

This paper reports on modeling of simultaneous switching noise (SSN) in 3D TSV-based system with multiple IC chips stacked and connected through TSVs. TSVs and other components are modeled using full-wave electromagnetic tools to extract equivalent circuit models. Power distribution network (PDN) combining on-chip and off-chip components are simulated with SPICE. The voltage noise generated by switching current is analyzed to exanimate the impact of TSV geometric parameters such as TSV dimensions, pitch, and number. The current noise in TSV is also extracted for the potential impact on signal integrity. The impacts of TSV geometric parameters on the PDN noise are limited impacts at frequencies below 1 GHz. However, the frequencies of inter-chip resonances are sensitive to TSV geometric parameters. These resonant frequencies are often in the range of 1 GHz - 10 GHz, which may coincide with the clock frequency and induce significant noises.

Leakage current has become a significant source of power consumptions of CMOS circuit, as the technology node continues to shrink. Our study shows that the equivalent on-die leakage resistance monotonically decreases as the supply voltage increases and exceeds MOSFET threshold voltage. We propose a system-level power distribution network (PDN) design optimization with voltage-dependent leakage resistance considered in a standard RLC tank model. Our results show that the voltage-dependent leakage resistance can impact on the PDN noise and affect the optimal value of the circuit parameters to minimize the noise. An equivalent constant leakage resistor is proposed to replace the voltage-dependent model for quick noise prediction.

Simultaneous switching noise (SSN) is one of the major bottlenecks for successful design of high-performance systems. Especially mixed-signal designs are very sensitive to SSN due to the low voltage levels applied in analog circuits. One way of isolation is by placing the digital and analog domains far from each other. Even then, the power planes can transfer noise voltages both vertically and horizontally through out the board and total board area is a major concern in microminiaturized convergent systems. Electromagnetic bandgap structures (EBG) have been successfully applied for such isolation. Although any periodical shape can be used for isolation, only a few shapes have been reported, with various analysis methods. We present a new EBG with narrow slits, which shows a higher attenuation constant compared with existing structures. We also present a new analysis methodology for 2D EBG structures. Finally, a method to scale such EBG structures for different stopband requirements is introduced

Aim of this paper is to describe the simultaneous switching noise (SSN) mitigation by means of a novel electromagnetic band gap (EBG) structure with triangle patches and hexagonal array. The proposed EBG structure allows achieving -40 dB stop band within the frequency range 6.5-9 GHz. Parametric analysis including the radius effect of the metal plated vias, the via length and the distance between the patches is performed by means of full wave simulations, based on the Finite Integration Technique. The impact of the proposed design on the signal integrity is also investigated both in time domain (eye-diagrams and TDR) and frequency domain (S-parameters). Finally dispersion diagrams of the singular unit EBG cell are analyzed by means of eigenmode solver and periodic boundary conditions.

In this letter, a double-surface electromagnetic bandgap (EBG) structure with one EBG surface embedded in power plane is proposed for ultra-wideband simultaneous switching noise (SSN) suppression in printed circuit boards. The SSN suppression bandwidth is broadened to wider than 30 GHz with a low start frequency by combining traditional EBG structure and the coplanar EBG structure which is embedded in the power plane. Because the coplanar EBG surface is embedded in the power plane, no additional metal layer is introduced by the double-surface EBG structure. Simulations and measurements are performed to verify the broadband SSN suppression, high performance is observed.

This paper proposes a reconfigured horn antenna with reduced side-lobe radiation by using electromagnetic band gap (EBG) structure. A mushroom-like structure with a circular-shaped patch as unit cell is designed to achieve a complete EBG. The EBG structure is lined on the metal wall along the E-plane of the horn antenna. This causes the surface waves on the metal wall to be suppressed, resulting in lower side-lobe emission. A conducting wedge is inserted on the gap between the EBG structure and waveguide feed aperture to achieve impedance matching in the antenna. In addition, the proposed horn antenna is suitable for high power systems due to a purely metallic construction of the EBG structure.

In this paper, we present an equivalent circuit (EC) based technique which combined with the numerical method to optimize the EBG structures with simple square-loop frequency selective surfaces (FSSs), they can take on in-phase reflection characteristic in some broad-band electromagnetic band gap (EBG) structures. By using the multilayered FSSs in this type of EBG structure, the surface waves and current could stopped effectively. The geometry and working of the antenna with this EBG structure are detailed and the design method is proposed.

This paper presents a circularly polarized printed circuit board (PCB) patch antenna using mushroom-like electromagnetic band gap (EBG) structure for gain enhancement. Unlike the popular method of using artificial magnetic conductor (AMC) or EBG structure as the ground of the antenna, we place the mushroom-like EBG structure around the patch antenna to avoid increasing the number of PCB layers. The EBG structure works in-phase reflection around 24.25 GHz by optimizing design. Limited by the size of the antenna, only twelve EBG units can be distributed around the corner-cut square circularly polarized patch antenna. Simulation results show that gain of the antenna enhances 0.8 dB and cross polarized gain reduces about 15 dB, moreover, the axial ratio is also improved.

Simultaneous Switching Noise (SSN) is increasing with higher I/O data rate, resulting into more challenges in regulating supply voltage noise. SSN increases jitter in high-speed interface circuit and limits the performance of I/O. In order to reduce SSN effect to supply voltage droop, Power Distribution Network (PDN) has to be designed optimally. PDN design goal is to reduce the power supply noise going into I/O circuit. Engineering efforts are focused on packaging and board routing in order to control the impedance profile and supply voltage droop within the design specification. This paper discusses the next level of investigation, quantifying the effect of supply noise to the I/O transistor level circuit performance, specifically on Universal Serial Bus (USB) transmitter circuit. Output of the USB's transmitted signal is shown in eye diagram with the existence of supply noise throughout PDN. Results show that the USB transmitter circuit can sustain with higher supply noise drop than the targeted PDN design.