Room Temperature Wafer Bonding of Glass Using Aluminum Oxide Intermediate Layer

Lithium niobate (LiNbO3: LN) is a unique ferroelectric material with excellent electro-optical (EO), non-linear optical (NLO), acousto-optical, piezo-electrical, and pyro-electrical characteristics, in addition to a wide transmission curve ranging from the ultraviolet to the mid-infrared. Thus, it is widely utilized for numerous applications, including ultra-fast optical modulators, wavelength convertors, surface acoustic wave filter, and pyro-imaging devices. At the same time, Gallium Nitride (GaN) film is a direct widegap semiconductor commonly used for light emitting diode light, power devices, and radio frequency components. Therefore, wafer bonding of LN and GaN has the potential for creating a new platform capable of realizing multi-functional micodevices that can fully exploit the unique properties mentioned above. Generally, a GaN sample is prepared as a structure of an as-grown GaN film on a sapphire. The coefficient thermal expansion (CTE) of LN is 14.4 (a-, b-axes)-7.5 (c-axis) × 10-6/K at room temperature, whereas that of GaN is 5.59 (a-axis)-3,17 (c-axis) × 10-6/K and that of sapphire is 5 × 10-6/K. Therefore, it is desirable for low-temperature bonding of LN and as-grown GaN film for overcoming the large CTE mismatch. Conventional plasma activated bonding requires relatively high temperature annealing process at above 200 °C to achieve a high bond strength. The high-temperature process causes a large thermal stress, which may often generate cracks. Surface activated bonding (SAB) is a powerful method for low temperature bonding of dissimilar materials. By a surface activation process with argon (Ar) fast atom beam (FAB) or ion beam bombardment, a high bond strength can be achieved at room temperature due to the strong attractive forces between atomically cleaned surfaces. Recently, room-temperature bonding of a GaN and a Si has been demonstrated using ion beam bombardment [F. Mu et al., Applied Surface Science, 2017]. It is interesting to apply the SAB to bond a LN wafer and a GaN. To date, little work has focused on the application of the SAB method to the direct bonding of LN and GaN. In this paper, we report surface activated bonding of a LN and a GaN at room temperature. In this experiment, we prepared a commercially available 3-inch LN (Z-cut) wafers and a 2 inch as-grown GaN wafer which is a 2-μm-thick GaN epitaxial layer grown on a 430-μm-thick sapphire wafer. In direct bonding, sub-nm RMS roughness of the bonding surface is typically required to achieve strong bonding at room temperature. Using atomic force microscopy, the measured RMS roughness of LN and GaN epitaxial layer was approximately 0.1 nm and 0.3 nm, respectively. For surface activation process, Ar FAB bombardment on each bonding surface was performed. Figure 1 (a) shows a schematic diagram of our SAB process. When the background pressure fell below 1×10-5 Pa, the two wafers were activated by Ar FAB bombardment. After that, the surfaces of LN and GaN epitaxial layer were brought into contact with an applied load at room temperature. The Ar FAB bombardment time was 60 s, and the applied load was approximately 10 MPa. Figure 1 (b) shows the photograph of the bonded LN and GaN wafers at room temperature. As shown, LN/GaN hybrid structure without generating serious cracks was demonstrated in wafer scale. The void was formed by particle contaminations and non-bonding at the peripheral area may be responsible for the thickness distribution of the GaN epitaxial layer. In this presentation, we will discuss the bond quality and the bonding interface state in details. The authors would like to acknowledge Mitsubishi Heavy Industries Machine Tool Co., Ltd. for assisting with surface-activated bonding experiment. This study was supported in part by JSPS KAKENHI Grant Number JP17H04925. Figure 1

Surface activated bonding (SAB) is a room temperature wafer-level bonding technique widely used in the packaging and fabrication of electronic devices. The standard SAB process for Si involves the removal of surface oxides and contamination layers via fast atom bombardment, which generates dangling bonds on the outermost Si surface. However, adsorbed water on wafer surfaces hinders this activation process, leading to degraded bonding quality. In this study, we investigate prebonding baking as a method to eliminate adsorbed water before the SAB step. Experimental results demonstrate that pre-bonding baking significantly enhances bond strength for Si, sapphire, and SiO2 by effectively desorbing water from the wafer surfaces. Additionally, annealing Si wafers prior to SAB reduces residual oxides at the bonding interface, indicating improved activation efficiency. These findings highlight the potential of pre-bonding baking as an effective approach to enhance room-temperature wafer bonding quality using the SAB methodology.

Direct bonding of GaAs and diamond was successfully achieved by surface activated bonding (SAB) method at room temperature. The structures of GaAs/diamond interface before and after annealing at 400 ℃ were investigated by transmission electron microscope (TEM). A 3-nm-thick crystal defect layer was formed at the bonding interface, the change in the crystal defect layer thickness was not observed after annealing. There were no nanovoids and micro-cracks observed at the interface with annealing at temperature 400 ℃. These results indicated that the GaAs/diamond interface has high thermal stability and can withstand the temperature rise of power devices during operating.GaAs-based power devices have excellent electron transport properties and make it suitable for high frequency operation at high frequency. The output power and the lifetime of GaAs devices are largely degraded by the temperature rise of the active region during operating. The thermal conductivity of GaAs is very small, so that the generated heat by self-heating cannot be sufficiently dissipated through the substrate. Diamond has the highest thermal conductivity among materials and is an ideal material to suppress the temperature rise of the devices. The integration of the GaAs-based devices and diamond will be a more promising approach for improving the heat dissipation ability of the devices. However, since there is a large mismatch between the thermal expansion coefficients and lattice constants of GaAs and diamond, the direct growth of GaAs on diamond is quite difficult and vice versa. We have achieved the direct bonding of diamond and Si at room temperature using surface activated bonding (SAB) method and obtained the excellent thermal stability bonding interface.1-3 In this study, we examine the structures of the diamond/GaAs bonding interface and effects of thermal annealing on the interfacial structure of the interface by transmission electron microscopy (TEM).GaAs epitaxial layer grown on GaAs substrate was bonded to diamond by SAB method at room temperature. GaAs epitaxial substrate was composed of a 200 nm thick GaAs and a 100 nm thick InGaP layers grown on GaAs. After bonding, the GaAs substrate and InGaP layer were removed by mechanical polishing and selective wet etching to obtain 200 nm thick GaAs layer bonded to diamond substrates. The structures of the GaAs/diamond bonding interface were investigated by TEM observation. The TEM samples were fabricated by using a focused ion beam (FIB) technique.The cross-sectional TEM images of the GaAs/diamond bonding interface without and with annealing at 400°C for 5 min are shown in Fig 1(a) and 1(b), respectively. A crystal defect layer with a thickness of about 3 nm was observed in the as-bonded interface. The thickness of the crystal defect layer did not change, but no voids or cracks were observed at the bonding interface after annealing. These results indicate that the bonding interface of diamond and GaAs has an excellent thermal stability, which is extremely qualified for the heat dissipation of the devices.Acknowledgements This work was partly supported by Hirose International Scholarship Foundation. The fabrication of the TEM samples and part of the TEM observations were respectively performed at The Oarai Center and at the Laboratory of Alpha-Ray Emitters in IMR under the Inter-University Cooperative Research in IMR of Tohoku University (NO. 18M0045 and 19M0037).References Liang, S. Masuya, M. Kasu, N. Shigekawa, Appl. Phys. Lett. 2017, 110, No.111603.Liang, S. Masuya, S. Kim, T. Oishi, M. Kasu, N. Shigekawa, Appl. Phys. Express 2019, 12, No. 016501.Liang, Y. Zhou, S. Masuya, F. Gucmann, M. Singh, J. Pomeroy, S. Kim, M. Kuball, M. Kasu, N. Shigekawa, Diam. Relat. Mater. 2019, 93, 187 – 192. Figure 1

In the surface activated bonding (SAB) at room temperature, the surfaces of specimens are sputter etched by high-energy ion/atom beam of inert gas to remove surface contaminants and create active surfaces, which are ready to form inter-atomic bonds even at room temperature. Ar has been used for the purpose. However, sputter etching by Ar high-energy ion/atom beam causes increase of surface roughness. In case of wafer direct bonding, the surface roughness has large influence on the quality of bonding interface such as bonding strength, local strain, and so on. Therefore a surface activation process which does not cause surface roughening has been desired.In this work, we have examined the applicability of Ne fast-atom-beam (FAB) to SAB of Si wafers at room temperature. We confirmed that Ne-FAB does not cause surface roughening and Si wafers are successfully bonded by Ne-beam surface activation. In addition, we found that Ne-FAB sputter etching has surface smoothing effect which improves quality of the bonding interface.The room temperature wafer bonding apparatus (MWB-12-ST: Mitsubishi Heavy Industries) with the FAB 104 (Atom Tech Ltd.) beam sources were used for bonding of Si wafers. The etching rate of Si surface by Ne-FAB was about half of that of Ar-FAB using the beam source operation parameters of 1.8 kV applied voltage and 100 mA input current. With etching depth more than 1.5 nm, the bonding strength comparable to Si bulk strength was attained by Ne-FAB surface activation. With etching depth of 30 nm, we measured surface roughening of Si wafers using Ne, Ar and Xe gas. The surface roughness of Si wafers largely increased by the Ar and Xe-FAB sputter etching. In case of Ne-FAB, the surface roughness did not increase by the sputter etching and kept the initial rms value of 0.18 nm of CMP-polished Si wafers.Moreover, we found surface smoothing effect of the Ne-FAB. We prepared Si wafers which had been roughened by Xe-FAB etching. They could not be bonded directly by SAB. Surface roughness of the roughened Si wafer decreased from 0.40 to 0.17 nm rms by applying Ne-FAB of 30 nm etching depth. Along with the surface smoothing, the bonding strength was largely improved and finally became equivalent to Si bulk strength. It was confirmed that strain near the bonding interface was decreased by the smoothing effect as shown in Figure.

New cladding process has been developed by means of a Surface Activated Bonding (SAB) technique. In this process, Surfaces of materials to be bonded are immediately cleaned, activated by Ar ion sputter etching, and rolled with low distortion at room temperature in vacuum [1]. It is found that this process is available not only for cladding metals but also for laminating polymer film on metal without any adhesives. We have already reported copper (Cu) clad laminating (CCL) materials using Liquid Crystal Polymer (LCP) and showed its possibility by means of the SAB [2-5]. Interface of the LCP/Cu produced by the SAB was flat and smooth when comparing to that by conventional method. Therefore, the laminated material showed high electric property and excellent etching property [4,5]. In this study, it was investigated that the transition of chemical bonding state around interface between Cu foil and LCP film after heat treatment. It has been already reported that interface of Cu side was oxidized by heat treatment [2]. The XPS analysis showed that the ratio of C=O bonding on the LCP film side also interface increased with an increase in heat treatment temperature. So it was revealed that the heat treatment at high temperatures oxidize not only the Cu interface formed by Cu foil and sputtered Cu, hut also the LCP film side interface. We also have reported that Cu sputtering on the LCP film before laminating improved bonding strength [4,5]. However in heat-resistant test, the bonding strength significantly decreased because of oxidization around the interface and of softening of Cu foil due to re-crystallization. To improve the heat resistance, we used Cu-O.O2%Zr alloy foil having high re-crystallization temperature and sputtered Cu-Ni alloy or Ni-Cr alloy on LCP Tim instead of Cu sputtering. The improved materials also showed high frequency property and good etching property.

Thin copper (Cu) films of 80 nm thickness deposited on a diffusion barrier layered 8 in. silicon wafers were directly bonded at room temperature using the surface activated bonding method. A low energy Ar ion beam of 40–100 eV was used to activate the Cu surface prior to bonding. Contacting two surface-activated wafers enables successful Cu–Cu direct bonding. The bonding process was carried out under an ultrahigh vacuum condition. No thermal annealing was required to increase the bonding strength since the bonded interface was strong enough at room temperature. The chemical constitution of the Cu surface was examined by Auger electron spectroscope. It was observed that carbon-based contaminations and native oxides on copper surface were effectively removed by Ar ion beam irradiation for 60 s without any wet cleaning processes. An atomic force microscope study shows that the Ar ion beam process causes no surface roughness degradation. Tensile test results show that high bonding strength equivalent to bulk material is achieved at room temperature. The cross-sectional transmission electron microscope observations reveal the presence of void-free bonding interface without intermediate layer at the bonded Cu surfaces.

Bumpless interconnect of 6-mum-pitch Cu electrodes was realized at room temperature with the surface activated bonding (SAB) method. In this study, we propose a novel bumpless structure, where the electrodes and a surrounding Cu frame are fabricated with the same height to increase bond strength and demonstrate the feasibility of a sealing interconnection between Cu surfaces. The Cu damascene process, assisted by the reactive ion beam etching (RIE) process, was used to fabricate the Cu structures. 1,048,748 electrodes were fabricated in a square of about 6-mm2 area; 923,521 connections were placed inside the 10-mum-wide Cu frame. These 923,521 electrodes were arranged into a spiral chain to enable the detection of the positions with insufficient interconnection by electrical resistance measurements. Using the SAB conditions optimized in the previous studies, we found that 744,769 electrodes among them were successfully interconnected. The failure in the electrical interconnection reappeared in some lines near the frame of all samples. The optical beam induced resistance change (OBIRCH) analysis, in which particularly high resistance is presented as a bright contrast, showed that these insufficient connections might be due to sample preparation error rather than a bond defect, because high resistance was observed only at some specific electrodes amid the line in this area. In other well-bonded area, the mean contact resistance was as low as 0.08 Omega; it is considered that a sealing effect was achieved at the frame structure because there was little increase in the contact resistance in high temperature storage test performed at 150degC for 1000 h, in ambient air.

8-inch Si-Si wafer bonding at room temperature is performed by means of two modified surface activated bonding (SAB) methods respectively, namely the SAB with nano-adhesion layer and sequential plasma activated bonding (SPAB). And post-annealing processes in atmospheric air utilized do not aim to improve the bonding strength, but to investigate void formation if the bonded wafers heated in subsequent heated processes. For the SAB with nano-adhesion layer, although in tensile tests fractures occur at the bonded interfaces, the bonding strength is sufficient to withstand diced by 500×500 mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> small pieces, and no annealing voids raised by post-annealing from 200 to 600°C. For SPAB, short O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> reactive ion etching (RIE) plasma pretreatment time for 10s and followed by N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> radicals for 60s can mitigate void formation very much during post-annealing between 200~700°C, moreover, under this pretreatment process, wafer bonding strength equivalent to bulk-silicon is achieved at room temperature without requiring annealing.

Chemical composition around diamond/silicon heterointerfaces fabricated by surface activated bonding (SAB) at room temperature is examined by energy-dispersive X-ray spectroscopy under scanning transmission electron microscopy. Iron impurities segregate just on the bonding interfaces, while oxygen impurities segregate off the bonding interfaces in the silicon side by 3–4 nm. Oxygen atoms would segregate so as to avoid the amorphous compound with silicon and carbon atoms, self-organized at the bonding interfaces in the SAB process. When the bonding interfaces are annealed at 1000 °C, the amorphous compound converts into cubic silicon carbide (c-SiC), and nano-voids 5–15 nm in size are formed at the region between silicon and c-SiC, at which the oxygen density is high before annealing. The nano-voids can act as the gettering sites in which metal impurities are preferentially agglomerated, and the impurity gettering would help to improve the electronic properties of the bonding interfaces by annealing.

This paper focuses on low temperature bonding technology and its applications in photonics devices in use in various fields. Fabrication of a wafer bonded two-layer germanium (Ge) structure for far-infrared detector application was demonstrated by surface activated bonding (SAB) method at room temperature. Very low-resistive Ge/Ge junctions were obtained by SAB method. The feasibility of low-temperature 3-D integration of optical semiconductor chips was also demonstrated by Au-Au SAB in ambient air. Using this technique, compact and thin micro encoders and laser Doppler velocimeters (2.8 mm × 2.8 mm × 1 mm thick) were developed.

The integration of Ga 2 O 3 on SiC is a promising method to reduce the self-heating of Ga 2 O 3 -based devices. The bonding with an average bonding energy of $\sim 2.31\mathrm {J} /\mathrm {m}^{\mathbf {2}}$ was achieved by surface activated bonding (SAB) using a Si-containing Ar ion beam at room temperature. The high-resolution STEM analysis was carried out to investigate the bonding mechanism. The analysis indicate $\mathrm {a}\sim 2.2$ nm amorphous SiC layer and $\sim 1.8$ nm amorphous Ga 2 O 3 layer with a slight diffusion at the interface, which should contributes the strong bonding. Same analyses were applied on the 473 K-annealed bonding interface and indicate that the interfacial layer shrank by $\sim 0.5$ nm after annealing, which may due to the further diffusion of Ga and Si.

The reversible bonding of microfluidic chips has been developing rapidly with the requirement of reusable microfluidic devices or the need to obtain the samples inside the chip. Traditional bonding methods for polymer‐based microfluidics, e.g., thermal bonding, permanently attach the substrate and cover plate. Sometimes, once the chip flow channel is blocked, it is difficult to clean and affect the reusability of the chip. This study proposes a new reversible bonding method for poly (methyl methacrylate) (PMMA) microfluidic chips with the help of stretch release adhesive strips. The designed microchannels were fabricated on the surface of PMMA plates using CO2 laser irradiation. Then, stretch release adhesive strips were used as an intermediate layer between the substrate (with microchannels) and another flat PMMA/PS/PC plate to seal the microchannel. The assembled chip sets were bonded at room temperature with bonding strength comparable with other permanent bonding methods. Experimental results show that simply pulling the adhesive layer by applying a shear force can easily detach the intermediate adhesive layer from both the substrate and cover plate to separate the bonded chipset. The proposed reversible bonding method is simple, rapid and has low residue and high bonding strength. Bacterial culture experiments were also conducted to verify the biocompatibility of the proposed bonding method. The proposed reversible bonding technique can be used for polymer‐based microfluidic devices that require sample recovery or chip reuse.Highlights The stretch release adhesive strip can provide high bond strength. It allows easy peeling for reversible bonding. It bonds at room temperature with simple operation. It has good transparency for easy observation of experiments. It has good biocompatibility.

Surface activated bonding (SAB) based on argon ion beam irradiation was used to directly bond Si and Si wafers at room temperature, and the effects of the surface activation time on the Si-Si bonding were investigated. The experimental results show that the surface activation treatment with a proper duration is beneficial to the reduction of surface roughness of Si wafers and the realization of high bonding strength. The Si-Si wafers bonded after the surface activation of 420 s has an extremely low percentage of area covered by voids (0.08%) and a high bonding strength (9.45 MPa). Meanwhile, the annealing at 500 °C does not lead to a significant change in the percentage of area covered by voids for Si-Si bonding. Besides, the transmission electron microscope characterization indicates that the argon ion beam irradiation of 180 s can result in the formation of an amorphous Si layer with a thickness of approximately 10.6 nm at the Si-Si bonding interface, and the whole cross-section structure of the Si-Si bonding consists of a Si substrate, an amorphous Si layer and a Si substrate.

It is known that the magnetic performance can he significantly improved by inserting a thin intermediate layer of CnCrTa between a CoCrTaPt magnetic layer and a Cr alloy underlayer in magnetic thin tilm media [1-3]. A number of investigations have been done on the effects of Ta addition on COCffaPt and CoCtTa magnetic thin films 14.51. It is generally agreed that Ta enhances Cr segregation at column boundaries but not Ta segregation. In addition, CO grain isolation can also he achieved by preferential inter-grain diffusion of underlayer materials to the CO alloy grain boundaries [2,3]. In this paper, we are interested in studying effects of Ta content in the range of 0-1 1 at% in CoCrTa intermediate-layer on thin film magnetic recording media. In the present work, the thin film media deposited on glass substrate have the same structure and fixed thickness for NiAl seedlayer, CrV underlayer and CoCrTa intermediate layer: NiAI(5Onm)/CrV(30nm)/CoCfla(Znm)/CoCfl~. For each of composition of CnCrTa layer. the thickness of the CoCflaPt magnetic layer was varied at 10nm. 12nm. 14m and 18nm. All the thin film media were prepared by DC sputtering with the same sputtering process using an Innotec four-target sputter machine. ConaCr~ target was used for the intermediate layer deposition. Ta composition was adjusted by placing Ta chips on the target. Chemical compositioa of CoCrTa was analyzed by energy disperse x-ray spectroscope (EDX). Microstructure and morphology were investigated by transmission electron microscope (TEM). Magnetic properties were characterized by a vibrating sample magnetometer (VSM). Stnrcturd properties were studied by x-ray diffraction (XRD). When Ta content is in the range of 0-5 at% in the CoCrTa intermediate layer, and the thickness of magnetic layer is 12 tun, the thin film media can possess good magnetic performance such as H, up to around 4000 Oe, and M,t value below 0.4 memu/cm2. In plane TEM bright field image of the above mentioned sample is shown in Figure 1. The visually estimated average grain size of the magnetic layer is ahout 12 nm and very uniform. Figure 2 shows the magnetic layer thickness dependence of H, undcr different Ta content in CoCrTa intermediate layer. The H, increases as magnetic layer thickncss increases from 10 nm tu 12 nm, thereafter H, decreases. It is clearly seen in Fig. 2, that the higher Td content in CoCrTa intermediate layer, the greater decrease in H, when the thickness of the magnetic layer is higher than 12 nm. The result may he related to the change of interface due to Ta addition in intermediate layer. But Ta content in intermediate layer has no intluence on M,t value when the thickness of magnetic layer is fixed. The M,t value of the samples with the CoCrTas intermediate layer decreaqes from 0.56 to 0.32 memu/cm2 with decreasing magnetic layer thickness from 18 nm to IO nm. For all of the samples, the S and S* value is around 0.77 and 0.85, respectively. The change in H, as a function of Ta content in intermediate layer is shown in Figure 3. As Ta content is in the range of 0-5 at% in the intermediate layer, a high H, can he achieved for different thickness of the magnetic layer. H, decreases dramatically once Ta content is over 5 at% in the intermediate layer. This feature may be explained from the result of XRD as shown in Fig. 4. There is obvious change in CO alloy texture and peak intensity with changing Ta content in the CoCrTa intermediate layer. Both Co(100) and Co(l0l) peaks exist with no shift when Ta content is increaed from 0 to 5 at%, however, Co(l0l) texture is decreased significantly at 7 at% of Ta and CO alloy peaks disappeared at 9 at% and 11 at% of Td. The lattice constant a and c for hcp CO phase and a for bcc Cr phase were calculated. It is found that the misfit of Co(lOl)/Cr(llO) planes and Co(lOO)/Cr(211) planes are respectively ahont 3.5 5% and 5.7 %, when Ta content is in the range of 0-5 at%, but the misfits are correspondingly over 15 % and 21 % at 7 at% of Ta, because Ta addition enlarges c lattice parameter of CO phase. In summary, the Ta content in the CoCrTa intermediate layer has effectively influence on the magnetic performance of the thin film media. The effects can be attributed lo the change of interface and the lattice mismdtch between CO and Cr planes due to Ta addition in the intcrmediate layer.

Porous Si(1 1 1) and Si(1 0 0) as an intermediate buffer layer for nanocrystalline InN films