Silicon Wafer Bonding by Modified Surface Activated Bonding Methods

Although the monolithic integration of silicon carbide (SiC) Micro-Electro-Mechanical Systems (MEMS) and SiC electronics is very promising, it is still very challenging due to the absence of suitable bulk machining technology of SiC. In this research, wafer bonding was proposed to assist the monolithic integration of SiC MEMS and SiC electronics by the formation of a suspended epitaxial SiC membrane. However, currently, SiC-SiC wafer bonding is still very difficult, especially for its direct wafer bonding. Surface activated bonding (SAB) method was applied to realize the direct wafer bonding of SiC-SiC at room temperature. The bonding energy of ∼1.4 J/m2 was obtained without orientation dependence. Correspondingly, the tensile strength of bonding interface is ∼12.2 MPa and could be improved by rapid thermal annealing to the values higher than 21.6 MPa. The bonding mechanisms were investigated through Monte Carlo simulation, interface analysis by transmission electron microscopy (TEM) and energy dispersive X-ray spectroscopy (EDX), and in-situ analysis on the activated SiC surfaces by X-ray photoelectron spectroscopy (XPS).

Lithium niobate (LiNbO3: LN) is a unique ferroelectric material with excellent electro-optical (EO), non-linear optical (NLO), acousto-optical, piezo-electrical, and pyro-electrical characteristics, in addition to a wide transmission curve ranging from the ultraviolet to the mid-infrared. Thus, it is widely utilized for numerous applications, including ultra-fast optical modulators, wavelength convertors, surface acoustic wave filter, and pyro-imaging devices. At the same time, Gallium Nitride (GaN) film is a direct widegap semiconductor commonly used for light emitting diode light, power devices, and radio frequency components. Therefore, wafer bonding of LN and GaN has the potential for creating a new platform capable of realizing multi-functional micodevices that can fully exploit the unique properties mentioned above. Generally, a GaN sample is prepared as a structure of an as-grown GaN film on a sapphire. The coefficient thermal expansion (CTE) of LN is 14.4 (a-, b-axes)-7.5 (c-axis) × 10-6/K at room temperature, whereas that of GaN is 5.59 (a-axis)-3,17 (c-axis) × 10-6/K and that of sapphire is 5 × 10-6/K. Therefore, it is desirable for low-temperature bonding of LN and as-grown GaN film for overcoming the large CTE mismatch. Conventional plasma activated bonding requires relatively high temperature annealing process at above 200 °C to achieve a high bond strength. The high-temperature process causes a large thermal stress, which may often generate cracks. Surface activated bonding (SAB) is a powerful method for low temperature bonding of dissimilar materials. By a surface activation process with argon (Ar) fast atom beam (FAB) or ion beam bombardment, a high bond strength can be achieved at room temperature due to the strong attractive forces between atomically cleaned surfaces. Recently, room-temperature bonding of a GaN and a Si has been demonstrated using ion beam bombardment [F. Mu et al., Applied Surface Science, 2017]. It is interesting to apply the SAB to bond a LN wafer and a GaN. To date, little work has focused on the application of the SAB method to the direct bonding of LN and GaN. In this paper, we report surface activated bonding of a LN and a GaN at room temperature. In this experiment, we prepared a commercially available 3-inch LN (Z-cut) wafers and a 2 inch as-grown GaN wafer which is a 2-μm-thick GaN epitaxial layer grown on a 430-μm-thick sapphire wafer. In direct bonding, sub-nm RMS roughness of the bonding surface is typically required to achieve strong bonding at room temperature. Using atomic force microscopy, the measured RMS roughness of LN and GaN epitaxial layer was approximately 0.1 nm and 0.3 nm, respectively. For surface activation process, Ar FAB bombardment on each bonding surface was performed. Figure 1 (a) shows a schematic diagram of our SAB process. When the background pressure fell below 1×10-5 Pa, the two wafers were activated by Ar FAB bombardment. After that, the surfaces of LN and GaN epitaxial layer were brought into contact with an applied load at room temperature. The Ar FAB bombardment time was 60 s, and the applied load was approximately 10 MPa. Figure 1 (b) shows the photograph of the bonded LN and GaN wafers at room temperature. As shown, LN/GaN hybrid structure without generating serious cracks was demonstrated in wafer scale. The void was formed by particle contaminations and non-bonding at the peripheral area may be responsible for the thickness distribution of the GaN epitaxial layer. In this presentation, we will discuss the bond quality and the bonding interface state in details. The authors would like to acknowledge Mitsubishi Heavy Industries Machine Tool Co., Ltd. for assisting with surface-activated bonding experiment. This study was supported in part by JSPS KAKENHI Grant Number JP17H04925. Figure 1

The manufacturing of heterostructures is interesting in fields such as photonics(1), solar energy production(2) and quantum technologies(3). This paper, dedicated to germanium on silicon heterostructure manufacturing and stress engineering, builds up on Ref. (4) findings.We are using the differences in terms of coefficients of thermal expansion (CTE) between germanium and silicon, to induce a tensile stress in a thin germanium layer transferred by the Smart CutTM [1] technique onto a silicon substrate. In this approach, a bulk germanium wafer is directly bonded on a bulk silicon wafer, using surface activated bonding (SAB)(5,6). Process integration advantages are the low defect density of bulk germanium and the tensile stress that can be tuned using the bonding temperature.The adherence of SAB was high during bonding at relatively high temperatures (~250°C). Without any further heat treatment, the adherence was found to be 3500mJ/m2 by the double cantilever beam method (under prescribed displacement control and in an anhydrous atmosphere). This remarkable adherence prevented the Ge/Si heterostructure from sliding, debonding and cracking (7). The CTE difference could thus generate a large amount of tensile stress during the heterostructure cooling and splitting steps.First of all, using finite elements simulation, a model was designed to predict the bow and the in-plane internal stress after bonding and cooling of the heterostructure. Thanks to it, we could also evaluate those two values after layer transfer (splitting step). This numerical approach was more accurate than the former analytic method (Timoshenko), which did not include the non-linearity of CTE with temperature and for large displacements. Figure 1 shows the bow and the in-plane stress expected for a bonding at 250°C of, respectively, a Si/Si homostructure (Figure1.a) and a strained Ge/Si heterostructure (Figure1.b), when cooled down to room temperature. The former is flat while the bow of the latter is large indeed.Then, based on indications collected from simulations, we performed the bonding of a Si/Si homostructure in an EVG®ComBond® at 250°C. The same bonding conditions were used for an implanted germanium on silicon heterostructure. As shown in Figure 2, both bond pairs exhibited a bow close to that from FE simulations.After that, a splitting step was carried out, resulting in a thin germanium film on a silicon wafer (200mm), as shown in Figure 3. The film was transferred almost to the whole surface. The bow after splitting was of 10µm, a value not so far from the simulated value of 28.6 µm.As far as tensile stress was concerned, we used X-Ray Diffraction to gain access to the lattice parameter deformation and thus the tensile stress, 0.05% and 72 MPa, respectively (Figure 4). In comparison, FE simulation gives us 107 MPa of tensile stress after splitting. The main advantage of our approach is the lack of misfit dislocations in the Ge film, at variance with Ge epitaxy on Si (with a threading dislocations density typically around 107 cm-2, then).The presentation will focus, first, on the simulation tool and the manufacturing process used to fabricate such stressed germanium films. Then, stress calculus will be detailed. Finally, TEM imaging of cross-sections, XRD and bow measurements will help us better understand the specificities of such thin Ge films transferred on Si bulk wafers. Higurashi E. Heterogeneous integration based on low-temperature bonding for advanced optoelectronic devices. Jpn J Appl Phys. 1 avr 2018;57(4S):04FA02.King RR, Law DC, Edmondson KM, Fetzer CM, Kinsey GS, Yoon H, et al. 40% efficient metamorphic GaInP∕GaInAs∕Ge multijunction solar cells. Appl Phys Lett. 30 avr 2007;90(18):183516.Scappucci G, Kloeffel C, Zwanenburg FA, Loss D, Myronov M, Zhang JJ, et al. The germanium quantum information route. Nat Rev Mater. oct 2021;6(10):926-43.Abadie K, Fournel F, Morales C, Vignoud L, Colona JP, Widiez J. Manufacturing of Optimized Ge Substrates Using a Covalent Bonding Process. ECS Meet Abstr. 23 nov 2020;MA2020-02(22):1623.Takagi H, Kikuchi K, Maeda R, Chung TR, Suga T. Surface activated bonding of silicon wafers at room temperature. Appl Phys Lett. 15 avr 1996;68(16):2222-4.Rebhan B, Vanpaemel J, Dragoi V. 200 mm Ge Wafer Production for Oxide-Free Si-Ge Direct Wafer Bonding. ECS Trans. 8 sept 2020;98(4):87-100.Chao YL, Tong QY, Gösele UM. Thermomechanical stress in silicon on quartz wafer bonding and Smart Cut® process. MRS Proc. 2001;681:I5.10. [1] Trademark from S.O.I.T.E.C. .S.A. Figure 1

Surface activated bonding (SAB) is a room temperature wafer-level bonding technique widely used in the packaging and fabrication of electronic devices. The standard SAB process for Si involves the removal of surface oxides and contamination layers via fast atom bombardment, which generates dangling bonds on the outermost Si surface. However, adsorbed water on wafer surfaces hinders this activation process, leading to degraded bonding quality. In this study, we investigate prebonding baking as a method to eliminate adsorbed water before the SAB step. Experimental results demonstrate that pre-bonding baking significantly enhances bond strength for Si, sapphire, and SiO2 by effectively desorbing water from the wafer surfaces. Additionally, annealing Si wafers prior to SAB reduces residual oxides at the bonding interface, indicating improved activation efficiency. These findings highlight the potential of pre-bonding baking as an effective approach to enhance room-temperature wafer bonding quality using the SAB methodology.

A novel strategy for GaN-on-diamond device with a high thermal boundary conductance

New cladding process has been developed by means of a Surface Activated Bonding (SAB) technique. In this process, Surfaces of materials to be bonded are immediately cleaned, activated by Ar ion sputter etching, and rolled with low distortion at room temperature in vacuum [1]. It is found that this process is available not only for cladding metals but also for laminating polymer film on metal without any adhesives. We have already reported copper (Cu) clad laminating (CCL) materials using Liquid Crystal Polymer (LCP) and showed its possibility by means of the SAB [2-5]. Interface of the LCP/Cu produced by the SAB was flat and smooth when comparing to that by conventional method. Therefore, the laminated material showed high electric property and excellent etching property [4,5]. In this study, it was investigated that the transition of chemical bonding state around interface between Cu foil and LCP film after heat treatment. It has been already reported that interface of Cu side was oxidized by heat treatment [2]. The XPS analysis showed that the ratio of C=O bonding on the LCP film side also interface increased with an increase in heat treatment temperature. So it was revealed that the heat treatment at high temperatures oxidize not only the Cu interface formed by Cu foil and sputtered Cu, hut also the LCP film side interface. We also have reported that Cu sputtering on the LCP film before laminating improved bonding strength [4,5]. However in heat-resistant test, the bonding strength significantly decreased because of oxidization around the interface and of softening of Cu foil due to re-crystallization. To improve the heat resistance, we used Cu-O.O2%Zr alloy foil having high re-crystallization temperature and sputtered Cu-Ni alloy or Ni-Cr alloy on LCP Tim instead of Cu sputtering. The improved materials also showed high frequency property and good etching property.

Direct bonding of GaAs and diamond was successfully achieved by surface activated bonding (SAB) method at room temperature. The structures of GaAs/diamond interface before and after annealing at 400 ℃ were investigated by transmission electron microscope (TEM). A 3-nm-thick crystal defect layer was formed at the bonding interface, the change in the crystal defect layer thickness was not observed after annealing. There were no nanovoids and micro-cracks observed at the interface with annealing at temperature 400 ℃. These results indicated that the GaAs/diamond interface has high thermal stability and can withstand the temperature rise of power devices during operating.GaAs-based power devices have excellent electron transport properties and make it suitable for high frequency operation at high frequency. The output power and the lifetime of GaAs devices are largely degraded by the temperature rise of the active region during operating. The thermal conductivity of GaAs is very small, so that the generated heat by self-heating cannot be sufficiently dissipated through the substrate. Diamond has the highest thermal conductivity among materials and is an ideal material to suppress the temperature rise of the devices. The integration of the GaAs-based devices and diamond will be a more promising approach for improving the heat dissipation ability of the devices. However, since there is a large mismatch between the thermal expansion coefficients and lattice constants of GaAs and diamond, the direct growth of GaAs on diamond is quite difficult and vice versa. We have achieved the direct bonding of diamond and Si at room temperature using surface activated bonding (SAB) method and obtained the excellent thermal stability bonding interface.1-3 In this study, we examine the structures of the diamond/GaAs bonding interface and effects of thermal annealing on the interfacial structure of the interface by transmission electron microscopy (TEM).GaAs epitaxial layer grown on GaAs substrate was bonded to diamond by SAB method at room temperature. GaAs epitaxial substrate was composed of a 200 nm thick GaAs and a 100 nm thick InGaP layers grown on GaAs. After bonding, the GaAs substrate and InGaP layer were removed by mechanical polishing and selective wet etching to obtain 200 nm thick GaAs layer bonded to diamond substrates. The structures of the GaAs/diamond bonding interface were investigated by TEM observation. The TEM samples were fabricated by using a focused ion beam (FIB) technique.The cross-sectional TEM images of the GaAs/diamond bonding interface without and with annealing at 400°C for 5 min are shown in Fig 1(a) and 1(b), respectively. A crystal defect layer with a thickness of about 3 nm was observed in the as-bonded interface. The thickness of the crystal defect layer did not change, but no voids or cracks were observed at the bonding interface after annealing. These results indicate that the bonding interface of diamond and GaAs has an excellent thermal stability, which is extremely qualified for the heat dissipation of the devices.Acknowledgements This work was partly supported by Hirose International Scholarship Foundation. The fabrication of the TEM samples and part of the TEM observations were respectively performed at The Oarai Center and at the Laboratory of Alpha-Ray Emitters in IMR under the Inter-University Cooperative Research in IMR of Tohoku University (NO. 18M0045 and 19M0037).References Liang, S. Masuya, M. Kasu, N. Shigekawa, Appl. Phys. Lett. 2017, 110, No.111603.Liang, S. Masuya, S. Kim, T. Oishi, M. Kasu, N. Shigekawa, Appl. Phys. Express 2019, 12, No. 016501.Liang, Y. Zhou, S. Masuya, F. Gucmann, M. Singh, J. Pomeroy, S. Kim, M. Kuball, M. Kasu, N. Shigekawa, Diam. Relat. Mater. 2019, 93, 187 – 192. Figure 1

In the surface activated bonding (SAB) at room temperature, the surfaces of specimens are sputter etched by high-energy ion/atom beam of inert gas to remove surface contaminants and create active surfaces, which are ready to form inter-atomic bonds even at room temperature. Ar has been used for the purpose. However, sputter etching by Ar high-energy ion/atom beam causes increase of surface roughness. In case of wafer direct bonding, the surface roughness has large influence on the quality of bonding interface such as bonding strength, local strain, and so on. Therefore a surface activation process which does not cause surface roughening has been desired.In this work, we have examined the applicability of Ne fast-atom-beam (FAB) to SAB of Si wafers at room temperature. We confirmed that Ne-FAB does not cause surface roughening and Si wafers are successfully bonded by Ne-beam surface activation. In addition, we found that Ne-FAB sputter etching has surface smoothing effect which improves quality of the bonding interface.The room temperature wafer bonding apparatus (MWB-12-ST: Mitsubishi Heavy Industries) with the FAB 104 (Atom Tech Ltd.) beam sources were used for bonding of Si wafers. The etching rate of Si surface by Ne-FAB was about half of that of Ar-FAB using the beam source operation parameters of 1.8 kV applied voltage and 100 mA input current. With etching depth more than 1.5 nm, the bonding strength comparable to Si bulk strength was attained by Ne-FAB surface activation. With etching depth of 30 nm, we measured surface roughening of Si wafers using Ne, Ar and Xe gas. The surface roughness of Si wafers largely increased by the Ar and Xe-FAB sputter etching. In case of Ne-FAB, the surface roughness did not increase by the sputter etching and kept the initial rms value of 0.18 nm of CMP-polished Si wafers.Moreover, we found surface smoothing effect of the Ne-FAB. We prepared Si wafers which had been roughened by Xe-FAB etching. They could not be bonded directly by SAB. Surface roughness of the roughened Si wafer decreased from 0.40 to 0.17 nm rms by applying Ne-FAB of 30 nm etching depth. Along with the surface smoothing, the bonding strength was largely improved and finally became equivalent to Si bulk strength. It was confirmed that strain near the bonding interface was decreased by the smoothing effect as shown in Figure.

Bumpless interconnect of 6-mum-pitch Cu electrodes was realized at room temperature with the surface activated bonding (SAB) method. In this study, we propose a novel bumpless structure, where the electrodes and a surrounding Cu frame are fabricated with the same height to increase bond strength and demonstrate the feasibility of a sealing interconnection between Cu surfaces. The Cu damascene process, assisted by the reactive ion beam etching (RIE) process, was used to fabricate the Cu structures. 1,048,748 electrodes were fabricated in a square of about 6-mm2 area; 923,521 connections were placed inside the 10-mum-wide Cu frame. These 923,521 electrodes were arranged into a spiral chain to enable the detection of the positions with insufficient interconnection by electrical resistance measurements. Using the SAB conditions optimized in the previous studies, we found that 744,769 electrodes among them were successfully interconnected. The failure in the electrical interconnection reappeared in some lines near the frame of all samples. The optical beam induced resistance change (OBIRCH) analysis, in which particularly high resistance is presented as a bright contrast, showed that these insufficient connections might be due to sample preparation error rather than a bond defect, because high resistance was observed only at some specific electrodes amid the line in this area. In other well-bonded area, the mean contact resistance was as low as 0.08 Omega; it is considered that a sealing effect was achieved at the frame structure because there was little increase in the contact resistance in high temperature storage test performed at 150degC for 1000 h, in ambient air.

Silicon etch rates in CF4/O2 plasma have been studied in a diode reactor which allows both reactive ion etching (RIE) and plasma etching. A fluorine population was also measured from the intensity of optical emission in conjunction with argon actinometry, in order to separate etch rates contributed by the ion enhanced etching and the spontaneous chemical etching. A heavily doped n-type silicon etches faster than undoped silicon, while a heavily doped p-type silicon etches slower than undoped silicon. Although this doping effect is present in both ion enhanced etching and chemical etching, it is a more severe influence in the isotropic chemical etching. The thermal activation energy for the chemical etching was measured to be 0.10 eV, independent of the chemical and electrical properties of dopants. The Coulomb attraction between uncompensated donors (As+) and chemisorbed halogens (F−) enhances etch rates in a heavily doped n-type silicon, whereas the Coulomb repulsion between uncompensated acceptors (B−) and chemisorbed halogens (F−) inhibits etch rates in a heavily doped p-type silicon.

This paper presents a room temperature bonding technique of glass substrates with a transparent bonding interface. As a room temperature bonding method, surface activated bonding (SAB) is applied for the bonding of glass using Si intermediate layer. However, the bonding interface is colored by the deposited Si layers, which leads to lower applicability to optical devices. In this study, a new concept of SAB is developed using aluminum oxide intermediate layer. Glass substrates are successfully bonded at room temperature via the aluminum oxide intermediate layers activated by Ar ion beam irradiation, showing a bond strength of 1.32 J m−2. It is also shown that the optical characteristics at the interface such as transparency and reflectance are not degraded, while the bonding interface of the SAB using Si intermediate layer deteriorates. The XPS and STEM‐EDX analyses indicate that the bonding is achieved through the amorphous and O‐deficient aluminum oxide interface. This technique will provide a transparent interface for glass bonding by a room temperature process, which is highly desired in optical device fabrication.

Chemical composition around diamond/silicon heterointerfaces fabricated by surface activated bonding (SAB) at room temperature is examined by energy-dispersive X-ray spectroscopy under scanning transmission electron microscopy. Iron impurities segregate just on the bonding interfaces, while oxygen impurities segregate off the bonding interfaces in the silicon side by 3–4 nm. Oxygen atoms would segregate so as to avoid the amorphous compound with silicon and carbon atoms, self-organized at the bonding interfaces in the SAB process. When the bonding interfaces are annealed at 1000 °C, the amorphous compound converts into cubic silicon carbide (c-SiC), and nano-voids 5–15 nm in size are formed at the region between silicon and c-SiC, at which the oxygen density is high before annealing. The nano-voids can act as the gettering sites in which metal impurities are preferentially agglomerated, and the impurity gettering would help to improve the electronic properties of the bonding interfaces by annealing.

Summary form only given. Plasma processing for semiconductor fabrication is moving toward reactors using lower gas pressure, and higher plasma density. At the pressures of interest (1-20 mTorr), the mean free path of neutral species is commensurate with the dimensions of interest (Knudsen number Kn>0.1). As a result, fluid momentum and continuity equations may not be accurate representations of the transport of these species. One method to address long mean-free-path transport is based on the use of a "transition matrix", or "propagator". The propagator specifies the probability that a particle, having suffered a collision or been produced at a remote site, has its next collision at the location of interest. In this work the propagator method has been extended to a time dependent form by utilizing a retarded time. In doing so, we account for the finite flight time of species from the remote site to the local site. The propagator has been implemented as the kinetic module in a 2-dimensional hybrid plasma equipment model, and has been applied to analysis of inductively coupled plasma (ICP) etching reactors. The propagator is first constructed using Monte Carlo techniques by launching particles having a randomly chosen mean-free-paths and velocities, and recording the locations at the end of their flights. MC methods, as opposed to analytic techniques, were used to construct the propagator so that complex equipment geometries could be addressed. In applying the time dependent propagator, species densities at past times are recorded. The instantaneous particle fluxes at local sites are then obtained by interpolating the past history of densities based on the retarded time.

This paper focuses on low temperature bonding technology and its applications in photonics devices in use in various fields. Fabrication of a wafer bonded two-layer germanium (Ge) structure for far-infrared detector application was demonstrated by surface activated bonding (SAB) method at room temperature. Very low-resistive Ge/Ge junctions were obtained by SAB method. The feasibility of low-temperature 3-D integration of optical semiconductor chips was also demonstrated by Au-Au SAB in ambient air. Using this technique, compact and thin micro encoders and laser Doppler velocimeters (2.8 mm × 2.8 mm × 1 mm thick) were developed.

This chapter introduces plasma etching—an extensive and perhaps the most widely used micro- and nanoprocessing method both in industry and in research and development laboratories worldwide. The emphasis is on the practical methods in plasma etching and reactive ion etching when used for submicron and nanoscale device fabrication. The principles of plasma etching and reactive ion etching equipment for sample fabrication will be introduced.