Scheduling components for multigigabit network SoCs

Road's traffic management is an important topic which is more and more covered by various actors in the Intelligent Transportation Systems field via many proposed solutions. Thus, in order to achieve the dream of a smart city, special attention was given to the treatment of cities' traffic management problem; especially in junctions which constitute bottlenecks for traffic flow leading to a poor quality of urban mobility. The aim of this study is to examine further the RED approach for traffic lights management recently proposed for the design of an adaptive signal control system In the context of ITL (Intelligent Traffic Lights) systems, based generally on sensors, and communication technologies. Traffic management is a well known problematic in data networks. Thus, several researchers have studied methods for providing congestion avoidance at the gateway called also router. Inspired by advanced technologies in Internet traffic management, we propose a system based on the RED (Random Early Detection) mechanism widely used by routers to avoid congestion. Our contribution consists of the adaptation of this mechanism to the ITS context by applying it for traffic lights management. Our system will certainly contribute to decrease waiting times, fuel consumption and pollution. This paper will present the complete adaptation of the RED algorithm to the context of the intelligent transport systems. In addition, the RED-based design performance is compared with that of the pre-timed model to gain insights between the two systems.

Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on such architectures. We present a case study of mapping an IPv4 forwarding switch application on the Intel IXP1200 network processor and we compare this implementation with an analytical model of both the application and architecture used to evaluate different design alternatives. Our results not only show that we are able to model the IXP1200 and our application within 15% of the accuracy compared to that of IXP1200 simulation, but also find closely matching trends for different workloads. This shows the clear potential of such analytical techniques for design space exploration.

With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of network processors. In this paper, we use an assertion-based methodology for system-level power/performance analysis to study two dynamic voltage scaling (DVS) techniques, traffic-based DVS and execution-based DVS, in a network processor model. Using the automatically generated distribution analyzers, we analyze the power and performance distributions and study their trade-offs for the two DVS policies with different parameter settings such as threshold values and window sizes. We discuss the optimal configurations of the two DVS policies under different design requirements. By a set of experiments, we show that the assertion-based trace analysis methodology is an efficient tool that can help a designer easily compare and study optimal architectural configurations in a large design space.

SummaryMulticore network processors have been playing an increasingly important role in computational processes, which emphasize on scalability and parallelism of the systems, in distributed environments especially in Internet‐based delay‐sensitive applications. It is an important but unsolved issue, however, to efficiently schedule tasks in network processors with multicore and multithread for improving the system throughput as much as possible. Profiling can gather runtime environment information and guide the compiler to optimize programs through scheduling tasks based on the runtime context. This paper proposes a profiling‐based task scheduling approach, targeting on improving the throughput of multicore network processor (Intel IXP) systems in the balanced pipeline way. In this work, we investigate a profiling‐based task scheduling framework, a task scheduling algorithm, and a set of performance models. Our task allocation scheme maps tasks onto the pipeline architecture and multiple threads of network processors in parallel, which incorporates the profiling context and global thread refinement. We evaluate our task scheduling algorithm by implementing representative network applications on the Intel IXP network processor. Experimental results demonstrate that our algorithm is able to schedule tasks in a balanced pipeline fashion and achieve the high throughput and data transmission rate. Copyright © 2012 John Wiley & Sons, Ltd.

In urban areas, the traffic congestion is the major prevalent transportation issue, and the vehicular traffic management is the critical concern for the town planners. As the road network is added day by day, the effort on traffic management is more crucial. So far, more contributions have been made in the traffic management problem, still there lags a gap on attaining accurate result. This paper introduces a new traffic management system with the use of smart barricade system. Basic concept of this smart system is the localization of barricade that is based on nature as well as the intensity of traffic with respect to three barricade modes: open, close, and partially open. To develop the smart barricade system for dynamic traffic management, initially, the historical data collection is done. The collection of historical data is enabled by adopting various traffic centres that facilitate the collection number of vehicles per instant and the vehicles speed. In this model, the placing of barricade is decided by the fuzzy logic system, and the system also concentrates on finding optimal membership limits to attain better results. For this, this paper proposes a new algorithm named Modified Grasshopper Optimization Algorithm with New Position, which is the modification of GOA. Finally, the proposed model compares its performance over other methods like conventional GOA, Particle Swarm Optimization, Firefly, Grey Wolf Optimization with respect to measures like number of vehicle transmitting and vehicle distribution, and proves the betterment of proposed model.

Modern network interfaces demand highly intelligent traffic management in addition to the basic requirement of wire speed packet forwarding. Several vendors are releasing network processors in order to handle these demands. Network workloads can be classified into data plane and control plane workloads, however most network processors are optimized for data plane. Also, existing benchmark suites for network processors primarily contain data plane workloads, which perform packet processing for a forwarding function. We present a set of benchmarks, called NpBench, targeted towards control plane (e.g., traffic management, quality of service, etc.) as well as data plane workloads. The characteristics of NpBench workloads, such as instruction mix, parallelism, cache behavior and required processing capability per packet, are presented and compared with CommBench, an existing network processor benchmark suite [T. Wolf et. al., (2000)]. We also discuss the architectural characteristics of the benchmarks having control plane functions, their implications to designing network processors and the significance of instruction level parallelism (ILP) in network processors.

This paper builds on top of a collaborative ATFM framework previously published, which demonstrated a potential in significant pre-tactical system delay reduction over the current European ATFM practices. In this paper, we aim to raise the technology readiness level (TRL) of the original works, focusing on improving the tractability of its DCB optimizer. To this end, we apply a Dantzig-Wolfe (DW) decomposition approach and use high performance computing (HPC) techniques to attempt the solution in a short time. The main contribution of this paper is to mitigate the computational burden faced by previous approaches, which will make all the contributions demonstrated therein more operationally feasible.

This paper explores integrating biomechanics data and bio-inspired models to enhance efficiency in business administration, focusing on task scheduling, resource allocation, and workflow optimization. Biomechanics, traditionally applied in fields such as healthcare and sports, is used to analyze human movement and physical strain in business processes, particularly in physically demanding environments like manufacturing and logistics. Bio-inspired models, such as Genetic Algorithms (GA) and Particle Swarm Optimization (PSO), are applied to solve complex optimization problems in resource management and task scheduling. The study presents three case studies to demonstrate the practical application of these methodologies: (1) workflow optimization in a manufacturing environment using biomechanics data to reduce physical strain and improve task completion times; (2) resource allocation in Supply Chain Management (SCM) using PSO to minimize transportation and labor costs while improving warehouse utilization and delivery times; and (3) task scheduling in an office environment using GA to enhance task efficiency, workload distribution, and employee satisfaction. The case study results demonstrate the practical application of these methodologies: (1) a 21.6% reduction in shoulder joint strain and an 18.2% improvement in task completion time in a manufacturing setting; (2) a 16.1% reduction in transportation costs and an 18.6% improvement in warehouse utilization in SCM using PSO; and (3) a 17.6% decrease in makespan and a 29.8% improvement in workload distribution through GA-based task scheduling in an office environment. These findings underscore the potential of combining human-centered biomechanics data with bio-inspired optimization models to improve operational efficiency, employee well-being, and cost-effectiveness significantly.

The remarkable and continuous increase in link speed and application variety of Internet calls for new QoS provision technology that is both efficient and flexible. Being a kind of application-specific processor optimized for network computation, network processor (NP) combines the high performance of hardware and the flexibility of software, which exactly meets the demands of nowadays Internet traffic management and QoS provision. This paper originally presents an efficient traffic management mechanism based on AMCC network processor. The data-plane software architecture, the manipulation process, especially some key components such as accurate traffic classification, flexible access control and three-step scheduling are discussed in detail. We implement the traffic management mechanism based on NP3450 network processor and test it using Spirent AX/4000 broadband test system. The test results show that our proposal can efficiently provide QoS guarantee for various traffic category on OC-48 links.

The Ration by Schedule (RBS) algorithm has been accepted by the aviation community as the basis of Collaborative Decision Making (CDM) in strategic Traffic Flow Management (TFM) initiatives such as Ground Delay Programs (GDPs) and Airspace Flow Programs (AFPs). However, applications of RBS to date have been limited to strategic metering applications in which the slots to be allocated to flights are all of equal duration, and the flights to be assigned to slots do not need to be differentiated. Decision support capabilities for the general Air Traffic Management (ATM) problem require planning and scheduling algorithms that properly recognize different flight characteristics such as weight class, runway, departure direction and other Air Traffic Control (ATC) procedural issues in determining the slot size that is required for each flight. In this paper, we describe our design and implementation of the Generalized RBS algorithm for a surface traffic management scheduling application which involves detailed flight-by-flight slot time assignment. This algorithm has been designed and developed to support the Collaborative Departure Queue Management (CDQM) component of the Surface Trajectory Based Operations (STBO) project. CDQM provides an equitable allocation of departure capacity to each flight operator at an airport for dynamic use in management of departure queues. The principles of the RBS algorithm are achieved through an initial planning pass based on scheduled data, followed by a second planning pass in which dynamic flight status is incorporated into the planning results.

Network processors (NPs) are widely used in many types of networking equipment due to their high performance and flexibility. For most NPs, software cache is used instead of hardware cache due to the chip area, cost and power constraints. Therefore, programmers should take full responsibility for software cache management which is neither intuitive nor easy to most of them. Actually, without an effective use of it, long memory access latency will be a critical limiting factor to overall applications. Prior researches like hardware multi-threading, wide-word accesses and packet access combination for caching have already been applied to help programmers to overcome this bottleneck. However, most of them do not make enough use of the characteristics of packet processing applications and often perform intraprocedural optimizations only. As a result, the binary codes generated by those techniques often get lower performance than that comes from hand-tuned assembly programming for some applications. In this paper, we propose an algorithm including two techniques - Critical Path Based Analysis (CPBA) and Global Adaptive Localization (GAL), to optimize the software cache performance of packet processing applications. Packet processing applications usually have several hot paths and CPBA tries to insert localization instructions according to their execution frequencies. For further optimizations, GAL eliminates some redundant localization instructions by interprocedural analysis and optimizations. Our algorithm is applied on some representative applications. Experiment results show that it leads to an average speedup by a factor of 1.974.

One of the main challenges in the development of tools and methodologies for a multiprocessor real-time embedded system is to reuse already developed software, but at the same time obtaining low memory footprint, low energy consumption, and minimal area, obviously addressing the real-time constraints. This work aims to face these problems at the middleware level. We show that adaptations in the platform architecture, for instance exploring hardware implementations of middleware services, such as task scheduling and communication, can drive better gains in application requirements like energy and performance, which are essential for embedded applications. This approach is coupled with a high flexibility in choosing either a hardware or a software implementation, because services are encapsulated into objects and the application development and the design space exploration at middleware level can be performed independently from each other, in a fully transparent way. Furthermore, the use of the object-oriented approach reduces time-to-market and development costs.

One of the main challenges in the development of tools and methodologies for a multiprocessor realtime embedded system is to reuse already developed software, but at the same time obtaining low memory footprint, low energy consumption, and minimal area, obviously addressing the real-time constraints. This work aims to face these problems at the middleware level.We show that adaptations in the platform architecture, for instance exploring hardware implementations of middleware services, such as task scheduling and communication, can drive better gains in application requirements like energy and performance, which are essential for embedded applications. This approach is coupled with a high flexibility in choosing either a hardware or a software implementation, because services are encapsulated into objects and the application development and the design space exploration at middleware level can be performed independently from each other, in a fully transparent way. Furthermore, the use of the object-oriented approach reduces time-to-market and development costs.

A novel four-tier architecture for delay aware scheduling and load balancing in fog environment

Traffic sub-area division is an important problem in traffic management and control. This paper proposes a clustering-based approach to this problem that takes into account both temporal and spatial information of vehicle trajectories. Considering different orders of magnitude in time and space, we employ a z-score scheme for uniformity and design an improved density peak clustering method based on a new density definition and similarity measure to extract hot regions. We design a distribution-based partitioning method that employs k-means algorithm to split hot regions into a set of traffic sub-areas. For performance evaluation, we develop a traffic sub-area division criterium based on the \(S_Dbw\) indicator and the classical Davies-Bouldin index in the literature. Experimental results illustrate that the proposed approach improves traffic sub-area division quality over existing methods.