Specification of Data Intensive Applications with Data Dependency and Abstract Clocks

NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract Session: 2711 Teaching Hardware Design of Fixed-Point Digital Signal Processing Systems David V. Anderson1 and Tyson S. Hall2 1 Georgia Institute of Technology, Atlanta, GA 30332–0250, dva@ece.gatech.edu 2 Southern Adventist University, Collegedale, TN 37315–0370, tyson@southern.edu Abstract Signal processing theory and practice are enabling and driving forces behind multimedia de- vices, communications systems, and even such diverse fields as automotive and medical sys- tems. Over 90% of the signal processing systems on the market used fixed-point arithmetic because of the cost, power, and area savings that fixed-point systems provide. However, most colleges and universities do not teach or teach only a very little fixed-point signal process- ing. This issue is being addressed slowly around the country but now a new challenge or opportunity presents itself. As reconfigurable logic technology matures, field-programmable gate arrays (FPGAs) are increasingly used for signal processing systems. They have the ad- vantage of tremendous throughput, great flexibility, and system integration. The challenge is that signal processing in FPGAs is a much less constrained problem than signal processing in special purpose microprocessors. The opportunity arises in that it is now possible to explore more options and, more especially, to take a more systems-level approach to signal processing systems. In short, designing a signal processing system using FPGAs provides opportunities to look at many system design issues and trade-offs in a classroom setting. We have developed a course to teach signal processing in FPGAs at Georgia Institute of Technology and in this paper we consider the challenges and methods of teaching fixed- point system design in this course. We discuss the topics chosen and how they differ from traditional microprocessor-based courses. We also discuss how systems engineering concepts are woven into the course. 1 Motivation This paper describes the early development of a system design curriculum that uses field programmable gate arrays (FPGAs) to implement digital signal processing (DSP) systems. The goals of this curriculum are several-fold, including: • to prepare students for system design problems with which they are likely to be pre- sented upon graduation; Proceedings of the 2007 American Society for Engineering Education Annual Conference & Exposition Copyright c 2007, American Society for Engineering Education

At first thought, one may not realize the need for a special issue of Parallel and Distributed Computing Practices focused on Cluster Computing when our community has already invested years of research and spent a wealth of resources on traditional Big Iron supercomputers, for instance, the SGI/Cray Origin and IBM SP. Academia, industry, and national laboratories are still using, and for the foreseeable future, will continue to use, supercomputers to solve both grand-challenge scale and high-throughput applications. Then why the interest and new popularity of research into clusters for high-performance parallel and distributed applications? Clusters incorporate the tremendous successes that are attributable to our parallel and distributed processing community. Over the next decade, clusters will span the entire range of high-performance computing platforms. Instead of being restricted solely to supercomputers for achieving high-performance computing, the spectrum of available platforms will spread out to Beowulf-class clusters, to superclusters, and on to supercomputers. Moving along this continuum represents increasing computational resources, which in turn allows the capability for solving larger classes of applications or instances of problems. Compute-bound applications on workstations often may take advantage of the extra horsepower provided by symmetric multiprocessors. Applications with even larger computational requirements and a high-degree of concurrency may use Beowulf clusters, that is, clusters that are home-built from mass-market, commercial off-the-shelf workstations and networks, for instance, PC's interconnected by Fast Ethernet. A supercluster may contain commodity SMP nodes interconnected with scalable, low-latency, high-bandwidth networks, and is integrated by a system vendor rather than the computational scientist. Applications with greater complexity, for example, grand challenges from the sciences, demand scalable systems with high-performance, interconnects, perhaps coupled with terascale I/O subsystems, and thus, are appropriate for these superclusters. Finally, supercomputers, the largest of the clusters, may provide the ultimate platform for the highest-fidelity models and simulations and data-intensive applications. At each step up this ladder of cluster architectures, the system cost increases approximately by an order of magnitude, but having the high-performance capability to solve the problem of interest may require an entry point at any of these levels, the Beowulf, or supercluster, or even supercomputer platform. Cluster computing with Beowulf- or superclusters, thus, may be one or two orders of magnitude less expensive than a supercomputer, and provide a cost-effective solution and capability that was not available on a workstation. But this cost comparison measures just the basic system price. What about the applications? As recently as a few years ago, the lack of a canonical high-performance architectural paradigm meant that migrating to a new computer system, even from the same vendor, typically required redesigning applications to efficiently use the high-performance system. Thus, the application must be redesigned with parallel algorithms and libraries that are optimized for each high-performance system. This process of porting, redesigning, optimizing, debugging, and analyzing, the application may in fact be prohibitively expensive, and certainly frustrating when the process is completed just in time to greet the next generation system! That was then, this is now. With the successful standardization of system-level interfaces, many of these issues no longer hinder our expedited use of these new, high-performance clusters. The message-passing interface (MPI) is a clear example of a standard that has contributed significantly to the success of cluster computing. Supercomputer vendors working together with the high-performance computing community embarked on a process to standardize the user-level interface and behavior for passing messages between concurrent tasks. Now, using ordinary sequential compilers and vendor-supplied or freely-available implementations of this message-passing interface, applications can be implemented efficiently on one supercomputer and ported with little or no effort to other parallel machines. The message-passing paradigm, thus, provides a reasonably good canonical high-performance model and methodology for implementing high-performance applications. An algorithm that exhibits efficient execution and scaling on one machine then is likely to perform well on another with little or no additional programming effort. Using this cluster computing paradigm, algorithms typically are optimized by minimizing the number of remote memory accesses (reducing the amount of messages passed), and carefully organizing the data placement to increase memory locality. Thus, high-performance algorithms and applications that have been optimized for supercomputers, using the same cluster paradigm, may be appropriate for Beowulf and superclusters. Cluster computing, realizing the importance of a standard high-performance programming environment that applies equally well to both ends of the architectural spectrum, highly leverages these and other successes from parallel and distributed processing research and development. This is in an exciting, new era for high-performance computing where the canonical architectural paradigm stretches from home-built Beowulf clusters, to superclusters, and on to supercomputers. But cluster computing faces some challenges ahead of it. Continued research is required for designing 1) scalable, high-performance algorithms, applications, and methodologies, that can tolerate the communication overheads, and adapt to hybrid, SMP, and heterogeneous, nodes; 2) high-performance computer architectures, scalable interconnection networks, and I/O subsystems; and 3) scalable systems software, compilers, and monitoring tools. Cluster computing has come of age, and it is high time for the parallel and distributed processing community to lay the groundwork for our own legacy of success stories. David A. Bader University of New Mexico

Event Abstract Back to Event Logarithmic Hybrid Optical Neural Network-type systems: towards digital-optical cognitive models of robust object recognition Ioannis Kypraios1* 1 Oxford University, Centre for Innovation & Enterprise, APEM Computing Lab, United Kingdom Abstract - By combining the complex logarithmic r-theta mapping of a space-variant imaging sensor [1, 2] with the hybrid digital-optical neural network filter together with a window unit multiple objects of the same class or of different classes can robustly be recognized. The resulted logarithmic r-theta mapping for hybrid digital-optical neural network system or briefly referred to as logarithmic hybrid optical neural network system is shown to exhibit with a single pass over the input data simultaneously in-plane rotation, out-of-plane rotation, scale, log r-θ map translation and shift invariance, and good clutter tolerance by recognizing correctly the different objects within the cluttered scenes. Here, we study the biologically-inspired knowledge learning and knowledge representation [3] achieved by the logarithmic hybrid optical neural network-type of object recognition systems (see Fig. 1 and Fig. 2). We investigate the effects that altering the knowledge representation can have on the problem’s learned knowledge and the problem solving process, in overall. Further, we study the logarithmic unconstrained-, logarithmic constrained-, and logarithmic modified-hybrid optical neural network systems architectures’ designs [4, 5]. We show how the logarithmic unconstrained-hybrid optical neural network object recognition system applies an unconstrained representation of the problem’s knowledge to maximize the search of solutions, how the logarithmic constrained-hybrid optical neural network object recognition system uses a constrained representation of the problem’s knowledge to guide the search towards certain solutions over others in the multidimensional search space, and how the logarithmic modified-hybrid optical neural network object recognition system uses memory-like masks to recall certain solutions over others in the multidimensional search space. Fig. 1. (a) Simplified human retina and visual cortex model used for description purposes only; (b) A digital-optical computational model for the cognitive interaction between the retina and the human visual cortex with the general logarithmic hybrid optical neural network architercture. Fig. 2. Biologically-inspired knowledge learning and knowledge representation with the logarithmic hybrid optical neural network-type of object recognition systems. Figure 1 Figure 2 References [1] C. F. R. Weiman, “Video compression via log-polar mapping”, Real-Time Image Processing II, SPIE Symposium on OE/Aerospace Sensing, Vol. 1295, 266-277 (1990) [2] C. G. Ho et al., “Sensor geometry and sampling methods for space-variant image processing”, Pattern Analysis and Applications, Vol. 5, 369-384 (2002) [3] I. Lee, and B. Portier, "An empirical study of knowledge representation and learning within conceptual spaces for intelligent agents", 6th IEEE/ACIS International Conference Computer and Information Science, 463-468, Melbourne, Australia (2007) [4] I. Kypraios et al., “Fully invariant complex Logarithmic r- map for the Hybrid Optical Neural Network filter for object recognition within cluttered scenes”, 50th Anniversary International Symposium ELMAR 2008, IEEE Region 8/IEEE Croatia Section/EURASIP, Zadar-Croatia, Vol. 1, 141-146 (2008) [5] I. Kypraios et al., “Logarithmic r-θ mapping for hybrid optical neural network filter for object recogntion within cluttered scenes”, Recent Advances in Multimedia Signal Processing and Communications, SCI231, Springer-Verlag Berlin Heidelberg, 91-120 (2009) Keywords: digital-optical, cognitive, object recognition, Robust and Adaptive Systems, Knowledge representation, learning and memory Conference: Neuroinformatics 2013, Stockholm, Sweden, 27 Aug - 29 Aug, 2013. Presentation Type: Poster Topic: Neuromorphic engineering Citation: Kypraios I (2013). Logarithmic Hybrid Optical Neural Network-type systems: towards digital-optical cognitive models of robust object recognition. Front. Neuroinform. Conference Abstract: Neuroinformatics 2013. doi: 10.3389/conf.fninf.2013.09.00066 Copyright: The abstracts in this collection have not been subject to any Frontiers peer review or checks, and are not endorsed by Frontiers. They are made available through the Frontiers publishing platform as a service to conference organizers and presenters. The copyright in the individual abstracts is owned by the author of each abstract or his/her employer unless otherwise stated. Each abstract, as well as the collection of abstracts, are published under a Creative Commons CC-BY 4.0 (attribution) licence (https://creativecommons.org/licenses/by/4.0/) and may thus be reproduced, translated, adapted and be the subject of derivative works provided the authors and Frontiers are attributed. For Frontiers’ terms and conditions please see https://www.frontiersin.org/legal/terms-and-conditions. Received: 09 Apr 2013; Published Online: 11 Jul 2013. * Correspondence: Dr. Ioannis Kypraios, Oxford University, Centre for Innovation & Enterprise, APEM Computing Lab, Begbroke, Oxfordshire, OX5 1PF, United Kingdom, ioanniskyp@yahoo.com Login Required This action requires you to be registered with Frontiers and logged in. To register or login click here. Abstract Info Abstract The Authors in Frontiers Ioannis Kypraios Google Ioannis Kypraios Google Scholar Ioannis Kypraios PubMed Ioannis Kypraios Related Article in Frontiers Google Scholar PubMed Abstract Close Back to top Javascript is disabled. Please enable Javascript in your browser settings in order to see all the content on this page.

Computing-in-memory (CIM) with emerging non-volatile resistive memory devices has demonstrated remarkable performance in data-intensive applications, such as neural networks and machine learning. A crosspoint memory array enables naturally parallel computation of matrix–vector multiplication (MVM) in the analog domain, offering significant advantages in terms of speed, energy efficiency, and computational density. However, the intrinsic device non-ideality residing in analog conductance state distorts the MVM precision and limits the application to high-precision scenarios, e.g., scientific computing. Yet, a theoretical framework for guiding reliable computing-in-memory designs has been lacking. In this work, we develop an analytical model describing the constraints on bit precision and row parallelism for reliable MVM operations. By leveraging the concept of capacity from information theory, the impact of non-ideality on computational precision is quantitively analyzed. This work offers a theoretical guidance for optimizing the quantized margins, providing valuable insights for future research and practical implementation of reliable CIM.

Third International Conference on International Information Hiding and Multimedia Signal Processing - Copyright

This paper presents the real-time imlementation of the ITU G.723.1[ 1 J which is the standard speech coder for the video conferencing system (H.324). The implementation is realized using the Multimedia Signal Processor (MSP) which is the programmable SIMD (Single Instruction Multiple Data) processor with eight 32-bit, sixteen 16-bit, or thirty two 8-bit fixed-point ALU[2]. The novel vectorization schemes for the G.723.1 data structure applied to the MSP architecture are discussed in the paper.

The purpose of this study was to justify of the formation technique of representation of modeling methodology at computer science lessons. The necessity of studying computer modeling is that the current trends of strengthening of general education and worldview functions of computer science define the necessity of additional research of the problems relating to study of computer modeling bases within the basic course of computer science. Such necessity is caused by that “Mathematics and Computer Science” education range is a backbone line of the course. Consideration of modeling issues within computer science course is the basis of cogitative operations development called in pedagogies as methods of mental actions or intellectual abilities. But at schools and in pedagogical higher education institutions of Republic of Kazakhstan this section of computer science course is not considered properly. The issues related to a formation technique of basic concepts of modeling, and also usage of applied software environments for development and research of models except an Excel editor are not developed. Practically there are no techniques creating a broad view on concept of model, there is no methodically acceptable models’ typology. The research results indicate that when disclosing the material on themes about modeling stages the process is should be considered as cyclic, there is need of interpretation of models’ relevance concept, “undelivered”, “vital” tasks are should be considered, which fully reflect intersubject links.

This paper describes and compares two particle excitation methods, square and sine wave, used in conjunction with novel application of Phase Doppler Anemometry (PDA) to obtain particle size and charge simultaneously in real time. Different signal processing strategies for particle velocity and size estimation are investigated, including Quadrature Demodulation (QD), spectral analysis and correlation technique. The system performance has been tested using Monte Carlo simulations obtained from the synthesized Doppler burst signals. Finally a mathematical model has been developed in order to estimate the percentage of particles captured in the measurement volume and successfully analyzed by the signal processing system leading to the optimization of the system parameters. It can be concluded that the signal processing system working in the square-wave excitation field and based on the spectral analysis performs better both in terms of the measurement range and the SNR requirement.

The execution of iteration methods, including iteration methods for time-dependent differential equations, is one of the most time-consuming tasks in scientific computing, especially when large systems have to be solved, large time scales have to be computed or solutions of high quality are required. To decrease the computation time, parallel machines can be used but a detailed analysis of the potential parallelism is needed for an efficient implementation as data dependencies can strongly limit the performance. This article describes and compares the potential parallelism of various iterative solution methods for linear and non-linear equation systems and ordinary differential equations. Methods that have been especially designed for parallel execution as well as parallel implementations of modern efficient sequential solution methods are considered.

Modelling is one of the central activities in Computer Science. Models are used as intermediate artifacts for system construction, as reasoning tools, for explanation, for description of reality, and for prediction of system behaviour. In this paper we introduce a novel conception of model. The range of models spans from elementary to matured models. Depending on the goal, purpose and function of the model within a deployment story (‘Gebrauchsspiel’) we may use the most appropriate model. If goals, purposes and functions are changing then we need to change the model.

Novel acousto-optic systems for spectrum analysis and phased array radar signal processing are proposed. The pulsed source 2-D multiplicative time and space integrating spectrum analyzer is proposed and experimentally demonstrated. This architecture is simpler, physically smaller, and less sensitive to mechanical vibrations than the pulsed source 2-D additive Mach-Zehnder interferometer based spectrum analyzer. Simple and compact optical disk based systems for 1-D and 2-D spectrum analysis are presented. The high data packing density, angular motion, and parallel read out capability of optical disks is uniquely exploited to generate the very high time bandwidth product reference signals required for temporal spectrum analysis, that are otherwise difficult to generate using electronics. A continuous wave 1-D time integrating disk spectrum analyzer is successfully demonstrated in the laboratory. The limited dynamic range due to huge bias levels in interferometric time integrating processors is alleviated by using photorefractive crystals as real time bias removers. Continuous wave 1-D and 2-D bias free acousto-optic architectures for spectrum analysis are theoretically and experimentally investigated from a systems viewpoint. Simple, compact, and powerful acousto-optic systems for control and signal processing in phased array radars are proposed that eliminate many system components like phase shifters, mixers, power dividers, and complex antenna feed networks, that are encountered in typical electronically controlled phased array radars. Via a single control parameter, namely frequency, the optical technique provides appropriately phased signals for transmission and reception in phased array antennas. The system is capable of continuous beam scanning, simultaneous multiple beam formation, and multi-target tracking, and can be integrated on a substrate to provide smaller and lighter phased array radars. Also, the system is resistant to electromagnetic interference (EMI), and signal phase shifts are independent of the radar carrier frequency employed. A 1-D linear phased array radar acousto-optic beam steerer is successfully demonstrated in the laboratory, and performance issues such as detector phase sampling error and phase linearity are highlighted. The linear array design is extended to planar and multiple linear arrays.

Photonic implementation of a highly reconfigurable wideband RF spectral shaper

<div class="section abstract"><div class="htmlview paragraph">The process of developing, parameterizing, validating, and maintaining models occurs within a wide variety of tools, and requires significant time and resources. To maximize model utilization, models are often shared between various toolsets and experts. One common example is sharing aircraft engine models with airframers. The functionality of a given model may be utilized and shared with a secondary model, or multiple models may run collaboratively through co-simulation. There are many technical challenges associated with model sharing and co-simulation. For example, data communication between models and tools must be accurate and reliable, and the model usage must be well-documented and perspicuous for a user. This requires clear communication and understanding between computer scientists and engineers. Most often, models are developed by engineers, whereas the tools used to share the models are developed by computer scientists. Computer scientists often struggle with implementing methods for exchanging data between models while simultaneously maintaining the usability that engineers desire, and engineers often struggle with utilizing the tools that computer scientists have developed. In the process of developing tools and interfaces for model sharing and co-simulation, much is lost in the communication between computer scientists and engineers. This paper seeks to ease the communication barrier associated with model sharing and model co-simulation by clearly and simply discussing some of the commonly associated challenges and solutions, and then providing clear and concise implementation examples.</div></div>

Cloud computing is beginning to play a dominant role in scientific computing. However, there are still several challenges that need to be addressed, before data-intensive scientific applications make the transition to the cloud. Adoption of a distributed shared memory (DSM) programming paradigm will be one approach to ease the transition, through the use of Partitioned Global Address Space (PGAS) languages. This paper explores initial results from the adoption of a PGAS language, Unified Parallel C, in programming a representative private cloud based on Eucalyptus.

Recent trends in mobile computing and multimedia application demand low power digital signal processing systems (DSP). The most important block in any DSP system is a finite impulse response (FIR) filter. Here a reliable low power FIR filter is designed using Vedic multipliers which specifically perform addition and shifting operation. The addition is done using full adder with 9 transistors which use only 3 transistor XOR gate. A four tap FIR filter was implemented in microwind 2 electronic design automation tool using CMOS 90nm technology. In the proposed design the power consumption is reduced by 23% and delay has been reduced by 44% when compared with the existing FIR filters.