Stability and Efficiency Enhancement of a C-band Class-F Power Amplifier Using a Coupling Compensation Method

This paper presents a novel method by using resonators in both input and output matching networks to design a tri-band GaN HEMT power amplifier. Two parallel resonators in series as one frequency selection element are used for each operation frequency. By applying this frequency selection element in both input and output matching networks constructed with microstrip line, tri-band matching network is realized. With our proposed frequency selection element, we can use the conventional L-type structure to design matching network for three frequencies so that the design analysis procedure is easier. We also propose a new simplified output matching network by using bias line to match the output impedance to reduce the number of resonators. To demonstrate our method, we fabricate a tri-band power amplifier that can work at 1 GHz, 1.5 GHz, and 2.5 GHz concurrently. Experimental results show that the output power is 39.8 dBm, 40.8 dBm, and 39.2 dBm with 56.4%, 58.3%, and 43.4% power added efficiency (PAE) at 1 GHz, 1.5 GHz and 2.5 GHz, respectively.

This paper presents a design for a highly-linear power amplifier — based on GaN HEMT- with an output power of more than 10W, and an ultra-broadband bandwidth extending from 0.8 to 4.2 GHz (136%). Different design techniques are adopted to achieve a flat power gain of 10 ± 1.5 dB over the entire operating bandwidth. Eighth order low pass filter matching circuits are designed for input and output matching networks, providing optimal fundamental and harmonic impedances within more than 2 octaves of operation. The designed power amplifier exhibits a small signal gain more than 10dB, an input/output return loss better than 10 dB within the operation bandwidth. Second and third-harmonic intermodulation distortion are far below −36dBc and −45dBc, respectively, at an input power of 30dBm over the entire frequency band, while achieving a power added efficiency (PAE) better than 25%. Using a two-tone testbench with a frequency spacing of 8 MHz, a maximum value of the output OIP2 and OIP3 are found to be greater than 50 dBm, and 60 dBm, respectively.

Improvement of power amplifier’s performance is the desired topic in communication systems. There are many efforts are made to provide good input and output matching, high efficiency, sufficient power gain and appropriate output power. This paper presents a power amplifier with optimized input and output matching networks. In the proposed approach, a new structure of the Hidden Markov Model with 20 hidden states is used for modeling the power amplifier. The widths and lengths of the microstrip lines in the input and output matching networks are defined as the parameters that the Hidden Markov Model should optimize. For validating our algorithm, a power amplifier has been realized based on a 10W GaN HEMT with part number CG2H40010F from the Cree corporation. Measurement results have shown a PAE higher than 50%, a Gain of about 14 dB, and input and output return losses lower than -10 dB over the frequency range of 1.8–2.5 GHz. The proposed PA can be used in wireless applications such as radar systems.

This paper presents a compact wideband power amplifier (PA) which can be reconfigured in two different wide bands for 5G applications. To achieve the reconfiguration of operation frequencies and reduce the circuit volume, a simple switching T-shaped impedance matching network is adopted, including only one PIN diode, to realize the input matching network (IMN) and output matching network (OMN). The second harmonic control technology is adopted to improve the performance. To demonstrate the reconfigurability of two wide bands, a PA was designed and fabricated to operate at 3.2-3.6 GHz and 4.6-5.0 GHz based on GaN HEMT die device. The size of PA is 43x45 mm. Measured results show that the designed PA achieves 40.5-41.7 dBm output power and 53%-71% drain efficiency in the first band, while 39-40.4 dBm output power and 48%-56% drain efficiency in the second band.

Multi-switch-controlled multi-mode TRFE with a high-linearity ATRSW for 2.4-GHz ISM applications

A compact broadband 12 W power amplifier with broadband matching networks is presented. Transistors connected in parallel are used to synthesize the high power. Input, interstage, and output matching networks are also properly designed to meet the requirement of the broadband application. The broadband high power amplifier (HPA) was fabricated using a 0.15‐μm gallium nitride (GaN) HEMT technology, with a maximum saturated measured output power of 43 dBm from 6 to 18 GHz. The measured power added efficiency exceeds 20% in the whole interested band. The proposed HPA also has a compact size of 3.1 mm × 2.96 mm.

In this paper, a novel half mode substrate integrated waveguide (HMSIW) 10W power amplifier (PA) designed with HMSIW matching network (MN) is presented for the first time. The HMSIW-based matching network (MN) is designed with microstrip-to-HMSIW transition and an inductive metalized post in HMSIW. The impedance matching for the fundamental frequency 2.14 GHz is realized by moving the position of the inductive metalized post in the HMSIW. Both the input and output MNs are designed with the proposed HMSIW-based MN concept. One HMSIW-based 10W PA using GaN HEMT at 2.14 GHz is designed, fabricated, and measured. The proposed HMSIW-based PA can be easily connected with any microstrip or SIW-based circuit. Measured results show that the maximum power added efficiency (PAE) is 72.2 % with 40.7 dBm output power and the maximum gain is 20.1 dB. At the design frequency of 2.14 GHz, the size of the proposed HMSIW-based PA is comparable with other microstrip-based PAs.

In this paper, we employ a novel method by using resonators with microstrip lines to design a dual-band GaN HEMT power amplifier. At both input and output matching networks, we add parallel resonators between series microstrip lines and open-circuited stubs to realize the dual-band operation. With our proposed structure, we can use the conventional L-type structure to design matching network for each operation frequency so that the design is easier. By using just one transistor without any tunable electronic element or switch, a novel dual-band class AB power amplifier working at 1.5 GHz and 2.4 GHz is designed and fabricated to demonstrate our proposed simple method. With dual-band matching networks using resonators, the experimental results show the output power 40.3 dBm and 39.05 dBm with power added efficiency (PAE) 55.63% and 40.25% at 1.5 GHz and 2.4 GHz, respectively.

A CMOS broadband millimeter-wave power amplifier (PA) based on a Sandwiched Transformer (ST) output matching network is presented in this paper. The ST output matching network with a three-layer structure providing a larger coupling coefficient (k) than the traditional two-layer stack structure is proposed for PA's output matching network. The layout of the transistors is optimized to improve the PA's performance. Fabricated in 65-nm CMOS process, the PA has achieved 15 dBm OP <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</inf> and 36.5% peak power added efficiency (PAE). The 3-dB bandwidth of the PA is from 22.8 GHz to 32.8 GHz.

This paper presents a compact transformer-based linear and efficient power amplifier (PA) in 0.13-μm SiGe:C BiCMOS for 5G applications. To reduce the form factor, an ultra-compact neutralized cascode PA core is proposed, which achieves a state-of-the-art power density. To obtain a gain flatness at 5G NR band n257 (26.50-29.50GHz), transformer-based input and output matching networks are designed. The PA demonstrates a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$S_{21}$</tex> 3-dB bandwidth <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(BW_{-3\text{dB}})$</tex> of 10.5GHz from 23.5 to 34GHz. At 28GHz/29GHz, the saturated output power ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$P_{\text{sat}}$</tex> ) are 22.7/22.4dBm with power-added efficiency (PAE) of 38.1/39.8%. The PA also supports 64- and 256-QAM modulated signal tests without digital pre-distortion (DPD). Over 26-30GHz, for 4.8Gb/s 64-QAM signals with peak-to-average power ratio (PAPR) 8.3dB at −25dB EVM, this PA continuously achieves >16dBm average power ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$P_{\text{avg}}$</tex> ) with >11% PAE.

A K-band power amplifier (PA) module with on-chip input and output matching network was fabricated in standard 130-nm CMOS process with 1.5-V supply voltage. The fully integrated PA module consists of 2-stage pseudo-differential cascode configuration PA and on-chip stacked balun based on transformer. At 26GHz, the PA achieved 18.6-dB small-signal gain, 12.2-dBm saturated output power and 22.4% power added efficiency (PAE). The chip occupies an area of 0.88 × 0.62mm2, including all the dc and RF pads.

In this paper, we present a monolithic microwave-integrated circuit (MMIC) asymmetric Doherty power amplifier (ADPA) using 0.25[Formula: see text][Formula: see text]m gallium-nitride (GaN) process with a compact chip size of 2.9 mm × 1.9 mm in wireless transmitters. Two different power amplifiers are adopted to solve the contradiction between the output power and efficiency of the conventional Doherty power amplifier (CDPA). In addition, phase compensation and low Q impedance inverting network (IIN) technology are used in the input and output matching networks, respectively, to expand the bandwidth of the entire ADPA. The post-layout simulation results show that the designed ADPA has a saturation output power 42.5 dBm with 800 MHz bandwidth from 6.6 to 7.4 GHz. The ADPA demonstrates 36.8–41.8% power-added efficiency (PAE), whereas 44–54% drain efficiency (DE) is achieved at saturation power.

This paper presents a CMOS broadband millimeter wave power amplifier (PA) based on magnetically coupled resonator (MCR) matching network. The MCR matching network is analyzed theoretically. Design method for MCR-based broadband PA is proposed. For the PA’s output matching network, the inductance ratio should be equal to the load/source resistance ratio to achieve broadband impedance transformation. And the coupling coefficient ( $k$ ) of the MCR can be determined from the no gain ripple condition. Fabricated in 65-nm CMOS process, the PA chip achieves 32.9% peak power added efficiency, 15.3-dBm saturated output power ( $P_{\mathrm {sat}}$ ), and 12.9-dBm output 1-dB compression point ( $P_{\mathrm {1\,dB}}$ ). The fractional bandwidth of the PA is 63.3% from 21.6 to 41.6 GHz, which covers the full Ka-band (26.5 to 40 GHz).

In order to meet the requirements of high efficiency and broadband for the wireless communication system, a high efficiency and broadband gallium nitride power amplifier (PA) is designed and verified. Using the step-matching structure, its bandwidth has been improved. Furthermore, its input matching network is constructed by connecting several microband lines serially to reduce the matching Q value. Meanwhile, the harmonic control network is designed as the output matching network, which is built by a quarter-wave (λ/4) line open circuit and short circuit microwave lines in parallel. Thus, its drain efficiency (DE)can be improved. This design is simulated and tested at 2.2–3 GHz with the gallium nitride (GaN) process. After measuring, it attains an output power (Pout) of 39.5–41.5 dBm, Gain of 10.5–12.5 dB, DE of 65.1%–78.3% with power added efficiency (PAE) of 64.8%–76.2%.

This article presents novel methodologies and practical design considerations for a <inline-formula> <tex-math notation="LaTeX">$D$ </tex-math></inline-formula>-band transmit/receive (T/R) front-end module (FEM) in 22-nm fully depleted silicon-on-insulator (FD-SOI/FDX) CMOS technology for beyond-5G wireless communication. An ABCD-matrix-based synthesis methodology is proposed to co-design the T/R switch (SW) topology, including the power amplifier (PA) output and the low noise amplifier (LNA) input matching networks, to minimize the losses in both Tx and Rx modes. Based on this synthesis, an asymmetric T/R SW topology is realized with intrinsic electrostatic discharge (ESD) protection. Both the stacked-field-effect transistor (FET) PA and LNA adopt differential topologies with transformer-based matching networks to eliminate unwanted effects from common-mode parasitics. Passive gain-boosting techniques are used for both PA and LNA to enhance different TRx specifications. A reusable unit-cell layout strategy is applied for transistor arrays to accelerate the multiple-stage PA implementation and maintain uniform performance and minimal parasitics. At 140 GHz, the Tx achieves a power gain <inline-formula> <tex-math notation="LaTeX">$G_{p}$ </tex-math></inline-formula> of 33.6/35.7 dB, a saturated output power <inline-formula> <tex-math notation="LaTeX">$P_{\mathrm{ sat}}$ </tex-math></inline-formula> of 12.5/14.7 dBm, a peak power-added efficiency (PAE) of 10.8/11.3&#x0025;, and an output 1-dB compression point (OP1dB) of 9.4/11.2 dBm with nominal/boosted supplies. An average output power (<inline-formula> <tex-math notation="LaTeX">${P_{out}}_{avg}$ </tex-math></inline-formula>)/PAE of 4.9 dBm/2&#x0025; is obtained for a 4-GHz bandwidth 64-QAM single-carrier signal at an error-vector magnitude (EVM) of &#x2212;24.8 dB. Moreover, its Tx-mode reliability has been assessed. At 140 GHz, the Rx achieves a 20-dB <inline-formula> <tex-math notation="LaTeX">$G_{p}$ </tex-math></inline-formula>, a &#x2212;24-dBm input 1-dB compression point (IP1dB), and a 9.2-dB noise figure (NF) with only 20-mW power consumption from a 0.8-V supply. This compact FEM has a PA/LNA core area of 0.024/0.032 mm², respectively.