Symbolic Circuit Analysis Using Mathematica

Parallel to algebraic methods, graphical circuit analysis methods have the advantage of cancellation-free. This paper proposes a graph reduction method for hierarchical symbolic circuit analysis by applying a binary decision diagram (BDD) for data sharing. This method is extended from the Graph-Pair Decision Diagram (GPDD) method which was developed for two-port dependent sources. New graph construction rules for multiple-port dependent sources are introduced, with which large analog circuits can be analyzed hierarchically. The new hierarchical method guarantees the cancellation-free property at each layer of hierarchy. The BDD-based hierarchical analysis method can greatly reduce the analysis complexity of the entire circuit, while the software construction and circuit partition remain easy. The new method is compared to the algebraic hierarchical method based on DDD (Determinant Decision Diagram) which does not have the cancellation-free property. Comparable performance can be achieved with the new method which has the extra cancellation-free property.

The generalization of Bode’s sensitivity analysis technique for all types of the transfer functions and circuit elements is presented in the paper. The proposed formulae for first- and second-order symbolic sensitivity calculation provide the compact size of obtained expression and have the advantages of cancellation-free sum-of-product terms and matrix-free computation. This is achieved by means of the concept of high order summative cofactors and the generalized parameter extraction method. The proposed technique is implemented in symbolic circuit analysis program Cirsym. Illustrative example on symbolic sensitivity circuit analysis and comparison of the presented technique with the transimpedance method and the method based on the modified Coates flow-graph are given.

Engineering analysis has undergone a dramatic change in the last 5 years. Computer programs with symbolic analysis, advanced interfaces, and high-level languages have brought advanced mathematics to everyone. Not only have these programs made mathematics more accessible, the programs have also made it easier to communicate the results of our analyses. This presentation will demonstrate several aspect of engineering design: symbolic circuit analysis; inverting analysis into design; simple field computation; complex algebra; documentation and presentation. These new programs significantly multiply an engineer's productivity. >

A new approach to the problem of symbolic circuit analysis of large-scale circuits is presented. The methodology has been implemented in a computer program called SCAPP (symbolic circuit analysis program with partitioning). The method solves the problem by utilizing a hierarchical network approach and the sequence of expressions concept rather than a topological approach and the single expression idea which have dominated symbolic analysis in the past. The result is a linear growth in the number of terms in the symbolic solutions for the network approach versus the exponential growth exhibited by traditional methods. The analysis methodology introduces the concept of the RMNA (reduced modified nodal analysis) matrix. This allows the characterization of symbolic networks in terms of only a small subset of the network variables (external variables) rather than the complete set of variables. The analysis algorithm is most efficient when network partitioning is used. Partitioning results in a reduction in the number of terms in the symbolic solutions.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A sequential method of analysis of nullor-based active network is presented. The symbolic circuit analysis can be performed easily with the knowledge of properties of circuit elements including nullor elements. The practical circuit examples are given to demonstrate the feasibility of the proposed approach.

Symbolic circuit analysis involves deriving symbolic expressions for performance measures, such as voltage gain, input impedance, and evaluating them to obtain more insight into the behaviour of a circuit. In modern semiconductor technologies, it is more useful to evaluate the symbolic expressions using interval methods in order handle variations in parameter values. We compare the performance of different interval methods in evaluating symbolic expressions. Our experiments show that Generalised Interval Arithmetic is the most efficient method in affne form for our application. However, this method should be modified to suit long chains of computation. Our modification yields tighter interval bounds compared with other interval methods.

This chapter gives a description of the extension of Generalized Parameter Extraction Method (GPEM) for symbolic analysis of large-scale analog circuits containing pathological elements. The brief overview of the parameter extraction approach is included. An algorithm implementing the concept of Higher Order Summative Cofactors (HOSC) for determinants computation of the pathological element-based circuits is proposed. In this chapter, we also present the hierarchical decomposition techniques of upward and downward analysis of electronic circuits by GPEM. The proposed techniques are used in freeware symbolic analyzer CirSym. Several examples are presented to illustrate the advantages of the GPEM applications.

Symbolic circuit analysis

In this paper, we propose a novel symbolic analysis method for analog behavioral modeling by Boolean logic operations and graph representation. The exact symbolic analysis problem is formulated as a logic circuit synthesis problem where we build a logic circuit, which detects whether or not a given symbolic term is a valid product term from a determinant. The logic circuit is represented by binary decision diagrams (BDDs), which can be trivially transformed into zero-suppressed binary decision diagrams (ZBDDs). ZBDDs are essentially determinant decision diagrams (DDDs) representation of a determinant. The significance of the new method is that all product terms can be constructed implicitly and simultaneously, in contrast to all previous symbolic analysis methods where symbolic terms are generated explicitly and sequentially by Laplace expansion or topological methods. We further apply the logic synthesis idea to generating symbolic coefficients of s-expanded polynomials and present a method to compute coefficients individually and selectively. Our new approach demonstrates an inherent relationship between circuit simulation and logic synthesis for the first time. Experimental results show the speedup of our new method over the existing flat method and its greater capacity over both existing flat and hierarchical symbolic analyzers.

We propose a novel method of symbolic time-series analysis aimed at characterizing the regular or chaotic dynamics of coupled oscillators. The method is applied to two identical pendulums mounted on a frictionless platform, resembling Huygens’ clocks. Employing a transformation rule inspired in ordinal analysis [C. Bandt and B. Pompe, Phys. Rev. Lett. 88, 174102 (2002)], the dynamics of the coupled system is represented by a sequence of symbols that are determined by the order in which the trajectory of each pendulum intersects an appropriately chosen hyperplane in the phase space. For two coupled pendulums we use four symbols corresponding to the crossings of the vertical axis (at the bottom equilibrium point), either clock-wise or anti-clock wise. The complexity of the motion, quantified in terms of the entropy of the symbolic sequence, is compared with the degree of chaos, quantified in terms of the largest Lyapunov exponent. We demonstrate that the symbolic entropy sheds light into the large variety of different periodic and chaotic motions, with different types synchronization, that cannot be inferred from the Lyapunov analysis.

This work proposes canonical constrained narrowing, a new symbolic reachability analysis technique applicable to topmost rewrite theories where the equational theory has the finite variant property. Our experiments suggest that canonical constrained narrowing is more efficient than both standard narrowing and the previously studied contextual narrowing. These results are relevant not only for Maude-NPA, but also for symbolically analyzing many other concurrent systems specified by means of rewrite theories.

Frances E. Dolan, Marriage and Violence: The Early Modern LegacyMarriage and Violence: The Early Modern Legacy. Frances E. Dolan. Philadelphia: University of Pennsylvania Press, 2008. Pp. 235.

This chapter contains sections titled: Introduction The Superposition Method The Th��venin Method Norton's Method The Mesh Method of Analysis The Nodal Method of Analysis Which One Is the Best Method? Using all the Methods Summary and Conclusions Further Reading Problems

This chapter discusses the conversion of voltage source to an equivalent current source and vice versa. Know the methods of voltage sources in series and parallel operation and also current sources. Understand the branch current analysis method, mesh analysis method and node voltage analysis method applied to circuit analysis.

In this paper, a new appearance-based technique called symbolic factorial discriminant analysis (symbolic FDA) is explored for face representation and recognition under varying illumination conditions. In the past few years, many appearance-based methods have been proposed to model image variations of human faces under different lighting conditions using single valued variables to represent the facial features. In the proposed symbolic factorial discriminant analysis method, we extract interval type discriminating features, which are robust to illumination changes. The minimum distance classifier with symbolic dissimilarity measure is used for classification. The proposed method has been successfully tested for face recognition using three databases, namely, Yale Face database B, CMU PIE database and Harvard database. The experimental results have demonstrated the effective performance of this method.