Terahertz and laser imaging for printed circuit board failure detection

This paper describes research and development efforts in the use of infrared (IR) laser beams for detecting failures in integrated circuits resident on printed circuit boards. This work involves taking advantage of the transparency of the silicon substrate of ICs to radiation in the near infrared (NIR) spectrum to devise a non-invasive method for imaging the component circuitry of the IC. The implication is that a means to see into the physical structure of an integrated circuit can be created by using lasers tuned to these wavelengths. While the silicon substrate is transparent to the laser, the circuit paths and devices embedded within the substrate are readily visible since their metallic composition is opaque to laser energy at this wavelength. A laser test fixture consisting of a 1064 nm continuous wave laser, CCD camera, and image acquisition board is used to generate images from flip-chip integrated circuits. Multiresolution image processing techniques are then applied to the resulting images to identify potential defects.

The paper shows the possibility of Hierarchical Systems (HS) technology use in the tasks of Printed Circuit Boards (PCB) geometric design and interconnections (conductive pathways) quality testing. It gives formal description of the PCB construction and both the design and testing processes. Presented HS technology allows easy correction of interconnections topology of PCB, the mechanism of information aggregation permits reduction of computer memory, availability of coordinator allows performing decision making tasks on its layers. Possibility of HS technology realization using standard computer program and technical means is shown in the work as well.Keywordshierarchical systemscircuit boarddesign and testing

Industry-produced printed circuit boards (PCBs) used by the United States Navy and Marine Corps are typically coated with a layer of "conformal coating" made of silicone or polyurethane in order to protect electrical and electronic components on the board. Conformal coating has to be removed every time board troubleshooting and maintenance are performed, and must be reapplied after board maintenance is complete. This can be an expensive and time-consuming process. This paper describes an effort to develop a non-contact solution to detect failed components on a PCB without having first to remove the conformal coating. This patent-pending technique detects density changes in the physical makeup of circuit board components due to failure. By analyzing ultrasonic reflections from the components at 2MHz, the authors were able to distinguish between working components and failed components with varying degrees of accuracy. The authors applied this technique to 1KΩ resistors and three types of transistor-to-transistor logic (TTL) integrated circuits (ICs). Overvoltage faults were induced in these components in order to generate observable density changes. To reduce human error, a measurement rig was built which incorporated an automated X-Y-Z plotter system, in order to process dozens of components at a time without human interaction. The data gathered by this system was processed to isolate only the acoustic reflections of components on a circuit board. Time-domain and frequency-domain features were then extracted. These features were used to train neural networks to distinguish between working components and components with over-voltage faults that were not readily observable by eye. Each type of component or chip needed to have its own associated trained neural network. For 1KΩ resistors, the system has demonstrated seventy to eighty percent accuracy in distinguishing components with over-voltage faults. For two of the TTL ICs, eighty to eighty-five percent accuracy has been achieved. For one IC type, a fifty-five percent accuracy was measured. The authors have demonstrated that low-cost acoustic measurements in the megahertz range can be used to detect failures in ICs and other common circuit board components.

The materials used in the field of printed circuit boards are becoming increasingly complex as they are common to make use of numerous combination of metallic and composite plies. The potential for utilization of circuit boards is generally verified through the numerical simulation, especially for the multilayer printed circuit boards with high electronic density. This paper provides a numerical model intended to describe numerically the behavior of multilayer multimaterial circuit boards. Two parts are considered in the developed model: one is elastic-plastic damaging model that is presented to describe the metallic ply in the multilayer circuit boards; another is degenerated bi-phase model that is presented to describe composite ply. With the combination of equivalent laminate (EQLAM) method, the degenerated bi-phase successfully models the woven glass-fiber/epoxy-resin composite ply. These two plies are the basic components of multilayer circuit boards. Meanwhile, with the verification of static tests and dynamic tests, the reliability of presented model is confirmed.

Printed Circuit Board (PCB) testing has traditionally relied on manual inspection methods, which are often timeconsuming, error-prone, and costly. These limitations result in longer processing times, increased production costs, and inconsistent quality assurance. To address these challenges, this paper proposes a Generative AI-Based PCB Testing (GABPT) system designed to automate defect detection and classification in PCBs. The system leverages high-resolution image acquisition, advanced AI-powered image processing, and classification algorithms to identify common defects such as scratches, missing holes, broken paths, mouse bites, short circuits, and absent conductors. Utilizing a Quad ARM Cortex-A72 processor, the system processes captured PCB images in realtime and delivers immediate feedback on defects. The GABPT system aims to reduce human error, accelerate the inspection process, and minimize testing costs. It emphasizes efficient image preprocessing, precise image analysis, and hardware-software integration for reliable defect detection. By automating PCB inspection, the proposed system enhances testing accuracy, promotes cost-effective production, and supports sustainable manufacturing practices, ultimately contributing to the delivery of higher-quality electronic products.

A description is given of the test concept and experimental validation of measurement techniques which exploit built-in-test (BIT) to simplify RF susceptibility measurements of complex digital integrated circuits (ICs) and printed circuit (PC) boards. The use of the BIT capability of VLSI devices and PC boards: (1) simplifies the hardware and software interfaces to the device-under-test; and (2) reduces the external test equipment requirements. A specific example is given as to how these techniques and procedures were applied to a self-testing Am2903 4-bit microprocessor slice test circuit. Test data are presented which demonstrate the feasibility of using BIT techniques to obtain susceptibility thresholds with a significant reduction in test complexity and external test equipment requirements. The limitations associated with using BIT techniques for susceptibility characterizations of ICs and PC boards are also addressed. >

"Electronic manufacturing is currently one of the fastest growing industrial areas. This is due to the rapid advances in the computer and telecommunications sectors. Due to these advances, new surface mount devices have been developed to achieve greater miniaturisation at lower costs. As a result, a new surface mount technology has been developed to mount these devices onto printed circuit boards. However, problems exist with aspects of this process, principally open solder joints which result from circuit board warpage. The aim of this thesis is to undertake a) both an experimental and theoretical investigation of the reflow solder process and b) to develop thermal and structural models to analyse circuit board warpage. This research should aid manufacturing engineers in understanding the influence of the solder reflow process parameters on board warpage. Extensive experimental testing of the circuit board materials during the process is also presented. The thermal model detailed in this thesis simulates a) forced convective heat transfer through air impingement to the boards and b) the three dimensional temperature distribution within a composite laminate. The thermal model predicts the temperature distribution within a populated laminated composite circuit board to within 3% when compared to experimental data. The experimental results show that the convective heat transfer coefficient is primarily dependant on Reynolds number, and also the orifice to plate distance and orifice diameter. It was found that at high Reynolds number, the heat transfer coefficient increases significantly at low orifice to board distance. This heat transfer rate has to be balanced against the maximum speed of the air to prevent the components been blown off the boards. The 5mm diameter orifice provides the optimum balance between air speed and heat transfer rate. The structural model simulates the influence of a) board support, b) reflow temperature profile, c) components on the board and d) board layup on circuit board deformation. The experimental appraisal and model predictions show that the warpage of the printed circuit boards is dependant on a) support of the board during the process, b) symmetry of the board layup, c) coefficients of thermal expansion of the board materials, d) temperature distribution in the boards i.e. symmetric or nonsymmetric about board centre and e) temperature applied to the board. This research proves that if adequate support is applied to the boards during the reflow soldering process then, the warpage of the printed circuit boards may be kept within acceptable margins. Board warpage exists in current printed circuit boards because a) the boards cannot be manufactured truly symmetric in layup and b) Non-uniform temperature distributions are present in the board during the solder reflow process which leads to non-uniform expansion of the constituent laminate layers due to their varying coefficients of thermal expansion."

A study of the effects of NIR laser radiation on interlaminar fracture toughness of CFRP

The research object in the work is the printed circuit boards (PCB) Production technological process using the additive technology of photopolymer 3D printing. The existing problem is that the manufacturing process of single-sided and double-sided PCBs, simple in technology, from the third to the fifth accuracy class, requires the use of a large amount of consumables and technological equipment. In turn, this affects the cost of the product. The research subject is models and methods for manufacturing PCB using photopolymer 3D printing. In order to reduce the cost of materials: film or aerosol photoresist, as well as reduce the number of technological operations, applying photoresist and for the manufacture of PCBs stencils, it is proposed to use photopolymer 3D printing technologies for the manufacture of PCBs. The paper analyzes the costs of Plexiwire Resin Basic Orange Transparen photopolymer resin for the manufacture of single-sided PCBs and calculates the cost of the consumable (resin) compared to the costs of dry film photoresist. 60 % cost of consumables (photopolymer resin) compared to dry film photoresist for making single-sided PCBs. The work is aimed at determining the dependence of the geometric dimensions of the PСВs topology and the consumption of photopolymer resin on the technological parameters of photopolymer exposure. A regression correlation model of the dependence of resin consumption on exposure parameters has been developed and correlation coefficients have been calculated. It has been established that with an increase in the exposure time of the photopolymer resin, the consumption of the photopolymer resin increases and the deviation of the geometric dimensions of the PCBs topology increases, which in turn negatively affects the quality of the product. Therefore, using the obtained regression model, it is possible to calculate the influence of parameters on the PCB topology and reduce the deviation of conductor sizes and resin consumption.

An innovative approach is described for diagnosing faults in printed circuit boards (PCB) and PCB components through the detection, analysis, and localization of electrical field changes that occur within and around the PCB. This method utilizes electromagnetic emissions (EME) originating from the PCB to determine circuit health. EME from rapidly changing voltages and currents within high-speed logic and other circuits have traditionally been seen as a problematic source of interference that must be eliminated to as great an extent as possible. However, changes within these emissions can be a highly significant indicator that a failure has occurred within a PCB component as well as within adjacent circuit card paths of the board itself. Further, the hardware and software requirements needed to capture and analyze these emissions are relatively simple in comparison to todaypsilas highly complex automatic test equipment. This unique approach involves analyzing electromagnetic emission signatures through automated means, and ascribing failures to the circuit board as a whole, as well as to the individual circuit board components.

This study analyzes laser processing of glass-based printed circuit boards which have the capability to replace conventional substrate materials when electronics are required to operate at elevated temperatures. There is significant potential for glass-based circuit boards within the field of aerospace and electric mobility. The new circuit board concept consists of thin copper-coated borosilicate glass with thicknesses ranging from 150 µm to 500 µm. Conventional mechanical processing of this new circuit boards induces stress on the thin glass which can lead to damage of the substrate. Therefore, laser processing with a picosecond laser source is suggested as a tool within the production process of the new circuit boards. Two necessary processes are investigated using a pulsed picosecond laser with a pulse duration of 7 ps at a wavelength of 515 nm. Precise drill-holes for vertical connections of multilayer boards were produced where chipping at the cutting edge must be avoided. Selective ablation of the copper coating was performed to generate the electrical circuits. The results show that a well-defined ablation process is crucial to achieve adequate electrical isolation without damaging the glass substrate. The study also underlines the huge potential of laser processing with picosecond laser sources, which have proven to be a versatile instrument to drill thin glass and generate electrical circuits by selective ablation.This study analyzes laser processing of glass-based printed circuit boards which have the capability to replace conventional substrate materials when electronics are required to operate at elevated temperatures. There is significant potential for glass-based circuit boards within the field of aerospace and electric mobility. The new circuit board concept consists of thin copper-coated borosilicate glass with thicknesses ranging from 150 µm to 500 µm. Conventional mechanical processing of this new circuit boards induces stress on the thin glass which can lead to damage of the substrate. Therefore, laser processing with a picosecond laser source is suggested as a tool within the production process of the new circuit boards. Two necessary processes are investigated using a pulsed picosecond laser with a pulse duration of 7 ps at a wavelength of 515 nm. Precise drill-holes for vertical connections of multilayer boards were produced where chipping at the cutting edge must be avoided. Selective ablation of the ...

The counterfeit parts, e.g. integrated circuits (ICs) and printed circuit boards (PCBs), have shown significant increase over the recent years. However, existing counterfeit detection techniques deal with IC or PCB separately. Hence cannot verify the authenticity of the electronic system as a whole. In this paper, we propose a novel methodology, named CIPA, which concurrently verifies the authenticity of both IC and PCB through extracting the signature pairs generated by ring oscillator (RO) array without/with PCB cavity resonance. Remote authentication is allowable by transmitting CIPA signatures between the verifier and system vendor. CIPA structure has shown insignificant area overhead (0.945% on average), when implemented on a number of benchmarks. Both CIPA and the benchmarks have been implemented on authentic and counterfeit FPGA systems, results giving 100% confidence in detecting counterfeit ones.

The rapid development of information and communication technologies has driven the rapid growth of data traffic and the large requirement of high-speed optical transceiver modules. Usually, optical subassemblies through flexible printed circuit boards (PCBs) connect with the hard PCBs to compose as optical transceiver modules. Because of the impedance mismatch of connection between flexible PCB and hard PCB, the operation bandwidth of the module can be limited. In this paper, the design of connection between flexible PCB and hard PCB in optical subassembly modules will be investigated for increasing the operation speed of the module. First, the transmission bandwidth of flexible PCB is analyzed. High-frequency performances of three transmission line structures, micro-strip line, grounded coplanar waveguide, and top ground micro-strip line, are investigated in flexible PCB. High-frequency performances of flexible PCB with different bending types are also investigated. The flexible PCB has been verified to be suitable to use in 25 Gb/s applications. Next, the high-speed transmission performance is analyzed through the connection between flexible PCB and hard PCB, because the impedance mismatch usually occurs at the connection. The ground pads are added near the signal line of flexible PCB, and the ground pads are connected to the ground layer in PCB through ground vias. The anti-pad in hard PCB is added under the signal solder pad. The dip of S21 response can be eliminated by the optimized ground pad. The impedance mismatch can be reduced by the optimized anti-pad, the impedance increases from 40-Ω to 49-Ω at the connection between flexible PCB and hard PCB, and the transmission bandwidth can increase from 16.5 GHz to 23.5 GHz. TO-46 header is a common and low-cost packaging solution for DFB laser and photodiodes. The connection between flexible PCB and TO-46 header is also investigated. While the connection has a gap, the dip of frequency response will occur at lower frequency. While the connection is very close, the bandwidth can be larger than 25 GHz. The flexible PCB, hard PCB, and TO-46 header are combined together, and the 23 GHz transmission bandwidth can be obtained. The 25 Gb/s transmission eye diagram is also measured, and the eye height, rise time, fall time, and Q-factor are 268.14 mV, 13.78 ps, 13.56 ps, and 8.76, respectively. The combined flexible PCB, hard PCB, and TO-46 header are verified to be suitable to apply in 25 Gb/s optical subassembly modules, and will be able to be used in 100G Ethernet.

A new approach to integrated circuit (IC) noise modeling using a single current source for the whole area below the IC on a printed circuit board (PCB) is proposed. This approach extends the frequency of application of similar models in the literature by focusing on the current and power injected into the region outside the IC perimeter. A new measurement equipment for IC electromagnetic compatibility tests above 1 GHz is proposed; the printed reverberation board (PRB). A statistical model for characterizing the PRB is presented and confirmed by measurement results. Limitations of the fabricated PRB prototype and possible improvements are discussed. A new random IC model that includes the random properties of the IC noise is introduced. A methodology to extract the IC model by means of the PRB is presented. An active test PCB has been designed and fabricated to verify the feasibility of the modeling and measurement methods. Measurement results corroborated the validity of the new measurement and modeling approaches on one side, and on the other side showed that further studies are required.

We evaluate the discrimination power of different graph invariants in order to identify an appropriate measurement of similarity among printed circuit boards. We show that computationally expensive algorithmic evaluation of circuit boards equivalence based on the topology of the circuit boards is unnecessary in practice. Instead, the information about the circuit boards can be stored in terms of graph invariants, namely, number sequences characterizing the boards, which requires much less memory and enables quicker recognition of board equivalence. This straightforwardly leads to fast practical implementations of the search engines for the printed circuit boards. Our approach is multidisciplinary, as the tools were drawn from two fields; the industrial electronic engineering field, and the theoretic fields of graph theory and algorithms. A real case study on a search engine for printed circuit boards is conducted to illustrate the proposed approach. Finding an easily computable and complete set of graph invariants remains a challenging mathematical question.