Three-phase SVA inverter

In this paper, a modified Lyapunov function based control strategy that assures global stability is proposed for single phase cascaded H bridge multilevel converter feeding nonlinear loads. The Lyapunov function is formed from the energy stored in the inductor and capacitor. The Lyapunov function based control strategy proposed in the literature for the single phase converter assures global stability with only output voltage and current control. But the DC link voltages of the multilevel inverter fluctuate due to the disturbances in the input and output side. Hence the Lyapunov function based control strategy is modified by including a DC link voltage control is proposed for the multilevel inverter. Detailed analysis has been conducted to verify the effectiveness of the proposed system and is compared with the conventional control strategies. A fast dynamic response and lower distortion in output voltage is obtained with the proposed strategy compared to the conventional control strategies. Simulation and experimental results from a laboratory scale prototype is demonstrated to assess the performance of the suggested control scheme.

This paper presents a direct compensation of the switching interval error by the dead-time of a PWM-VSI(Voltage Source Inerter) drives. The output voltages of the 3-phase VSI are distorted and have error by the dead-time to avoid the shoot-through of an inverter arms and the time delay of the gate drive. The voltage distortion increases a harmonic component of the output voltage and decreases the control performance. This paper presents a simple and cost-effective compensation technique to solve this problem in the 3-phase voltage source inverter using the direct switching interval compensation. The practical switching voltage interval of an inverter has error with the PWM signal of the controller due to the dead-time and the time delay of the gate drive. And this error is dependent on the current direction and makes an additional output voltage distortion. This paper analyzes the switching voltage interval error of the 3-phase voltage source inverter according to the current direction. And the compensated switching times are added to the PWM interval of the controller to compensate the output voltage distortion. With a simple detection of the current direction, the practical error of the switching interval can be compensated by the adding of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper.

This paper proposes and describes a high power factor AC-AC converter for naval applications using Permanent Magnet Generator (PMG). The three-phase output voltages of the PMG vary from 260 Vrms (220 Hz) to 380 Vrms (360 Hz), depending on load conditions. The proposed converter consists of a Y-/ΔY power transformer, which provides electrical isolation between the PMG and remaining stages, and a twelve-pulse uncontrolled rectifier stage directly connected to a single-phase inverter stage, without the use of an intermediary DC-DC topology. This proposal results in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and low total harmonic distortion for the input currents of the converter. The single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120 Vrms, 60 Hz output. The control philosophy, implemented in a digital signal processor (DSP) which also contains protection routines, alows series connections between two identical converters, achieving 240 Vrms, 60 Hz total output voltage. Measured total harmonic distortion for the AC output voltage is lower than 2% and the input power factor is 0.93 at 3.6kW nominal load. © 2010 IEEE.

Multilevel converters in FACTS and distributed generation system are very promising area for academic researchers and industry interest. Here two different modulation schemes of 3-level Neutral point clamped inverter are proposed and presented. The inherent neutral point potential unbalance issues and balancing methods for LS-PWM and SVM techniques are analyzed in detail. Total Harmonic Distortion in output voltage and current is used as the performance indicator for the inverter. It can be concluded that LS-PWM has higher harmonic distortions and high losses when compared to SVM. SVM technique also is excellent in DC bus voltage balancing. The experimental results for a 1.5kW prototype validate the simulation and theoretical results.

This paper proposes a multiphase converter topology with an innovative PWM strategy for the control of a PM synchronous motor with segmented stator windings to operate as an electronic geared motor. Simulation studies of the segmented PMSM with configurable stator windings have been carried out. Compared with conventional three-phase inverter topology, the proposed converter topology with associated PWM modulation strategy has advantages of reduced conduction loss, improved efficiency under light load condition, and expanded torque-speed operating ranges with a same dc-link voltage. The interleaved PWM strategy provides advantages of ripple current reduction and conduction losses reduction. Simulation results have been given to show advantages and flexibility of the proposed multi-phase PWM control scheme for a PMSM with segmented windings.

The Doubly Fed Induction Motor (DFIM) is essential in Wind Energy Conversion Systems (WECS) for efficient wind energy harvesting. Conventional power converters in WECS often result in high Total Harmonic Distortion (THD) in output voltage and current, affecting wind energy economy. This research proposes replacing conventional converters with Modular Multi-level Converters (MMC) due to their scalable topology, low harmonic distortion, high efficiency, and the elimination of DC link capacitors. The MMC is connected in a back-to-back configuration between the rotor of the DFIM and the grid to enable four-quadrant operation. Circulating current in the MMC is minimized using a Modified Deer Hunting Optimization (MDHO) based Fractional Order PID (FOPID) controller and a Mexican Axolotl Optimization (MAO) based FOPID. Capacitor voltage balancing is achieved using Level-Shifting PWM (LSPWM) and Three-Dimensional Space Vector PWM (3D-SVPWM) techniques with voltage sorting algorithms. The impact of these control and modulation techniques on the DFIM is analyzed in terms of reduced THD, and steady state and transient performance. Simulations are conducted in MATLAB/R2022a, and experimental validation is performed using a 7-level 0.5 kW MMC in a Hardware-In-Loop (HIL) setup.

This paper describes the design and development of a high input power-factor (HPF) AC to AC converter for naval applications using Permanent Magnet Generator (PMG). The proposed converter comprises an isolated three-phase uncontrolled multipulse rectification stage directly connected to a single-phase inverter stage, without the use of DC to DC intermediary stage, resulting in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and input currents with low total harmonic distortion (THD). The output voltage of the PMG varies from 260V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> (220 Hz) to 380V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> (360 Hz), depending on load conditions. The output single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> , 60 Hz output. Measured total harmonic distortion for the AC output voltage represents less than 2%, at 3.6kW nominal linear load.

This paper presents a modified design of Single phase seven level inverter with reduced number of switches when compared to conventional multi level inverters like Neutral point clamped, Flying capacitor and cascaded. The advantage of proposed topology is having less number of components in terms of MOSFETS, gate driver circuits, compact design, short length connecting wires, less space, size, weight and cost, Thereby decreasing the switching losses, heat losses, copper losses to achieve better conversion efficiency and improved total harmonic distortion of the multilevel Inverter with different over modulation PWM techniques to control the power quality at load side. The results of proposed system with output voltage, current performances and Total Harmonic Distortions (THDs) are compared with conventional PWM technique in simulink environment.

The objective of this paper is analysis of output voltage distortion of a PWM inverter with LC filter caused by device voltage drop. The goal of this study is to find out how to compensate the output voltage distortion of PWM inverter caused by device voltage drop to realize precise output voltage. The output voltage distortion is mainly caused by dead time and device voltage drop. There are a lot of studies about distortion is mainly caused by dead time[2]. There are, however, only few studies about device voltage drop, especially considering LC filter effect. In this paper, the authors theoretically derived the output voltage distortion of PWM inverter with LC filter caused by device voltage drop in order to estimate the distortion caused by drop in advance. The distortion was analyzed from the view point of frequency analysis and Total Harmonic Distortion(THD). These results may allow appropriate design of PWM inverter with output voltage compensation. Theoretical analysis was verified through simulations and experiments. In addition, a simple method for compensation of device voltage drop proposed. The proposed method was verified through simulation.

In order to meet the high performance and efficiency requirements, a new space vector-based discontinuous modulation strategy for neutral-point clamped three-level inverter is presented in this paper. Different from the conventional discontinuous PWM (DPWM) strategies, a new clamping state is applied to synthesize the reference voltage under the condition of low modulation index. The rms value of output current ripple for different clamping states are calculated, and then the distribution of the new clamping state and the other two clamping states adopted in conventional DPWMs is optimized based on the calculation results. The switching sequences are redesigned according to the new distribution of the three clamping states. The output voltage and current, switching loss, neutral-point voltage ripple and the common mode voltage of the proposed DPWM strategy and DPWM0–DPWM3 are compared by simulation and experimental results. The results show that by the use of the proposed strategy, the values of total demand distortion of output current ( I TDD) and weighted total harmonic distortion of output voltage $({\boldsymbol{V}_{{\mathbf{WTHD}}}})$ are the lowest. Furthermore, the product of switching loss and $I_{\rm TDD}$ of the proposed strategy maintains the lowest within a large range of modulation index-load angle plane. It can be concluded that the utilization of the new clamping state and optimal distribution of different clamping states could enhance the output performance of the inverter. Moreover, the high-efficiency requirement can also be realized at the same time.

Modular multilevel converters (MMC) are used in the applications such as medium voltage multi-megawatt drives and in HVDC power transmission. The converter has several sub-modules connected in series that are switched appropriately to regulate the pole voltage. Besides regulation of output voltage, it is also essential to regulate the individual sub-module capacitor voltages. In this paper, a novel modulation scheme for an MMC converter based on carrier phase shifted PWM is proposed. The proposed modulation scheme balances the sub-module capacitor voltages without distortions in output voltage. The scheme combines the best features of the two well-known modulation approaches, namely, carrier-based modulation approach and sub-module insertion approach. Real-time simulation results modeling a single leg MMC converter using a Typhoon HIL system are presented to validate the performance of the proposed modulation scheme.

Recently, great attention has been addressed for multilevel inverters, as they exhibit low total harmonic distortion (THD) in the output voltage and low electromagnetic interference (EMI). This paper proposes a single-phase five-level pulse width modulation (PWM) inverter for grid connection. The proposed PWM technique has some switches operated at fundamental line frequency and the others operate at inverter switching frequency. The proposed inverter has advantages of less number of components and low THD compared with the conventional multilevel inverter. The inverter operational principles and the switching functions are analyzed in this paper. Moreover, a proportional integral (PI) current control algorithm is designed and implemented in DSPACE DS1103 to keep the current injected into the grid sinusoidal and in-phase with the grid voltage for unity power factor. Simulation and experimental results prove the powerful merits of the proposed multi-level inverter and the capabilities of the proposed PWM technique.

A novel multilevel DC-AC inverter is proposed in this paper. A seven level AC output voltage is generated using the proposed multilevel with the befitting gate signals design. The total harmonic distortion in the sinusoidal output voltage reduced using low pass filter. With the suggested multi-level inverter the switching losses and the voltage stress of power devices can be reduced. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory model of multilevel inverter with 400 V input voltage and output 220 V rms / 2kW is enforced. 16F877A PIC microcontroller is used to control the multilevel inverter with sinusoidal pulse-width modulation (SPWM).

Based on classical impedance source inverter concept, this paper presents a modified impedance source inverter controlled by different pulse width modulation control strategies for solar PV/battery-powered applications. A brief topology analysis, generalized discussion and design of impedance network elements are presented. Comparison with the classical impedance source inverter is presented. Using simulation, analytical results are presented that ensure stability. The proposed voltage type inverter has reduced inrush current at startup, less capacitor voltage stress and minimum inductor current ripples. DC link voltage boost, reduced total harmonic distortion of output current and voltage, better voltage gain and wide range of output voltage control can be achieved easily with improved power quality. Experimental set-up of the modified impedance source inverter with Field Programmable Gate Array (FPGA) controller has been constructed to ascertain the results.

Neutral point clamped (NPC) inverter faces the problem of fluctuating neutral-point potential (NPP), which leads to severe problems like increase in total harmonics distortion (THD) of output voltage and increase in voltage stress of the power semiconductor switches. This paper is focused on hybrid techniques used for reducing fluctuations in NPP by means of balancing the voltage across dc-link capacitors. A technique of providing offset in carrier waves using phase disposition pulse width modulation (PDPWM) is proposed to ensure the voltage balancing. The drawback of this scheme is it does not work satisfactorily for four-level and five-level mode of operations of the inverter. It works as intended up to three-level operation. Other approach to achieve the task is based on carrier less PWM technique. In this technique, the redundancy of switching states in voltage state phasor diagram is used. The limitation of this technique is that it provides dc-link balancing up to modulation index 0.5 due to its inherent characteristics. To provide dc-link voltage balancing above 0.5 modulation index, external hardware is required. Using hybrid combination of bidirectional buck-boost chopper and SVPWM scheme, the dc-link voltage balancing for the entire range of operation of inverter is obtained. MATLAB simulation of this technique is carried out on three-phase, 50 Hz, 4 pole, 400 V squirrel cage induction motor. For experimental verification of the proposed technique, three-phase five-level NPC inverter is used with three-phase star connected 100 Ω resistors.