Transform coefficient coding in HEVC

The joint collaborative team on video coding (JCT-VC) is developing the next-generation video coding standard which is called high efficiency video coding (HEVC). In the HEVC, there are three units in block structure: coding unit (CU), prediction unit (PU), and transform unit (TU). The CU is the basic unit of region splitting like macroblock (MB). Each CU performs recursive splitting into four blocks with equal size, starting from the tree block. In this paper, we propose a fast CU depth decision algorithm for HEVC technology to reduce its computational complexity. In2N×2N PU, the proposed method compares the rate-distortion (RD) cost and determines the depth using the compared information. Moreover, in order to speed up the encoding time, the efficient merge SKIP detection method is developed additionally based on the contextual mode information of neighboring CUs. Experimental result shows that the proposed algorithm achieves the average time-saving factor of 44.84% in the random access (RA) at Main profile configuration with the HEVC test model (HM) 10.0 reference software. Compared to HM 10.0 encoder, a small BD-bitrate loss of 0.17% is also observed without significant loss of image quality.

High Efficiency Video Coding (HEVC), the latest video coding standard, aims to provide coding performance that is much superior to that of its predecessor, H.264, especially for high definition video. To fulfill this goal, the inter-prediction unit (PU) partitions of HEVC are more complex, and the search range of motion estimation (ME) is much larger. As a result, ME becomes a bottleneck in the design of the HEVC inter predictor. In response to this challenge, we developed a hardware-oriented integer ME algorithm and the related hardware implementation. Our proposed algorithm led to a decrease in terms of the Bjontegaard Delta rate when compared with the HEVC test model 15.0. The corresponding hardware solution benefitted from 2-D data reuse supported by horizontal and vertical reference SRAMs, on-chip memory reduction supported by $4\times4$ block compression, and a low-power sum of absolute difference (SAD) tree supported by PU-level chip selection. When adopting a $32\times32$ SAD tree, the minimum and maximum required working frequency for 4K $\times2\text{K}$ at 30 frames/s videos was [375, 500] MHz. These results demonstrated that our proposed solution offered desirable improvement in both coding speed and coding performance.

The emerging standard of High Efficiency Video Coding (HEVC) provides a 50% improved compression performance compared to its predecessor H.264/AVC at the expense of increasing its computational complexity which is due to a large number of modes involved in the decision process where it would increase encoding time and provide hardware limitations. In this paper, the reduction of intra-coding complexity is proposed by utilization of Rate-Distortion Optimization (RDO) in preselecting a mode with the best RD cost, among all 35 intra-modes. Two cost functions – Sum of Absolute Difference (SAD) and Sum of Absolute Transform Difference (SATD, available in the HEVC Test Model (HM) Reference Software, are determined by making encoder decisions. This paper compares the performance and complexity cost of SAD only for intra-mode, with SATD-based intra-mode by modifying the HM reference encoder through forced selection of the mentioned modes. Results show that SAD consistently produces the least encoding time among all modes, along with sensible values of bitrate. Furthermore, error concealment was introduced in decoding the video sequences with the use of IEEE 802.22 Standard which only allowed power gains resulting to packet error rates (PER) ranging from 1% to 30% for the analysis on the behavior of each video sequence in an environment where error is introduced.

Although high efficiency video coding (HEVC) has achieved high coding performance, it has been shown that dependent rate-distortion optimization (RDO) can still further improve the coding performance at the encoder side. Inspired by our previous work on temporal-dependent RDO, this paper proposes a rate control method at coding tree unit (CTU) level to obtain both higher rate-distortion (R-D) performance and lower bitrate errors. We first formulate the global optimization problem in hybrid video coding and present a general solution framework based on a weighted Lagrange multiplier, where the weighted coefficient is related to the strength of temporal dependency among coding units, and a propagation factor is introduced for quantitative measurement of the temporal dependency. Second, an estimation method of CTU level R-D model is proposed to characterize R-D relationship more accurately. Finally, under the constraint of frame level bit budget, a formulation combining inter-block dependency and R-D characteristic is developed for optimal bit allocation at the CTU level. In the process of encoding a frame, a relaxed constraint algorithm (RCA) and a strict constraint algorithm (SCA) are employed to reduce the difference between numbers of actual and target bits for the current frame, respectively. Experimental results demonstrate that, on the HEVC test model (HM-16.7), our methods including RCA and SCA achieve considerable R-D performance improvement with lower bitrate errors, outperforming the state-of-the-art schemes. It is worth mentioning that even compared with HEVC without rate control, the RCA can still achieve bitrate savings of 5.4% and 5.1% on average under configurations of low delay P and B frames, respectively.

HEVC (high efficiency video coding), as the latest video coding standard, is more efficient than H.264/AVC, nevertheless it also brings in a very high computational complexity. To reduce the time of CU (coding unit) splitting or PU (prediction unit) mode deciding, a fast algorithm based on ANN (artificial neural network) and texture analysis is proposed in this paper. First, we acquire and then label the CUs of the training set with “split” and “unsplit” according to the quad-tree CU depth. Second, the texture features of “split” and “unsplit” CUs are quantified and compiled, based on which we can set the texture thresholds to judge whether or not to split the current CU or which prediction mode should be taken preliminarily. Finally, in terms of the CUs we can't judge from texture, we use ANN or the original algorithm of HM (HEVC test model) software to decide. Compared to HM15.0, the proposed algorithm can save 51.85% encoding time on average with negligible coding efficiency loss.

本文提出了一种HEVC视频编码的运动估计快速算法，该算法可以显著加速搜索过程，编码效率与HEVC参考软件(Test Model)中的Test Zone Search (TZSearch)平分秋色。较之H.264/AVC视频标准，HEVC引入了更为复杂的混合编码框架和更大尺寸的搜索窗口，从而带来了更高的计算复杂度。为了降低复杂度，我们提出了一种新的运动估计算法，该算法仅利用搜索窗中所选取的少量几个点建立二次曲面模型，通过对像素的绝对差值和(SAD)分布的迭代分析，逐步缩小搜索范围，直到得出最优的运动矢量。该算法可被用于不同的编码环境中，实验结果表明，与HM相比，该算法可以节约大约40%的运动估计算法时间，仅引起轻微的性能损失。 This paper presents a motion estimation (ME) algorithm for High Efficiency Video Coding (HEVC), which provides a strategy to speed up the search process significantly, while yielding the same quality performance as the Test Zone Search (TZSearch) scheme in HEVC Test Model (HM). Compared with the H.264/AVC, HEVC employs a more complex hybrid coding architecture and a larger size search window, leading to great computational complexity. In order to reduce the complexity, a novel motion estimation algorithm is proposed, in which some limited pixels of certain position in the current search window are utilized to build a quadratic model, and then shrink the search range repeatedly by analyzing the sum of absolute difference (SAD) distribution until the best motion vector (MV) is obtained. The proposed algorithm can be applied to various encoding conditions. Experimental results show that our method can save 40% of computations compared with the HM, with negligible decrease of coding quality.

The growing popularity of high resolution video and the continuously increasing demands for high quality video on mobile devices are producing stronger needs for more efficient video encoder. Concerning these desires, HEVC, a newest video coding standard, has been developed by a joint team formed by ISO/IEO MPEG and ITU/T VCEG. Its design goal is to achieve a 50% compression gain over its predecessor H.264 with an equal or even higher perceptual video quality. Motion Estimation (ME) being as one of the most critical module in video coding contributes almost 50%-70% of computational complexity in the video encoder. This high consumption of the computational resources puts a limit on the performance of encoders, especially for full HD or ultra HD videos, in terms of coding speed, bit-rate and video quality. Thus the major part of this work concentrates on the computational complexity reduction and improvement of timing performance of motion estimation algorithms for HEVC standard. First, a new strategy to calculate the SAD (Sum of Absolute Difference) for motion estimation is designed based on the statistics on property of pixel data of video sequences. This statistics demonstrates the size relationship between the sum of two sets of pixels has a determined connection with the distribution of the size relationship between individual pixels from the two sets. Taking the advantage of this observation, only a small proportion of pixels is necessary to be involved in the SAD calculation. Simulations show that the amount of computations required in the full search algorithm is reduced by about 58% on average and up to 70% in the best case. Secondly, from the scope of parallelization an enhanced TZ search for HEVC is proposed using novel schemes of multiple MVPs (motion vector predictor) and shared MVP. Specifically, resorting to multiple MVPs the initial search process is performed in parallel at multiple search centers, and the ME processing engine for PUs within one CU are parallelized based on the MVP sharing scheme on CU (coding unit) level. Moreover, the SAD module for ME engine is also parallelly implemented for PU size of 32×32. Experiments indicate it achieves an appreciable improvement on the throughput and coding efficiency of the HEVC video encoder. In addition, the other part of this thesis is contributed to the VLSI architecture design for finding the first W maximum/minimum values targeting towards high speed and low hardware cost. The architecture based on the novel bit-wise AND scheme has only half of the area of the best reference solution and its critical path delay is comparable with other implementations. While the FPCG (full parallel comparison grid) architecture, which utilizes the optimized comparator-based structure, achieves 3.6 times faster on average on the speed and even 5.2 times faster at best comparing with the reference architectures. Finally the architecture using the partial sorting strategy reaches a good balance on the timing performance and area, which has a slightly lower or comparable speed with FPCG architecture and a acceptable hardware cost

In this paper, we present a pixel-wise unified rate quantization (R-Q) model for a low-complexity rate control on configurable coding units of high efficiency video coding (HEVC). In the case of HEVC, which employs hierarchical coding block structure, multiple R-Q models can be employed for the various block sizes. However, we found that the ratios of distortions over bits for all the blocks are a nearly constant because of employment of the rate distortion optimization technique. Hence, one relationship model between rate and quantization can be derived from the characteristic of similar ratios of distortions over bits regardless of block sizes. Thus, we propose the pixel-wise unified R-Q model for HEVC rate control working on the multi-level for all block sizes. We employ a simple leaky bucket model for bit control. The rate control based on the proposed pixel-wise unified R-Q model is implemented on HEVC test model 6.1 (HM6.1). According to the evaluation for the proposed rate control, the average matching percentage to target bitrates is 99.47% and the average PSNR degradation is 0.76 dB. Based on the comparative study, we found that the proposed rate control shows low bit fluctuation and good RD performance, compared to R-lambda rate control for long sequences.

The High Efficiency Video Coding (HEVC) utilizes Z-scan order to process coding units (CUs). For intra prediction, this order cannot fully exploit the spatial correlation between adjacent CUs. After transform and quantization, the residue still contains lots of energy along edges which consumes many bits for compression. To effectively reduce the residue energy along edges, a novel intra prediction approach is proposed, where the CU processing order is changed adaptively. Two additional orders are introduced in this paper besides traditional Z-scan order. Up to 1.9% bit saving is achieved in our experiments on HEVC test model. We also propose two fast order selection algorithms and the observed gains are obtained with 27% and 2% encoding time increase compared to HEVC, respectively.

Video surveillance and its applications have become increasingly ubiquitous in modern daily life. In video surveillance system, video coding as a critical enabling technology determines the effective transmission and storage of surveillance videos. In order to meet the real-time or time-critical transmission requirements of video surveillance systems, the low-delay (LD) configuration of the advanced high efficiency video coding (HEVC) standard is usually used to encode surveillance videos. The coding efficiency of the LD configuration is closely related to the quantization parameter (QP) cascading technique which selects or determines the QPs for encoding. However, the quantization parameter cascading (QPC) technique currently adopted for the LD configuration in HEVC test model (i.e., HM) is not optimized since it has not taken full account of the reference dependency in coding. In this paper, an efficient QPC technique for surveillance video coding, referred to as QPC-SV, is proposed, considering all inter reference frames under the LD configuration. Experimental results demonstrate the efficacy of the proposed QPC-SV. Compared with the default configuration of QPC in the HM, the QPC-SV achieves significant rate-distortion performance gain with average BD-rates of -9.35% and -9.76% for the LDP and LDB configurations, respectively.

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The recent video compression standard, HEVC (high efficiency video coding), will most likely be used in various applications in the near future. However, the encoding process is far too slow for real-time applications. At the same time, computing capabilities of GPUs (graphics processing units) have become more powerful in these days. In this paper, we have proposed a GPU-based parallel motion estimation (ME) algorithm to enhance the performance of an HEVC encoder. A frame is partitioned into two subframes for pipelined execution to improve GPU utilization. The flow chart is redetermined to solve data hazards in the pipelined execution. Two new methods are introduced in the proposed ME: decision of a representative search center position (RSCP) and warp-based concurrent parallel reduction (WCPR). A RSCP employs motion vectors of a co-located CTU in a previously encoded frame to solve a dependency problem in parallel computation with negligible coding loss. WCPR concurrently executes several parallel reduction operations, which increases the thread utilization from 20 to 89 % without any thread synchronization. The proposed encoder can make the portion of ME in the encoder negligible with 2.2 % bitrate increase against the HEVC test model (HM) encoder. In terms of ME, the proposed ME is 130.7 times faster than that of the HM encoder.

Currently, most video resources on line are encoded in the H.264/AVC format. More fluent video transmission can be obtained if these resources are encoded in the newest international video coding standard: high efficiency video coding (HEVC). In order to improve the video transmission and storage on line, a transcoding method from H.264/AVC to HEVC is proposed. In this transcoding algorithm, the coding information of intraprediction, interprediction, and motion vector (MV) in H.264/AVC video stream are used to accelerate the coding in HEVC. It is found through experiments that the region of interprediction in HEVC overlaps that in H.264/AVC. Therefore, the intraprediction for the region in HEVC, which is interpredicted in H.264/AVC, can be skipped to reduce coding complexity. Several macroblocks in H.264/AVC are combined into one PU in HEVC when the MV difference between two of the macroblocks in H.264/AVC is lower than a threshold. This method selects only one coding unit depth and one prediction unit (PU) mode to reduce the coding complexity. An MV interpolation method of combined PU in HEVC is proposed according to the areas and distances between the center of one macroblock in H.264/AVC and that of the PU in HEVC. The predicted MV accelerates the motion estimation for HEVC coding. The simulation results show that our proposed algorithm achieves significant coding time reduction with a little loss in bitrates distortion rate, compared to the existing transcoding algorithms and normal HEVC coding.

In recent years,with the development of video coding technology and the increasing popularity of high definition(HD)video content,the ISO/IEC Moving Picture Experts Group(MPEG)and the ITU-T Video Coding Experts Group(VCEG)formed the joint collaborative team on video coding(JCV-VC)in 2010which aims to develop the next-generation video coding standard for HD video application,called High Efficiency Video Coding(HEVC).So far the test model HM has been used for performance evaluation and algorithm test.The final international standard of HEVC has been completed and published in the end of 2012based on the working plan of JCV-VC.In this paper,the key technologies about HEVC will be surveyed,specifically including the quad-tree structure of coding unit,prediction unit and transform unit,the advanced motion vector prediction and merging technology,angular intra prediction,DCT-based fractional pixel interpolation filter and context adaptive arithmetic coding etc.Finally the coding performance of some coding tools and complexity of HEVC are analyzed in detail.

The latest video coding standard High Efficiency Video Coding (HEVC) is developed by Joint Collaborative Team on Video Coding(JCTVC). HEVC can achieve better compression performance than any other coding standards, which adopts the quadtree structured coding tree unit (CTU). In encoding process, the CTU is recursively split into four equally sized coding unit (CU)s. Along with the multiple sizes of the CUs, the number of prediction unit(PU) modes has been largely increased, which raises the computational complexity in HEVC encoder greatly. In this paper, a fast inter mode decision algorithm based on motion estimation (ME) and texture feature is proposed to speed up the PU mode decision in HEVC encoder. Experimental results demonstrate that the overall algorithm that is proposed can save 41% encoding time on average while the decrease of coding quality is negligible, when compared to that of the HM10.0 reference software.