Ultra high speed wireless communication with low complexity transceiver

Parallel sequence spread spectrum (PSSS) is a versatile spreading technique suitable for high-speed wireless communication. We are aiming for transmission rates up to 100 Gbps in the terahertz frequency band. Here, we propose a novel transmitter architecture comprising of 15 parallel PSSS encoders used in conjunction with a high-speed analog multiplexer (MUX) and DACs. In our design, PSSS encoders (with 4 bit/sIHz spectral efficiency) and DACs operate a low symbol frequency of 1.67 GHz wherein the analog MUX runs at a chip rate of 30 GHz to achieve 100 Gbps. Our scheme is based on a parallel PSSS encoding of the input signal using an analog MUX to process the parallel output results. To demonstrate the potential of a parallel PSSS encoding, we verified the transmitter architecture on Virtex ultrascale FPGA (VCD108) and implemented the design on GlobalFoundries 28 nm FDSOI technology, showing a PSSS symbol rate of 1.785 GHz to achieve above 100 Gbps. The transmitter design of 15 parallel encoders occupies a chip area of 0.0073 mm2with a power consumption of 20.882 mW and has an energy efficiency of 0.21 p.j/bit

This paper is to study a Distributed Static Compensator (D-STATCOM) for voltage sag mitigation using a low-cost microcontroller in hardware in the loop (HIL) application. A framework of HIL-Matlab-Simulink simulation is developed using Raspberry Pi (RPi) and Arduino with a combination of Proportional Integral (PI) control for mitigating the voltage sag due to sudden change of load. The simulation results are presented in both offline and online modes. During the offline mode, the D-STATCOM is able to correct the voltage sag from 0.7 (p.u) to 1.0 (p.u) when the fault happens by injecting the current using the PI control strategy. As for online modes using the HIL platform, the voltage sag has also been mitigated with less response on the time response due to low bit design in the HIL, which currently is about a 3-bit model. In the meantime, the HIL system can be developed using a low-cost microcontroller as a learning process to the researchers before actual HIL is applied, which required more complicated signal processing configurations.

A photovoltaic generation is becoming popular as a result that a terrestrial environment problem has been property understood. The PV modules are installed on a roof of private residence, or on an outer wall of building. The latter often causes a ghost in the TV picture due to the electromagnetic reflection at the wall. This affect to an ultra high speed wireless communication seriously as well. This paper proposes a novel PV module absorbing the electromagnetic wave in order to cope with both the PV generation and the reduction of electromagnetic reflection. The usefulness of our proposed PV module is confirmed experimentally.

While current reliable and ultra low latency industrial communication is based on wired fieldbus systems, wireless communication is the key to enable future industrial applications. However, the reliability of state-of-the-art wireless technologies is not sufficient for many industrial application scenarios. Thus, novel wireless approaches are being investigated at the moment, from which three promising physical layer (PHY) technologies are depicted for detailed evaluation in this paper: Ultra Wide Band (UWB), Frequency Hopping Spread Spectrum (FHSS) and Parallel Sequence Spread Spectrum (PSSS). In order to assess each system’s performance, Key Performance Indicators (KPI) are derived from industrial application constraints. In this paper, industrial applications are therefore categorized by vital requirements such as spatial extent, number of nodes, cycle time, PER and user data length. The depicted technologies are evaluated regarding the KPIs error rate and coverage range in AWGN and industrial fading channel conditions.

Multiple Input Multiple Output (MIMO) low complexity receiver which utilizes the compressive sensing detection for Spatial Modulation in large scale MIMO system in order to reduce the system complexity. In conventional MIMO system; huge amount of antennas is used at both ends to exploit the multipath propagation. This system maximizes the throughput performance and data rates are increased but only at the cost of high hardware complexity and increased power-consumption. Spatial Modulation Matching Pursuit (SMMP) is the proposed enhanced CS technique used for the improvement of detection performance. Hence, this paper reviews recent research findings concerning normalized Compressive Sensing (CS) detection algorithm, used for Spatial Modulation (SM) in massive MIMO, to lowers the signal processing complexity, which in result improves the energy efficiency of system against that of conventional MIMO system.This strategy is achieved by involving additional structures and sparsity in which a single transmitter antenna or a subset of it is turned on at each case to transmit a certain data. The subset of antenna which is turned on for transmission depends on approaching data bits. Therefore, the total increase in the spectral efficiency of the system is given as base-two logarithm of whole antennas at the transmitter. It reduces the signal processing load at base station and doesn’t depend upon any synchronization between transmitters. The Spatial Modulation Matching Pursuit used prevents the Inter Channel Interference (ICI) of the system which in result improves the Bit Error Rate (BER) performance than the typical MIMO system.

This paper presents an implementation methodology for a current harmonic compensation technique of three-phase grid-connected voltage-source converter (VSC), which was applied under the grid voltage distortion and frequency variation. The proportional-integral plus multi-resonant controllers (PIMR) were used to mitigate the high order harmonic current. The PIMR controller was transformed to the discrete-time domain and implemented on a TMS320F28379D digital signal processor. The proposed control scheme was validated with a hardware in the loop (HiL) and with a 5 kW three-phase LCL-filtered grid-connected VSC. The harmonic compensators were used in the dq-frame at harmonic orders 6 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> and 12 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> for suppression of the grid voltage harmonic orders 5 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> , 7 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> , 11 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> , and 13 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> . Results from MATLAB/Simulink simulation and experiments with HiL and hardware implementations were found to be in close agreement. The experimental grid current exhibited excellent harmonic rejection with a total harmonic distortion close to 1% and complied with the IEEE 1547 standard. The grid current can tracked the reference command with a fast dynamic response.

Testing battery pack configurations for their performance under different dynamic load profiles for grid and electric vehicle applications is expensive. Lowering the cost to understand the response of packs and their control strategies is critical. Power hardware in the loop (PHIL) simulation is widely used in power engineering for system and component testing. A simulator computes the model output in real-time, and then controls a power source to generate a dynamic power output with the expected current and voltage response of the emulated battery pack. This emulated battery pack power output can be coupled to a physical load to perform testing.1 Small time steps are useful to observe the transient response of the emulated battery when there is a sudden change in the load. PHIL simulations can also be useful to study the transient response of controllers and inverters present in the battery management system by connecting these devices to the simulator. PHIL simulations can be used to test the model’s accuracy2, to conduct repeatability experiments and to test battery performance under extreme conditions without compromising on safety.3 It provides an efficient approach to designing and testing new configurations of batteries from data of a single cell without building their real prototypes. The computational speed required to solve the battery models chosen for PHIL simulations must be fast in order to achieve real-time implementation. Therefore, models chosen for these simulations tend to have less complexity. However, to provide a better understanding of a battery’s response under a specific load profile, it is necessary to use a model that that accurately represents the behavior of a real battery. Real-time simulations for physics-based battery models have been explored in the past.4 , 5 , 6 It is also essential to comprehend how different battery architectures and how aging affects the overall performance. In literature, equivalent circuit models that describe charge transfer and diffusion dynamics have been used as the main way to capture battery dynamics.7 , 8 We first show results generated using SIMULINK equivalent circuit models that are compiled to run fast on our Opal-RT real-time simulator. The Opal-RT simulator drives an AMETEK 40 kW power supply with feedback to the model, enabling an emulated battery pack response capable of 10ms dynamic control. We evaluate pack configurations with physical parameters that correspond to either LCO or NMC 18650 cells. Overall, this represents a 400V, 10kW pack. A programmable load is used to modulate the emulated battery pack and monitor its dynamic response. We further explore implementing single particle models with our PHIL simulations to help understand the internal dynamics of the cell captured by these models. Physics-based models have rarely been used for PHIL. Our results show that the PHIL emulation of the battery pack meets the expectations for the battery dynamics. However, we observe high frequency noise in the output signal of the emulated battery pack. Because this level of noise is not a trait present in real battery packs, we are exploring signal processing methods to filter and remove it, while retaining the essential dynamics of the emulated battery pack. References A. Viehweider, G. Lauss, and L. Felix, Simul. Model. Pract. Theory, 19, 1699–1708 (2011).Y. He, W. Liu, and B. J. Koch, J. Power Sources, 195, 2969–2974 (2010).H. Dai, X. Zhang, X. Wei, Z. Sun, J. Wang, and F. Hu, Electr. Power Energy Syst., 52, 174–184 (2013).P. W. C. Northrop, V. Ramadesigan, S. De, and V. R. Subramanian, J. Electrochem. Soc., 158, A1461 (2011).V. R. Subramanian, V. Boovaragavan, V. Ramadesigan, and M. Arabandi, J. Electrochem. Soc., 156, A260 (2009).P. W. C. Northrop, V. Suthar, Bharatkumar Ramadesigan, S. Santhanagopalan, R. D. Braatz, and V. R. Subramanian, J. Electrochem. Soc., 161, E3149 (2014).J. V. Barreras, C. Fleischer, A. E. Christensen, M. Swierczynski, E. Schaltz, S. J. Andreasen, and D. U. Sauer, IEEE Trans. Ind. Appl., 52, 5086–5099 (2016).H. Song, T. Kim, J. Jeong, B. Kim, D. Shin, B. Lee, and H. Heo, IET Power Electron., 6, 417–424 (2013).

In the search for new physics, the Large Hadron Collider at CERN will be upgraded around year 2025, increasing its integrated luminosity by an order of magnitude. For the Inner Tracker (ITk) of the ATLAS experiment, the elevated levels of radiation, pile-up and data rate will require a complete replacement. Active pixel sensors built in sub-micron High Voltage CMOS (HV-CMOS) processes are candidates for the ITk outer pixel detector layers. Being high voltage tolerant, thus supporting drift-based charge collection, they allow to build radiation hard detectors in industry standard technology. On-sensor signal processing permits replacing complex and cost-intensive hybridisation techniques by simpler ones, ultimately leading to fully monolithic devices. In this thesis, sensors built in the ams H18 180nm process were investigated as hybrid detectors. Several design versions were characterised in laboratory and in-beam measurements. The FE-I4 Telescope, a particle tracker for beam based detector characterisation was built to facilitate measurements on HV-CMOS sensors. Its construction and performance as well as the findings on detection performance of the HV-CMOS prototypes, especially after irradiation, are presented.

Future communication system requires large bandwidths to achieve high data rates, thus rendering analog-to-digital conversion (ADC) a bottleneck due to its high power consumption. In this paper, we consider monobit receivers for QPSK. The optimal monobit receiver under Nyquist sampling is obtained and its performance is analyzed. Then, a suboptimal but low-complexity receiver is proposed. The effect of imbalances between In-phase (I) and Quadrature (Q) branches is carefully examined. To combat the performance loss due to IQ imbalances, monobit receivers based on double training sequences and eight-sector phase quantization are proposed. Numerical simulations show that the low-complexity suboptimal receiver suffers 3dB signal-to-noise-ratio (SNR) loss in additive white Gaussian noise (AWGN) channels and only 1dB SNR loss in multipath channels compared with matched-filter monobit receiver with perfect channel state information (CSI). It is further demonstrated that the amplitude imbalance has essentially no effect on monobit receivers. In AWGN channels, receivers based on double training sequences can efficiently compensate for the SNR loss without complexity increase, while receivers with eight-sector phase quantization can almost completely eliminate the SNR loss caused by IQ imbalances. In dense multipath channels, the effect of imbalances on monobit receivers is slight.

The AVL E-STORAGE BTE is a high-voltage power supply which is designed for characterization and verification of electric driveline components in the automotive, off-highway, marine and aviation industries. It is able to provide a voltage-range from 8V to 800V with a power output up to 250kW. Due to its dynamic performance an ultra-high speed, ultra-low latency Hardware-in-the-loop (HIL) real-time emulator for Power Electronics is needed. In our HIL setup, HIL602, a field-programmable gate array (FPGA) based system is used to emulate power electronics and interact with the Power Controller Unit (PCU) as well as the Programmable Logic Controller (PLC). The PLC handles information from user commands, controls digital inputs/outputs and executes a state machine, whereas the PCU contains controller boards for interaction with the mains rectifier (MR) and step-down converter (STDC). The AVL E-Storage power electronics model is built, compiled and simulated using its mathematical representation in HIL software, where the analog/digital I/Os are controlled. Automating the HIL testing is crucial because it helps to reduce costs, to detect possible errors in the early development stage and it provides a real-time fault-tolerant operation. This paper presents an approach to test the functionality of E-Storage Battery Tester & Emulator (BTE) System's PCU- and PLC-Software in automated tests.

Getting higher data rates always remains a challenging task and so is in the fifth generation which may launch in 2021 to get seamless connectivity with ultra high speed and extremely low latency less than two milliseconds to connect mobile devices along with other physical devices which is about to cross the figure of nine billion over the globe. It is highly essential to get extremely higher data rates to taste the fruits of different kinds of services on the mobile handset using technologies like LTE Advanced Pro, Carrier aggregation scheme, and 5G NR. Carrier aggregation will be one of the better solutions along with massive mimo at the base station to achieve peak data rates and faster throughput per user. With 5G carrier aggregation, we have 700 MHz bandwidth using millimeter-wave frequency range which is much higher compared to 100MHz of LTE advanced to get higher datarates per user by using advanced higher-order modulation, spatial multiplexing, and bigger transport block size. More than 1 Gbps data rate can be achieved on downlink and 500 Mbps on the uplink. The research paper gives an overall idea of carrier aggregation in 5G and coexistence with legacy LTE and Millimeter-wave system.

In 5G, eMBB services are defined to support high data rate, while URLLC services focus on low latency and high reliability. Multiplexing these two services on the same wireless radio frequency leads to a challenging radio resource allocation problem due to their heterogeneous requirements. In this paper, we formulate this problem as two non-linear programming non-convex optimization subproblems, aiming to maximize the average data rate of all eMBB services while satisfying the delay constraint of each URLLC service. We propose an event-driven deep reinforcement learning (DRL) based resource allocation mechanism (EDRL-RAM), which includes two schedulers: eMBB scheduler and URLLC scheduler to achieve long-term optimization of eMBB and URLLC performance. The eMBB scheduler will intelligently allocate resource for each incoming eMBB event, and the URLLC scheduler will intelligently distribute the incoming URLLC event during the ongoing transmissions of eMBB services. The proposed EDRL-RAM makes full use of four different DRL techniques to deal with stochastic event arrivals and network conditions, namely Policy Gradient (PG), Deep Q-learning Network (DQN), Advantage Actor Critic (A2C), and Deep Deterministic Policy Gradient (DDPG), in both eMBB and URLLC schedulers. The simulation results show that in our proposed EDRL-RAM, the order of data rate and delay performance is DDPG, A2C, DQN, and PG. The data rate and delay performance of the proposed EDRL-RAM utilizing any of the four DRL techniques are better than SAFE-TS, which is the best available related work.

Adaptive multi-PHY IEEE802.15.4 TSCH in sub-GHz industrial wireless networks

A new ultrahigh speed micro-spindle has been developed for micromachining that can be used at rotational speeds as high as 500,000 rpm. Since conventional ball bearings or fluid lubricated journal bearings cannot be used at speeds beyond 300,000 rpm for any extended period of time, the new spindle uses a set of journal and thrust foil bearings. The micro-spindle was integrated with a 3-axis micro-milling machine. Cutting experiments were performed on an aluminum alloy at speeds greater than 300,000 rpm using 50 and 300 micron end-mills. The increase in rotational speed to 450,000 rpm in micro-milling of aluminum alloy allowed an increase in feed rate to nearly 800 mm/min (the maximum feed rate available by the positioning stage), thus increasing the material removal rate by more than two orders of magnitude. The dimensional accuracy of several straight cuts made at different feed rates and depths of cut was measured. Theoretical models and research on machining of industrial ceramics have shown that high-speed machining allows for smaller depths of cut by each diamond grit, thus reducing the contact forces and resulting in a reduced possibility of detrimental chipping and subsurface machining damage. Therefore, micro-grinding was performed on dental ceramics to evaluate the feasibility ultrahigh speed machining. In these studies several ceramics used for preparation of dental restorations were cut with diamond tools. The propensity for generation of machining-related damage, such as surface and subsurface microcracks, were greatly reduced by machining at ultrahigh speeds and high feed rates. Micro-machining at such high speeds, and in combination with high feed rates, has never been achieved before.

The terahertz band (0.1 THz-10 THz) with massive spectrum resources is recognized as a promising candidate for future rate-greedy applications, such as 6G communications. Optoelectronic terahertz communications are beneficial for realizing 100 Gb/s data rate and beyond, which have greatly promoted the progress of the 6G research. In this article, we give technical insight into the key technologies of optoelectronic terahertz communications with high data rates in the physical layer, including approaches of broadband devices, baseband signal processing technologies, and design of advanced transmission system architectures. A multicarrier signal processing routine with high noise tolerance is proposed and experimentally verified in a 500 Gb/s net rate terahertz communication system. Finally, we discuss the future directions of optoelectronic terahertz technologies toward the target of terabit- scale communications.