Variable switching frequency hybrid PWM technique for switching loss reduction in a three-phase two-level voltage source inverter

Three-level inverter has been widely used in electric drives and renewable power generation system. However, the common mode voltage (CMV) and output current ripple reduction of three-level inverter should be carefully regulated for the appropriate operation. As these two targets are mutually interrelated, the conventional space vector modulation (SVM) scheme cannot cope with them decently. To overcome this drawback, this paper proposes a novel modified SVM scheme to realize CMV and current ripple reduction simultaneously. The generating mechanism of output current ripple is analyzed, and the relationship between current ripple and utilized vectors is quantitatively described. Based on the analyses, the proposed optimal current ripple and CMV reduction pulse width modulation (OCR-CMVRPWM) method adopts four voltage vectors (large, medium, small and zero vectors) to reduce root mean square (RMS) value of current ripple by allocating the sequence and dwell times of utilized vectors. Compared to the existing PWM methods, the proposed OCR-CMVRPWM scheme can reduce the peak of CMV to half of value using the conventional SVM, and obtain a significant reduction of output current total harmonic distortion (THD). The effectiveness of the proposed method is validated by both simulation and experimental results.

Two-level three-phase voltage source inverter (VSI) with resistive-inductive load has been widely applied in the real life and production. Precise control and fast response are essential for the performance of two-level three-phase VSI with the resistive-inductive load. In this paper, a novel controller design which consists of discrete-time model predictive control (DMPC) based on Laguerre functions and space vector pulse width modulation (SVPWM) is proposed to satisfy these requirements. The inputs of the three-phase are transformed into stationary α-β coordinate for reducing calculation. In addition, the parameters of DMPC based on Laguerre functions are calculated during the offline period, which can reduce the burden of online calculation. With the voltage detection of resistive-inductive load and the current compensation, required reference voltage can be predicted. The required reference voltage is later applied to SVPWM to get the switch sequences. A modified DMPC based on Laguerre functions-SVPWM can achieve a very low total harmonic distortion of output current. Extensive simulation results demonstrate that the proposed approach has a fast dynamic response and perfect steady-state performance.

This paper evaluates several important pulse-width modulation (PWM) methods developed to reduce the common-mode voltage (CMV) or DC-link capacitor current (DCC) of two-level three-phase voltage source inverter (VSI) in motor drive applications. In addition, a PWM selection criterion is introduced to properly utilize these advanced PWM methods in the VSI system. In the motor drive systems, the high CMV generates the large common-mode current, which may cause electromagnetic emissions and motor damages. Also, the large DCC may have an adverse effect on the life expectancy and increase the volume of DC-link capacitor. Therefore, reducing the CMV and DCC is required in modern VSI systems. So far, various PWM methods have been studied to reduce these CMV and DCC. However, they need to be fairly compared and evaluated together under the same condition to provide information so that power electronics engineers can select the appropriate PWM method when designing their motor drive systems. In this paper, the principle of these PWM methods is reviewed and their performance is analytically evaluated. Then, the PWM selection criterion is described based on the comprehensive evaluation studies. Lastly, the simulation and experimental results with an interior permanent magnet synchronous motor (IPMSM) drive system are presented to validate the presented PWM selection criterion.

In power electronics, the alleviation of the converter losses is the major target to accomplish higher efficiency and lower thermal stress that can pave the way to lifetime enhancement of devices. Hence, this paper intends to implement a novel variable switching frequency system for switching loss minimisation in a 3-phase Voltage Source Inverter (VSI). Here, the count of commutations is minimised by varying the switching frequency over the fundamental period. Here, the switching loss is reduced by optimising the modulation index and the reference angle of VSI with a novel hybrid optimisation model. The proposed novel hybrid optimisation model is constructed by hybridising the concept of Group search Algorithm (GSO) and Rider Optimisation Algorithm (ROA) and hence referred to as Bypass updated Group search Algorithm (BU-GSO). Finally, the performance of BU-GSO is evaluated over the traditional models in terms of convergence analysis, Total Harmonic Distortion (THD) as well. Moreover, the evaluation is accomplished with inductive load variation and restive load variation, respectively.

The paper presents an analysis on the output current ripple in zero common-mode voltage (ZCMV) PWM control of multilevel inverters. The modulation strategy for common-mode voltage (CMV) elimination in multilevel inverters is based on the “three zero common-mode vectors” principle. The space vector diagram, which consists of vectors of ZCMV, is fully explored by properly depicting the base voltage vectors and their corresponding active switching vectors. The switching patterns are limited to those of three switching states each of which is symmetrically distributed. Based on the PWM process simplified to that of a two-level inverter with three allowable switching states and the degree of freedom existing in the switching states arrangement, a novel carrier-based pulsewidth-modulated (PWM) method with optimized output current ripple is proposed. Compared to the existing PWM methods which utilize the same kind of switching patterns, the proposed PWM method has reduced considerably the rms current ripple and total harmonic distortion (THD) of the output current in a wide region of the modulation index. The effectiveness of the proposed method is validated by both simulation and experimental results.

This work details the hands-on design, simulation, and direct performance comparison of single-phase and three-phase grid-connected photovoltaic (PV) inverters, fully implemented and tested within the MATLAB/Simulink environment. Moving beyond theoretical descriptions, we constructed detailed models incorporating practical elements: a PV array, a DC-DC boost converter with Perturb and Observe (P&O) Maximum Power Point Tracking (MPPT) for real-world energy harvesting, and both single-phase H-bridge and three-phase two-level voltage source inverters (VSIs) feeding the grid through carefully designed LCL filters. We subjected both systems to identical, realistic solar irradiance profiles and rigorously analyzed critical performance metrics side-by-side, including output waveform quality (Total Harmonic Distortion - THD), power conversion efficiency, DC-link voltage stability, and MPPT effectiveness. Our simulation results clearly demonstrate distinct operational characteristics: the three-phase inverter consistently delivered superior efficiency (approximately 97.8% vs. 96.5%), significantly lower output current THD (below 2.0% vs. approximately 3.8%), and reduced DC-link voltage ripple. Conversely, the single-phase topology offers inherent simplicity and lower cost for lower-power applications. This comparative analysis provides concrete, simulation-backed insights into the fundamental trade-offs between complexity, cost, efficiency, and power quality, directly informing the optimal selection of inverter technology—single-phase for standard residential use or three-phase for commercial/industrial systems demanding higher performance.

This paper presents a decoupled power control method for a single-phase grid-tied inverter that uses model predictive control (MPC) to minimize the number of switch state changes required to control the output bridge while simultaneously constraining the output current harmonics. On one hand, minimizing the number of switch state changes in the output bridge of the inverter results in minimizing switching losses. On the other hand, lower switching frequencies typically result in larger harmonic currents. The proposed controller evaluates a cost function with an adjustable weight factor. Total harmonic distortion (THD) of grid side current is the constraint of the controller which seeks to minimize switch state changes to lower switching losses while meeting the THD constraint. Thus the MPC performs constrained multi-objective optimization. Because the controller is harmonic-constrained, the single-phase inverter has robust operation under pulsating dc-link voltage, which allows a smaller dc-link capacitor and higher bus ripple voltage. The weight factor can be chosen from an engineering tradeoff between the output current THD and the switching frequency. The simulation results are verified experimentally by implementing the controller using DS1007 platform by dSPACE.

Compared with the widely used constant switching frequency pulse-width-modulation (PWM) method, variable switching frequency PWM can benefit more because of the extra freedom. Based on the analytical expression of current ripple of three-phase converters, variable switching frequency control methods are proposed to satisfy different ripple requirements. Switching cycle $T_{s}$ is updated in DSP in every interruption period based on the ripple requirement. Two methods are discussed in this paper. The first method is designed to arrange the current ripple peak value within a certain value and can reduce the equivalent switching frequency and electromagnetic interference (EMI) noise; the second method is designed to keep ripple current RMS value constant and reduce the EMI noise. Simulation and experimental results show that variable switching frequency control could improve the performance of EMI and efficiency without impairing the power quality.

Harmonic analysis currently plays an important role for the power quality analysis because the non-linear loads, as source of the harmonic distortion, have significantly increased. The harmonic distortion influences power quality in power systems such as overheating of electrical equipment and aging of electrical equipment. Therefore, non-linear loads should be monitored in real time. This research proposes the design and implementation of the prototype current harmonic analysis that can be applied in real time based on S-transform Method. The equipment of this prototype can be explained as follows: CT-235, TZ2L9 and CT for KWH meters as current sensor, microcontroller AT mega 8535 as data acquisition, and Visual Basic software as displaying current waveform, current spectrum, rms current value, and total harmonic distortion (THD) for current. S-transform method is used to obtain the THD for current. The experimental result is validated by FLUKE 43B and the THD for current is accurately measured.

A new switching scheme, which combines conventional space vector modulation (SVM) and carrier-based pulse width modulation (CBPWM), is proposed for a three-phase four-leg voltage source inverter (VSI). The proposed algorithm is simpler than conventional three-dimensional space vector modulation (3-D SVM) and easy in implementation in a real-time DSP system, it avoids the selection of a prism and tetrahedron in a 3-D SVM, therefore alleviates the computation burden of the DSP. Also, the concept of near-state pulse width modulation (NSPWM) method, which is used in a three-phase three-leg inverter to reduce the common mode voltage (CMV) noises, can be adopted in this algorithm so as to reduce the common mode voltage for a three-phase four-leg VSI. The feasibility of the proposed modulation technique is verified by both computer simulation and experimental results.

Due to its advantages, the asymmetrical dual three-phase induction motor drive is a strong choice in high-power applications. However, the common-mode voltage produced by the voltage source inverters affects the winding insulation and damages the bearings. Common-mode voltage is also responsible for electromagnetic interference and leakage currents. This paper, therefore, analyses the common-mode voltage produced by the inverter supplying a dual three-phase induction motor drive and proposes a novel modified space vector decomposition-based Space Vector Pulse Width Modulation (SVPWM) technique for common mode reduction. The vector space decomposition-based space vector modulation technique offers excellent flexibility as it reduces the common-mode voltage (CMV) by exploiting the additional degree of freedom in a dual three-phase system. The common-mode voltage (CMV) can be reduced to one-sixth of the DC link voltage compared to the highest CMV, i.e. half of the DC-link voltage produced in conventional space vector modulation. The proposed method is also validated experimentally to demonstrate the effectiveness of the proposed scheme in terms of the amplitude of CMV, pulsations, and total harmonic distortion(THD) in current.

Direct torque control (DTC) is known for its fast control in AC motor drives due to its simple control structure that directly controls the torque without the need for modulation blocks or frame transformations. However, when used in induction motor (IM) drives it has three main drawbacks: large torque ripples, variable switching frequency, and sector flux-droop at the low-speed region due to the employment of the torque hysteresis controller (THC). Torque ripple minimization can be achieved in DTC drives by replacing the originally proposed two-level inverter with a three-level neutral-point clamped (3L-NPC) inverter. Nevertheless, the switching frequency remains variable and low, which produces an elevated torque ripple and asymmetrical switching signals for the inverter. In addition, sector flux-droop resulting from driving the IM at the low-speed region produces a high current distortion that consequently eliminates the robustness of DTC. To alleviate these problems, an interleaving constant switching frequency torque controller-based DTC (CSFTC-DTC) was implemented. It improves the operation of the IM at the low-speed region by increasing the duty-cycle of the applied active voltage vector and reducing the duration of the applied zero vectors. Although the conventional CSFTC-DTC regulates the stator flux of the IM at the low-speed region and minimizes the total harmonic distortion (THD) of the stator current, it produces a high torque ripple-one of the main disadvantages of classical DTC. In this paper, an interleaving CSFTC-DTC is proposed to subdivide the duty cycle of the applied vectors of the 3L-NPC inverter to limit the influence of the large duty-cycle of the applied vectors on flux-regulation and torque ripples. The simulation and experimental results presented validate the effectiveness of the proposed method over the conventional method.

New switching technique for current control of grid converters for wind power systems

Classical model based predictive control for single-phase cascade H-bridge multilevel STATCOM generates a variable switching frequency that produces high frequency harmonics and high stress on the power semiconductor devices. To solve these issues, in this paper is proposed a predictive control strategy operating at fixed switching frequency. The method includes a modulation stage in the predictive controller. Simulation results show increased performance of the proposed control method in terms of current ripple and total harmonic distortion.

In the finite control set model predictive control (FCS-MPC) strategy of the grid-tied inverter, the current ripple (CR) affects the selection of optimal voltage vectors, which leads to the increase of output current ripples. In order to solve this problem, this paper proposes a CR reduction method based on reference current compensation (RCC) for the FCS-MPC strategy of grid-tied inverters. Firstly, the influence of the CR on optimal voltage vector selection is analyzed. The conventional CR prediction method is improved, which uses inverter output voltage and grid voltage to calculate current ripples based on the space state equation. It makes up for the shortcomings that the conventional CR prediction method cannot predict in some switching states. The improved CR method is more suitable for the FCS-MPC strategy. In addition, the differences between the two cost functions are compared through visual analysis. It is found that the sensitivity of the square cost function to small errors is better than that of the absolute value function. Finally, the predicted CR is used to compensate the reference current. The compensated reference current is substituted into the square cost function to reduce the CR. The experimental results show that the proposed method reduces the CR by 47.3%. The total harmonic distortion (THD) of output current is reduced from 3.86% to 2.96%.