VMcSim: A Detailed Manycore Simulator for Virtualized Systems

As technology scales for increased circuit density and performance, the management of power consumption in embedded systems is becoming critical. Because the operating system (OS) is a basic component of the embedded system, the reduction and characterization of its energy consumption is a main challenge for the designers. In this work, a flow of low power OS energy characterization is introduced. The variation of the energy and power consumption of the embedded OS services is studied. The remainder of this article details the methods used to determine energy and power overheads of a set of basic services of the embedded OS: scheduling, context switch and inter-process communication. The impacts of hardware and software parameters like processor frequency and scheduling policy on the energy consumption are analyzed. Also, models and laws of the power and energy are extracted. Then, to quantify the low power OS energetic overhead, the obtained models are integrated in the system level design. Our method allows estimating the energy consumption of the low power OS services when running an application on a specific hardware platform.

There is currently a lot of interest in resource virtualization as an important technique for addressing the problems of manageability, reliability, and security in computer systems. Resource virtualization decouples the user's perception of hardware and software resources from the actual implementation of these resources. It adds a flexible and programmable layer of software between user applications (such as database systems) and the resources that they use. This layer of software maps the virtual resources perceived by the applications to real physical resources. An example of this layer of software is a virtual machine monitor, which partitions the resources of a machine (CPU, disk, memory, network, etc.) into multiple virtual machines, and independent operating systems and applications can be installed on each virtual machine. The power of resource virtualization comes from the ability to manage the mapping from virtual resources to physical resources in the virtualization layer, and to change it as needed.The trend towards virtualization is of interest to us in the database research community because database systems are increasingly being run in virtualized environments. This presents a major opportunity since virtualization can help in solving many important problems in the areas of database system usability, manageability, deployment, scalability, and availability. Leveraging the capabilities of virtualization to solve these problems will require some effort on the part of our community. At the same time, virtualization poses some unique research challenges that must be addressed to enable database systems to run efficiently in these virtualized environments that are becoming increasingly common. In this tutorial, we will introduce resource virtualization and how it affects database systems. We will present the opportunities that resource virtualization provides for database systems and the unique research challenges that it poses, and we will review ongoing research in this area.

The cost of problem analysis and programming dominates by far the cost of computer utilization. This dominance will increase in the future as hardware elements become more powerful and economical and problems become more complex and demanding of highly skilled analysis. As this trend continues, the sophisticated user will become increasingly intolerant of a situation which prevents economic transfer of programs and data from one installation or hardware type to another. A standard machine independent environment which provides data management services at several levels to programmers and task programs should be defined. Programs would then interface with a set of virtual machines, or standard program environments, which are independent of the particular hardware configuration of the installation.

We target the problem of managing the power states of the servers in a Cloud Data Center (CDC) to jointly minimize the electricity consumption and the maintenance costs derived from the variation of power (and consequently of temperature) on the servers’ CPU. More in detail, we consider a set of virtual machines (VMs) and their requirements in terms of CPU and memory across a set of Time Slot (TSs). We then model the consumed electricity by taking into account the VMs processing costs on the servers, the costs for transferring data between the VMs, and the costs for migrating the VMs across the servers. In addition, we employ a material-based fatigue model to compute the maintenance costs needed to repair the CPU, as a consequence of the variation over time of the server power states. After detailing the problem formulation, we design an original algorithm, called Maintenance and Electricity Costs Data Center (MECDC), to solve it. Our results, obtained over several scenarios from a real CDC, show that MECDC largely outperforms two reference algorithms, which instead either target the load balancing or the energy consumption of the servers.

As a dynamic memory virtualization technique, ballooning is widely applied in many virtualization platforms, i.e. Xen and VMware ESX Server. Since ballooning technology enables the guest OS to surrender unused memory back to the host during runtime, and it can increase utilization and flexibility of memory. Despite the rapid development and extensive use of memory virtualization technologies, it is still a challenge to analyze and verify its validity and some major properties through formal methods. In this paper, we model the ballooning under Xen architecture including Xen hyper visor, a set of virtual machines and balloon drivers using the process algebra Communication Sequential Process (CSP) in order to verify some resource control properties of ballooning. The model is implemented with Process Analysis Toolkit (PAT). As a result, the ballooning used in Xen architecture satisfies these major resource control properties in VM requirement document.

Cross-technology communication (CTC) allows devices employing incompatible wireless technologies to directly exchange information without the need of expensive gateways. Existing work on CTC has showcased the ability of exchanging data between diverse wireless standards, but has not analysed the challenges nor tackled the problem of enabling CTC between multiple constrained IoT platforms with different characteristics. Indeed, CTC schemes are often hacked on very specific hardware platforms, which results in a lack of a general, portable solution. Furthermore, CTC has always been tested as a standalone piece of functionality, and its seamless integration with the classical operations of a constrained IoT device remains an open challenge. In this paper, we present X-Burst, a portable framework that allows multiple constrained IoT platforms with diverse characteristics to seamlessly interact using CTC. X-Burst allows to customize the CTC working principle (e.g., how information is encoded, or the alphabet used to encode a symbol) and enables the combination of different encoding and decoding strategies independently of the employed hardware platform. Thanks to its high modularity, X-Burst also simplifies the development of alternative CTC implementations and makes it easy to compare different approaches. As a proof of concept, we integrate X-Burst into the Contiki operating system without changing Contiki’s core functions and allow an IoT device to seamlessly support CTC in parallel to its normal operations. We then showcase the functionality of X-Burst by enabling a bidirectional CTC between off-the-shelf heterogeneous IoT platforms based on IEEE 802.15.4 and Bluetooth Low Energy (BLE). An experimental evaluation further shows X-Burst’s small memory footprint and analyses the robustness and throughput of different encoding schemes.

System emulation and firmware re-hosting have become popular techniques to answer various security and performance related questions, such as determining whether a firmware contain security vulnerabilities or meet timing requirements when run on a specific hardware platform. While this motivation for emulation and binary analysis has previously been explored and reported, starting to either work or research in the field is difficult. To this end, we provide a comprehensive guide for the practitioner or system emulation researcher. We layout common challenges faced during firmware re-hosting, explaining successive steps and surveying common tools used to overcome these challenges. We provide classification techniques on five different axes, including emulator methods, system type, fidelity, emulator purpose, and control. These classifications and comparison criteria enable the practitioner to determine the appropriate tool for emulation. We use our classifications to categorize popular works in the field and present 28 common challenges faced when creating, emulating, and analyzing a system from obtaining firmwares to post emulation analysis.

In this paper we tackle the problem of dynamic portfolio optimization, i.e., determining the optimal trading trajectory for an investment portfolio of assets over a period of time, taking into account transaction costs and other possible constraints. This problem is central to quantitative finance. After a detailed introduction to the problem, we implement a number of quantum and quantum-inspired algorithms on different hardware platforms to solve its discrete formulation using real data from daily prices over 8 years of 52 assets, and do a detailed comparison of the obtained Sharpe ratios, profits, and computing times. In particular, we implement classical solvers (Gekko, exhaustive), D-wave hybrid quantum annealing, two different approaches based on variational quantum eigensolvers on IBM-Q (one of them brand-new and tailored to the problem), and for the first time in this context also a quantum-inspired optimizer based on tensor networks. In order to fit the data into each specific hardware platform, we also consider doing a preprocessing based on clustering of assets. From our comparison, we conclude that D-wave hybrid and tensor networks are able to handle the largest systems, where we do calculations up to 1272 fully-connected qubits for demonstrative purposes. Finally, we also discuss how to mathematically implement other possible real-life constraints, as well as several ideas to further improve the performance of the studied methods.

Remote photoplethysmography (rPPG) enables non-contact vital sign measurements using standard smart device cameras, opening up the potential of scalable health applications on consumer smart devices. However, rPPG signal quality is highly sensitive to camera sensor characteristics and image processing pipelines, which can vary between devices. This variation limits reproducibility and generalisation of rPPG-based algorithms beyond specific hardware platforms. This work presents a reproducible test environment for the validation of the camera sensor response in the context of rPPG signals. A microcontroller-driven illumination system and mechanically constrained setup are used to generate controlled, repeatable optical signals. Two characterisation tests are introduced: a time domain morphology analysis and a frequency domain attenuation analysis. Pulse timing consistency, pulse waveform morphology and normalised frequency responses are compared to assess sensor similarity. This method is applied to selected consumer devices and demonstrates consistent camera response patterns under the controlled test conditions. By explicitly addressing validation of the camera sensor and image processing pipeline, this work supports the development of more robust and transferable rPPG-based vital sign applications across a wider range of consumer devices.

Power system is tending to form a large scale network with numerous interconnected subsystems. In order to maintain the reliability and stability of the power grid, multiple analysis systems with specific hardware platforms are implemented in the electrical power dispatching centre, which makes the software maintenance and hardware management more complicated and ponderous. This paper describes a common task based parallel platform for power system analysis and stability assessment, in which multiple analysis systems and applications can be implemented respectively by sharing the same hardware and support software. The computers in the platform are assigned as data server, computation workstations or console workstations. There are two roles for the computation workstations, one is assumed the manager, and the others are assumed the node. The support software includes 9 programs: file transfer service, configuration service, database service, raw data service, task partitioning interface, task dispatching service, calculation interface, result processing interface and computation management service. Analysis systems and applications can easily be integrated into the platform by development of 3 programs: the task partitioning program, the calculation program and the result processing program. The parallel platform is designed to meet the needs of different applications, by which the hardware costs are reduced and the development cycle is shortened. It is also beneficial to enhance the reliability of power system operations.

Drones have the characteristics of flexible performance, simple operation, low cost, and convenient operation. Starting from the basic principles of drones, this paper analyzes the flight characteristics and basic structure of drones. Based on their flight action requirements and specific hardware platforms, a complete drone software control system is designed. The overall system adopts a multi-threaded concurrent management mechanism, and analyzes the main processing flow, remote control data receiving thread, as well as the thread design for unmanned aerial vehicle attitude reading, humanoid detection, attitude control, and power supply voltage monitoring to improve the system’s computing efficiency and response capability. The design of software functions adopts modular programming ideas, simplifies software design concepts, and improves the later maintainability of the code. The designed software control system and software design concept provide certain reference value for professionals in related fields.

Power dissipation has become a critical design metric in microprocessor-based system design. In a multi-core system, running multiple applications, power and performance can be dynamically traded off using an integrated power management (PM) unit. This PM unit monitors the performance and power of each core and dynamically adjusts the individual voltages and frequencies in order to maximize system performance under a given power budget (usually set by the operating system). This paper presents a performance and power analysis methodology, featuring a simulation model for multi-core systems that can be easily reconfigured for different scenarios and a PM infrastructure for the exploration and analysis of PM algorithms. Two algorithms have been implemented: one for discrete and one for continuous power modes based on non-linear programming. Extensive experiments are reported, illustrating the effect of power management both at the core and the chip level.

Details a real-world product that applies a cutting-edge multi-core architecture Increasingly demanding modern applicationssuch as those used in telecommunications networking and real-time processing of audio, video, and multimedia streamsrequire multiple processors to achieve computational performance at the rate of a few giga-operations per second. This necessity for speed and manageable power consumption makes it likely that the next generation of embedded processing systems will include hundreds of cores, while being increasingly programmable, blending processors and configurable hardware in a power-efficient manner. Multi-Core Embedded Systems presents a variety of perspectives that elucidate the technical challenges associated with such increased integration of homogeneous (processors) and heterogeneous multiple cores. It offers an analysis that industry engineers and professionals will need to understand the physical details of both software and hardware in embedded architectures, as well as their limitations and potential for future growth. Discusses the available programming models spread across different abstraction levels The book begins with an overview of the evolution of multiprocessor architectures for embedded applications and discusses techniques for autonomous power management of system-level parameters. It addresses the use of existing open-source (and free) tools originating from several application domainssuch as traffic modeling, graph theory, parallel computing and network simulation. In addition, the authors cover other important topics associated with multi-core embedded systems, such as: Architectures and interconnects Embedded design methodologies Mapping of applications Programming paradigms and models of computation Power optimization and reliability issues Performance tools and benchmarks Resource management Multithreading Multi-core programming challenges Compiler and operating system support This is a detailed discussion of research on the interaction between multi-core systems, applications and software views, and processor configuration and extension, which add a new dimension to the problem space. The text offers a useful overview of the most widespread industrial and domain-specific solutions, providing several examples of working implementations.

A virtualized system includes a new layer of software, the virtual machine monitor. The VMM's principal role is to arbitrate accesses to the underlying physical host platform's resources so that multiple operating systems (which are guests of the VMM) can share them. The VMM presents to each guest OS a set of virtual platform interfaces that constitute a virtual machine (VM). Once confined to specialized, proprietary, high-end server and mainframe systems, virtualization is now becoming more broadly available and is supported in off-the-shelf systems based on Intel architecture (IA) hardware. This development is due in part to the steady performance improvements of IA-based systems, which mitigates traditional virtualization performance overheads. Intel virtualization technology provides hardware support for processor virtualization, enabling simplifications of virtual machine monitor software. Resulting VMMs can support a wider range of legacy and future operating systems while maintaining high performance.

The aim of this research paper is to propose an alternative but possible practical solution to basic key and common security threats such as overloading (Flooding Attacks) and their associated risks to a typical industrial automation system. For this purpose, countermeasures that can be directly implemented in end points regardless of any specific hardware or deployment platform are considered here. These proposed solutions include developing new control systems that can defend associated industrial automation processes and themselves against such attacks, i.e., identifying and building a defense mechanism in control algorithm, and hence named self-defending control strategies. For demonstration an example of such control algorithms was developed and simulation results are presented.