Wave haptics: using motor dynamics for stiff coupling to virtual environments

The article is dedicated to optimizing the digital current control loop of a thyristor converter-driven electric drive, essential for ensuring stable, precise, and reliable operation of electric drives in automated and industrial systems. The primary goal of this research is to develop and enhance the digital current regulator (DCR), which enables the drive system to achieve desired performance, including rapid and stable response to current changes without excessive overshoot or oscillations. Optimization of the current loop improves energy efficiency, enhances dynamic properties, and increases resistance to external disturbances, all of which are critical for modern electric drive systems. The introduction discusses key aspects of digital current loop optimization, specifically dynamic characteristics such as time delays, sampling rate, and bandwidth, which significantly impact the efficiency of digital controllers. Special attention is given to the tuning of proportional-integral (PI) controller parameters, allowing quick and stable response to current changes. The developed model allows preliminary simulation of the current loop’s performance, providing an opportunity to test different configurations before actual implementation. To improve the accuracy and stability of the system, filtering methods are proposed to reduce the impact of high-frequency noise, ensuring the system’s precision and robustness against external interference. Optimization criteria are introduced, including minimizing the integral square error (ISE) and reducing energy consumption, which significantly decreases system losses and increases the energy efficiency of electric drives. In developing the optimized control loop, the following assumptions are considered: 1) the thyristor converter (TC) operates in continuous current mode, 2) the current loop dynamics are studied within a narrow range of TC phase angle changes, and 3) a discrete dynamic TC model is used with averaging of electromotive force (EMF) over the conduction interval. Optimizing the digital current loop addresses several critical tasks, including enhancing control accuracy, reducing overshoot and oscillations, and improving the system’s dynamic response, allowing for reduced delays and a faster reaction to load changes. The optimization results of the digital current regulator (DCR) show reduced energy consumption and significant improvements in control accuracy. The high-speed performance of the digital current loop enables fast transient processes within a single sampling interval of the thyristor converter, which is crucial for systems requiring rapid regulation. Additionally, the digital control loop provides flexibility in control, as it allows for system adjustments to different operating conditions through a software-based approach. The study’s final results demonstrate the potential of digital current loops in modern electric drives. With advances in microprocessor technology, digital regulators enable more complex control algorithms, including adaptive and predictive strategies, which further enhance system efficiency. These approaches are especially relevant for industrial electric drives that require high precision and response speed, making digital current loops a promising solution for contemporary automated control systems.

This paper presents effect of LC with clamping diodes dv/dt filter on current-controlled PMSM drives in case where 3-phase inverter output currents are measured and used in the digital control loop. In particular, this case can be reported in some cases. Firstly, power devices are equipped with integrated pilot current sensors. Secondly, PCB technology based Rogowski coils are installed in inverter leg with analog circuit to feed a signal to microcontroller. Thirdly, hall type current sensors are packaged in inverter output terminal through a bus bar. In those cases, it is inevitable to measure inverter currents because it is hard to move the location of current sensor. In this manner, the effect of filter resonance should be considered properly to control the motor current accurately because the measured inverter output current includes both motor and filter resonant current. If the resonant current of the filter is not compensated properly, it causes the DC offset of motor current which bring about the torque ripples. In order to compensate the offset, inserting a two stage Discrete Fourier Transform (DFT) is used and the calculated offset is subtracted from the sampled current. Judging by simulation and experimental results, it is confirmed that the compensation method eliminates the offset of the motor current effectively, and thereby reducing the torque ripple as well.

A digital control loop scheme for a high speed PLL is suggested to detect amplitude errors at the output of the oscillator. Reliability specifications of the PLL are likely to be violated in case of excessive output swing in the oscillators. In addition, low amplitude swings will have negative influences on the phase noise of LC oscillators. As a result, the performance and reliability of the PLL will be reduced. The design includes a novel amplitude error detector. The amplitude error detector generates a digital word to show the situation of the amplitude error. The structure is implemented in 65nm CMOS technology. The power consumption of one amplitude error detector from 1V power supply is 0.76mW.

This paper addresses modeling and control issues related to practical high-frequency digital PWM control of constant-frequency boost, buck-boost and flyback converters. Discrete-time models, including the effects of A/D sampling and delays in the digital control loop, are derived for two cases: output voltage A/D sampling during transistor off time in combination with trailing-edge (TE) DPWM, and A/D sampling during transistor on time in combination with leading-edge (LE) DPWM. We show that off-time sampling with TE-DPWM, which is a common approach in digital controller realizations, can result in desirable minimum-phase responses, thus simplifying compensator design in wide bandwidth closed-loop voltage regulators based on boost or flyback converters. The results are verified by simulation and experimental results on a boost converter prototype.

The empirically developed force control in cases of the robotic polishing and the rehabilitation robots serve as a motivation for the study of the peculiar dynamic behaviour of digital force control. The effect of the sampling times of the digital controllers are studied analytically, and the corresponding stability charts are presented for different gain and mechanical parameters describing also the different sampling frequencies at the force sensors and in the digital control loop. The types of bifurcations are also identified at the stability limits. As one of the practical conclusions, the negative role of differential gain is explained in digital force control.Key wordsforce controlled robotsdifferential gaindelayed oscillator

34th Annual Frequency Control Symposium

Real Time Analysis of Microprocessor Control System

Stability of discrete linear feedback systems with pulse-width-modulation power dispatch An adaptation of the circle criterion to pulse-width-modulation type nonlinearities in a digital control loop is presented. Formulae are derived for both gain and the mode of oscillations of the system response. Standard examples are taken, including that of a plant with a pole at the origin.

We used a digital feedback control loop system to produce reproducible fixed volume transmission holograms of high diffraction efficiency. Different strategies were investigated to obtain holograms of good quality and the highest refractive index modulation depth. Using this control system, we were able to record holograms with stationary fringes. Additionally to using the stationary fringe recording, a double recording-fixing schedule resulted in being the most appropriate one to produce reproducible holograms of better characteristics. This strategy is discussed and compared with other already established ones.

Creating a compelling haptic sense of immersion in a virtual environment is a challenging task for the control engineer. A haptic display must render both low impedance free-space motion and high impedance rigid constraints while ensuring stable interaction. This paper outlines a control design approach for the most common haptic display implementation, the impedance display. Two-port absolute stability criteria are used to develop explicit design bounds for virtual coupling networks which guarantee system stability for a broad class of human operators and virtual environments. The technique is applied to the Excalibur three-axis force display. The resulting absolutely stable haptic interface is the centerpiece of a virtual building block simulation which emulates the behavior of LEGO/sup TM/ bricks in a virtual environment.

Human psychophysical experiments were designed and conducted to investigate the effect of 3D perspective visual images on the visual and haptic perception of size and stiffness in multimodal virtual environments (VEs). Virtual slots of varying length and buttons of varying stiffness were displayed to the subjects, who then were asked to discriminate their size and stiffness respectively using visual and/or haptic cues. The results of the size experiments show that under vision alone, farther objects are perceived to be smaller due to perspective cues and the addition of haptic feedback reduces this visual bias. Similarly, the results of the stiffness experiments show that compliant objects that are farther are perceived to be softer when there is only haptic feedback and the addition of visual feedback reduces this haptic bias. Hence, we conclude that our visual and haptic systems compensate for each other such that the sensory information that comes from visual and haptic channels is fused in an optimal manner.

This paper is concerned with haptic simulation in multi-user virtual environments in which the users can haptically interact in a shared virtual world from separate workstations over an Ethernet local-area Network (LAN). High-fidelity haptic rendering requires a minimum control update rate of 1000Hz which is beyond the capability of popular network protocols such as the UDP and TCP/IP. Consequently, a multi-rate control strategy is adopted in which local force-feedback loops are executed at higher rates than data packet transmission between the user workstations. Two control architectures, i.e. centralized and distributed, are presented and their stability margins are compared. Two methods for mathematical modelling and analysis of the proposed multi-rate haptic control systems are examined. Analytical and experimental results demonstrate that the distributed control architecture is superior to the centralized controller from performance and stability perspectives. This is confirmed through experiments with a dual-user dual-finger haptic rendering platform.

Availability of low-cost electronics has led to a new breed of control system components, so-called smart components, which can perform control actions in the actuator and sensor components as well as in the controller. ldquoSmartrdquo components can communicate bidirectionally in networked control systems (NCSs). One can improve control system performance and design due to the decentralized, yet more connected, nature of these systems. Current research on NCSs primarily focuses on communication loss and delay. This paper investigates the potential benefits of bidirectional communication in a feedback control loop, which is at the heart of so many applications. First, a definition and quantification of component-swapping modularity is presented. Next, an optimal design formulation is presented for an NCS that maximizes component-swapping modularity. The approach is then demonstrated with an example of driveshaft speed control with a dc motor.

This work presents the evolution of a Three-Level Flying Capacitor Converter (3L-FCC) ASIC design from earlystage modeling and simulation towards full integration in a mixed-signal ASIC. As an intermediate step, the power converter core was first implemented in an analog ASIC, complemented by a System-on-Chip (SoC) integrating an embedded CPU for the digital control loop and FPGA fabric for the modulation scheme. This hybrid platform enabled functional validation and post-silicon testing of the analog stage before migrating the remaining digital control and phase-shifted pulse-width modulation (PS PWM) logic into the ASIC. In the current stage of the project, the control architecture is being migrated to a hardware description language (HDL) implementation, with the goal of enabling full integration into a standard digital design flow for mixed-signal ASICs. An FPGA-based prototype is being used to verify functionality and assess timing performance prior to full integration, providing a validation path towards future monolithic implementation.

The conventional controllers such as PD, PI and PID have been widely used in industry and have demonstrated good control performance for different industrial plants. These conventional controllers have always been the very first choice for controlling any industrial plant due to its simple structure. The conventional controllers have been implemented in industry by analog circuits. These analog circuits impose some limitations, when there is a need for retuning the controller. Sometimes, the complete hardware of the controller needs to be modified. Today, a wide variety of embedded processors are available and these processors can be used to implement the conventional controllers. This paper presents an implementation of digital PI controller on an 8-bit microcontroller. This PI controller is tested for the plant model of DC motor by hardware-in-loop simulation technique. In this HIL simulation, the PI controller is on implemented on a microcontroller and the plant model is in simulation environment. Results have shown that this embedded PI controller is able to offer good control in HIL simulation.