Waveguide Coupling Gratings: Attractive Features and Dangerous Pitfalls

We study the physical concept of utilizing a critical coupling to obtain a high-performance grating coupler with completely vertical emission on a silicon-on-insulator substrate. Following our design strategy, we numerically show that when our grating coupler is coupled to a standard single-mode fiber operating at 1310 nm wavelength, a -1.46 dB coupling loss, a 20 nm spectral full-width-half-maximum, and a -24 dB back reflection can be achieved at the same time without full optimization. A practical design that largely relaxes the stringent lithography requirement is also proposed and presented.

Efficient fiber-chip coupling interfaces are critically important for integrated photonics. Since surface gratings diffract optical signals vertically out of the chip, these couplers can be placed anywhere in the circuit allowing for wafer-scale testing. While state-of-the-art grating couplers have been developed for silicon-on-insulator (SOI) waveguides, the moderate index contrast of silicon nitride (SiN) presents an outstanding challenge for implementing efficient surface grating couplers on this platform. Due to the reduced grating strength, a longer structure is required to radiate the light from the chip which produces a diffracted field that is too wide to couple into the fiber. In this work, we present a novel grating coupler architecture for silicon nitride photonic integrated circuits that utilizes an amorphous silicon (α-Si) overlay. The high refractive index of the α-Si overlay breaks the coupler’s vertical symmetry which increases the directionality. We implement subwavelength metamaterial apodization to optimize the overlap of the diffracted field with the optical fiber Gaussian mode profile. Furthermore, the phase of the diffracted beam is engineered to focalize the field into an SMF-28 optical fiber placed 55 µm above the surface of the chip. The coupler was designed using rigorous three-dimensional (3D) finite-difference time-domain (FDTD) simulations supported by genetic algorithm optimization. Our grating coupler has a footprint of 26.8 × 32.7 µm2 and operates in the O-band centered at 1.31 μm. It achieves a high directionality of 85% and a field overlap of 90% with a target fiber mode size of 9.2 µm at the focal plane. Our simulations predict a peak coupling efficiency of − 1.3 dB with a 1-dB bandwidth of 31 nm. The α-Si/SiN grating architecture presented in this work enables the development of compact and efficient optical interfaces for SiN integrated photonics circuits with applications including optical communications, sensing, and quantum photonics.

Grating couplers are used to efficiently couple light from an optical fibre to a silicon waveguide as they allow light to be coupled into or out from any location on the device without the need for cleaving. However, using the typical surface relief grating fabrication method reduces surface planarity and hence makes further processing more difficult. The ability to manufacture high quality material layers on top of a grating coupler allows multiple active optical layers to be realized for multi-layer integrated optical circuits, and may enable monolithic integration of optical and electronic circuits on separate layers. Furthermore, the nature of the refractive index change may enable removal via rapid thermal annealing for wafer scale testing applications. We demonstrate for the first time a coupling device utilising a refractive index change introduced by lattice disorder. Simulations show 44% of the power can be extracted from the waveguide by using uniform implanted gratings, which is not dissimilar to the performance of typical uniform surface relief gratings currently used. Losses determined empirically, of 5.5 dB per coupler have been demonstrated.

We present high-performance surface acoustic wave semiconductor coupled devices in which highly functional compound semiconductor devices and highly efficient surface acoustic wave devices are monolithically integrated on the same substrate using epitaxial lift-off films. We investigated the optimal conditions for lift-off and bonding processes and succeeded in fabricating a quasi-monolithic structure without any damage in semiconductor films. We also investigated basic integrated circuit fabrication processes such as patterning and etching of the quasi-monolithic substrate. The bonded film is stable and rugged enough against these processes and the substrate can be handled as a monolithic substrate. Based on our experimental results, we confirmed that fabricating high performance functional devices is feasible.

The object of this paper is to trace the development of the semiconductor industry itself, taking due account of economic and market factors, as well as the effects of technological change.The historical growth of the industry is described, with particular emphasis on the structural changes which stemmed from the invention of the planar process and the development of integrated circuits. The technological, economic and market trends which are likely to dominate the growth of the industry in the seventies are discussed at some length, with considerable attention being given to the integrated circuit sector, in which the rate of expansion is certain to be most rapid and where the orderly acceleration of business activity will be disrupted to a degree by the strength of the innovative forces acting.The many and diverse influences acting on the semiconductor industry are then analysed to enable forecasts to be made of changes in the future structure of the industry and of its expansion to 1980 in terms of global sales and employment.

A well-known advantage of injection molded plastic optical components is the possibility of integration of an optical function and a mechanical mount. The optical part can be positioned accurately with respect to well-defined references of the mechanical mount. The optical function does not have to be restricted to one optical surface. In principle any combination of lenses, mirrors and/or beam splitters is possible. The metrology of these combined optical functions is often not trivial. Commercial available measuring equipment in general has difficulties when the different optical functions are tightly toleranced with respect to each other and when less common types of optical surfaces are involved. In this paper three examples of multi function optical components are presented. One of these examples, a double mirror, is elaborated in detail in terms of metrology. The orientation of both mirrors with respect to the mechanical references is tightly toleranced. The same holds for the orientation of the mirrors with respect to each other. The shape of one of the mirrors is so accurate that the reflected wave front is diffraction limited. The other mirror is an off axis paraboloid. The specially developed measurement tool, based on the autocollimator principle, the obtainable measurement accuracies and the calibration procedure will be described. Also the product accuracies realized with injection molding of this component in mass production will be presented.© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

This study presents the design of an off-chip current sensor for IDDQ testing of CMOS (Complementary Metal-oxide Semiconductor) ICs (integrated circuit). It provides a linear voltage signal of IDDQ current with a conversion factor of 5 mV/μA without any amplification. A voltage-controlled switch is used to bypass the transient current peaks. It has also been shown that the sensor is capable of detecting IDDQ faults of a circuit at 100 kHz test frequency without degrading its performance.

The discovery of ferroelectricity in hafnium oxide (HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) based thin films in 2011 renewed the interest in ferroelectrics. These new ferroelectrics possess completely different crystal morphology with conventional perovskite ferroelectrics, and present more robust ferroelectric properties upon aggressive scaling and compatibility with standard integrated circuit fabrication processes. In this article, we give a brief introduction to the conventional ferroelectric memories, then review the basic properties, recent progress, and memory applications of these HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based ferroelectrics.

Planar silicon field-effect transistors with Langmuir-Blodgett gate insulators

Recent progress in the packaging and integration of silicon photonics devices and systems is presented. An overview of various fiber packaging techniques is given, including a detailed description of a planar fiber packaging process for single fibers and arrays of fibers based on grating couplers. An overview of techniques for integrating lasers with silicon photonics circuits is also given, including details on a hybrid integration technology based on a ceramic micro-optical bench suitable for use with tunable and high-speed directly-modulated lasers. Both of the technologies discussed in detail are suitable for passive alignment and wafer-scale assembly.

As it offers a wide range of benefits, assembly injection molding of plastics represents an innovative technology. In a material, cost efficient and integrative process, the most diverse products for mechatronics applications can be manufactured. The technique can generate multi-material systems combining different parts with special functionality, e.g., plastics casings and circuit boards, in a fully automated process. This automated integration of part structure and functionality makes these products superior to others. However, it implies a great challenge in terms of technology for part development and production. Of vital importance for a media tight and durable connection between individual materials/parts of the assembly, are factors such as the components’ compatibility and chemical-physical adhesion. Thermal stress in hybrid assemblies due to different thermal expansion coefficients is often the reason for part failure. An approach to meeting these challenges is the investigation of the process-integrated application of functional interlayers, in order to improve the formation of adhesion along with the optimization of the stress distribution. The following article will present findings obtained on the bond strength generated by different types of interlayers (hot-melt and pressure-sensitive adhesives) between circuit cards and different types of casing plastics. A fundamental understanding of underlying effects and the tools for predicting process dependent effects is required for the optimization of the systems’ functionality. For this purpose, the interactions between material, system design and process conditions are considered in relation to bond strength.

Monolithic integration of photonic functionality in the frontend-of-line (FEOL) of an advanced microelectronics technology is a key step towards future communication applications. This combines photonic components such as waveguides, couplers, modulators, and photo detectors with high-speed electronics plus shortest possible interconnects crucial for high-speed performance. Integration of photonics into CMOS FEOL is therefore in development for quite some time reaching 90nm node recently [1]. However, an alternative to CMOS is high-performance BiCMOS, offering significant advantages for integrated photonics-electronics applications with regard to cost and RF performance. We already presented results of FEOL integration of photonic components in a high-performance SiGe:C BiCMOS baseline to establish a novel, photonic BiCMOS process. Process cornerstone is a local-SOI approach which allows us to fabricate SOI-based, thus low-loss photonic components in a bulk BiCMOS environment [2]. A monolithically integrated 10Gbit/sec Silicon modulator with driver was shown here [3]. A monolithically integrated 25Gbps receiver was presented in [4], consisting of 200GHz bipolar transistors and CMOS devices, low-loss waveguides, couplers, and highspeed Ge photo diodes showing 3-dB bandwidth of 35GHz, internal responsivity of more than 0.6A/W at λ= 1.55μm, and ~ 50nA dark current at 1V. However, the BiCMOS-given thermal steps cause a significant smearing of the Germanium photo diodes doping profile, limiting the photo diode performance. Therefore, we introduced implantation of non-doping elements to overcome such limiting factors, resulting in photo diode bandwidths of more than 50GHz even under the effect of thermal steps necessary when the diodes are integrated in a high performance BiCMOS process.

Single-phase induction motors are widely used in fractional and sub-fractional horsepower applications, mostly in domestic and commercial applications such as fans, refrigerators, air conditioners, etc., operating at constant speed or controlled by an on/off strategy which can result in poor efficiency and low-power factor.In terms of construction, these types of motors usually have a main and an auxiliary stator winding, are asymmetrical and are placed 90 degrees apart from each other.The rotor is usually the squirrel-cage type.The asymmetry presented in the stator windings is due to the fact that these windings are designed to be electrically different so the difference between the stator windings currents can produce a starting torque (Krause et al., 1995).Since it has main and auxiliary stator windings, the singlephase induction motor is also known as a two-phase asymmetric induction motor.In recent years, with the growing concern about low-cost operation and the efficient use of energy, the advance in motor drive control technology made it possible to apply these motors to residential applications with more efficiency.Different inverter topologies have been proposed to drive single-phase induction motors, providing ways to save energy.In dos Santos et al. (2010) different ac drive systems are conceived for multiple single-phase motor drives with a single dc-link voltage to guarantee installation cost reduction and some individual motor controls.In Wekhande et al. (1999) and Jabbar et al. (2004), Campos et al. (2007a) and Campos et al. (2007b), two topologies are considered.One is a Half-bridge inverter and the other is a three-leg inverter.The cost difference between the two topologies lays in the fact that the H-bridge inverter needs two large capacitors in the dc link rated for dc link voltage.Also, there is a need of two large resistors connected in parallel with the capacitors to balance the voltage of the capacitors.Despite the fact that the three-leg inverter has more switches, the development of power modules and the need for just one capacitor in the dc link have decreased the topology cost.Along with the reduced cost, a more efficient use of the dc link voltage is achieved.Besides the effort for developing more efficient driving topologies, many strategies to control single-phase motors have been proposed.In Jacobina et al. (1999), rotor-flux control, stator-flux control and direct torque control (DTC) (Takahashi and Noguchi, 1986) are analyzed.The main drawback of the two first strategies is that they use an encoder to obtain www.intechopen.comElectric Machines and Drives 218 the speed signal.Since there is no need for speed and position signals, a DTC scheme appears to be a suitable solution.But it has some disadvantages such as current and torque distortions, variable switching frequency and low-speed operation problems (Buja and Kazmierkowski, 2004).In Neves et al. (2002), a DTC strategy is applied for a single-phase motor and the performance is improved with the use of pulse width modulation.Along with control strategies and driver topologies, many researchers have investigated ways to optimize modulation techniques applied in single-phase induction motor drives.In Jabbar et al. ( 2004), space-vector modulation (SVPWM) is used to reduce the torque ripple and alleviate the harmonic content at the terminals of the single-phase induction motor being driving by a three-leg inverter.In Chaumit and Kinnares (2009) the proposed SVPWM method controls the two-phase voltage outputs of an unbalanced two-phase induction motor drive by varying the modulation index and voltage factors.In this chapter, the authors are interested in studying the DTC strategy combined with the SVPWM applied to a three-leg inverter topology to drive a single-phase induction motor.

A strategy for treating phantom perceptions, such as tinnitus, through deep brain stimulation (DBS) of the striatum and a lead design supporting such therapy is described. Both normal and phantom perceptions are thought to involve both neuronal activity in modality-specific portions of the brain, such as the cerebral cortex, acting in coordination with integrative circuits, such as those of the basal ganglia. Each stage of processing represents a target for therapies which interfere with perception of the phantom. Treatments of phantom perceptions have targeted brain structures related to sensory processing. For example, tinnitus treatments have involved interfering with auditory processing, such as by adding a masking sound at the auditory periphery, by directly stimulating the auditory cortex or by engaging plasticity in the auditory cortex. An alternative strategy is to interfere with the integrative process, such as by stimulating the terminal projection of specific areas of the cerebral cortex, related to the phantom modality, within the striatum. The strategy has the advantage of being applicable to a wide range of phantom perceptions. It also has the potential to block perception of the phantom without introducing new treatment-related perceptions.

This paper presents the study, design and application of a Rogowski coil current sensor without the integrator circuit that is typically used. This sensor is used as current probe for fault detection in induction motors by means of motor current signal analysis (MCSA).