Planar surface implanted diffractive grating couplers in SOI

Efficient fiber-chip coupling interfaces are critically important for integrated photonics. Since surface gratings diffract optical signals vertically out of the chip, these couplers can be placed anywhere in the circuit allowing for wafer-scale testing. While state-of-the-art grating couplers have been developed for silicon-on-insulator (SOI) waveguides, the moderate index contrast of silicon nitride (SiN) presents an outstanding challenge for implementing efficient surface grating couplers on this platform. Due to the reduced grating strength, a longer structure is required to radiate the light from the chip which produces a diffracted field that is too wide to couple into the fiber. In this work, we present a novel grating coupler architecture for silicon nitride photonic integrated circuits that utilizes an amorphous silicon (α-Si) overlay. The high refractive index of the α-Si overlay breaks the coupler’s vertical symmetry which increases the directionality. We implement subwavelength metamaterial apodization to optimize the overlap of the diffracted field with the optical fiber Gaussian mode profile. Furthermore, the phase of the diffracted beam is engineered to focalize the field into an SMF-28 optical fiber placed 55 µm above the surface of the chip. The coupler was designed using rigorous three-dimensional (3D) finite-difference time-domain (FDTD) simulations supported by genetic algorithm optimization. Our grating coupler has a footprint of 26.8 × 32.7 µm2 and operates in the O-band centered at 1.31 μm. It achieves a high directionality of 85% and a field overlap of 90% with a target fiber mode size of 9.2 µm at the focal plane. Our simulations predict a peak coupling efficiency of − 1.3 dB with a 1-dB bandwidth of 31 nm. The α-Si/SiN grating architecture presented in this work enables the development of compact and efficient optical interfaces for SiN integrated photonics circuits with applications including optical communications, sensing, and quantum photonics.

The CMOS photonic circuit is typically a heterogeneous system, which contains both electronic and optical devices. To design and verify such kind of circuit, the conventional method is to design and simulate them separately, i.e., the electronic circuits in EDA tools and optical circuits in optical mode solver and FDTD (Finite-difference time-domain) simulator, and then to combine the two parts together. This process is tedious because the brute-force simulation for both electronic circuits and optical circuits could be very time consuming. Moreover, even if these individual simulations are done, the simulation of interface between electronic and optical circuits could be problematical because the signals at the interface for the two parts are not in the same physical discipline. So it will be necessary to create a common electrical/optical simulation environment, in which the designers are able to build the CMOS photonic heterogeneous system from both electronic and optical libraries. In this chapter, we will present a simulation methodology which allows to create a simulation environment for CMOS photonic heterogeneous system. Using hardware description language, we create behavioral models for optical devices with S-matrix formalism. The challenges in model implementation have been addressed, such as large-size vector representation at model ports and complex matrix calculation. And a Verilog-AMS + VPI simulation strategy is proposed to solve the simulation issues. Finally, the proposed method is applied to bottom-up verification of a micro-ring array, and the simulation result matches well with brute force simulation, while the simulation time is largely reduced.

We propose the design of a composite device structure with germanium-based (Ge-based) waveguide photodetectors integrated with grating couplers on a silicon-on-insulator platform. The finite-difference time-domain method is used to establish simulation models and optimize the design of the waveguide detector and grating coupler. For the grating coupler, by adjusting the size parameters to the optimal value and combining the advantages of the nonuniform grating and the Bragg reflector structure, the peak coupling efficiency reaches 85% at 1550nm and 75.5% at 2000nm, which is, respectively, 31.3% and 14.6% higher than that of uniform grating. For the waveguide detector, a germanium-tin (GeSn) alloy was introduced to replace Ge as the active absorption layer at 1550 and 2000nm, which not only broadened the detection range and significantly improved the light absorption of the detector but also realized the near-complete light absorption of the GeSn alloy when the device length was 10µm. These results make it possible to miniaturize the device structure of Ge-based waveguide photodetectors.

Experimental results are presented that show that diffraction off a surface-relief reflection grating can be used to extend the FWHM input coupling efficiency versus the coupled-light wavelength of a grating coupler from 0.7 to 17 nm. Use of a surface-relief reflection grating allows high diffraction efficiency over a wide wavelength range. Dispersion-matching calculations are included that illustrate that for certain output coupling applications the FWHM can be extended to 33 am. Analysis shows that for inputcoupling applications the lateral beam shift resulting from angular dispersion may be the limiting factor for wavelength compensation.

Test points are essential in allowing optical circuits on a wafer to be autonomously tested after selected manufacturing steps, hence allowing poor performance or device failures to be detected early and to be either repaired using direct write methods, or a cessation of further processing to reduce fabrication costs. Grating couplers are a commonly used method for efficiently coupling light from an optical fibre to a silicon waveguide. They are relatively easy to fabricate and they allow light to be coupled into/out from any location on the device without the need for polishing, making them good candidates for an optical test point. A fixed test point can be added for this purpose, although traditionally these grating devices are fabricated by etching the silicon waveguide, and hence this permanently adds loss and leads to a poor performing device when placed into use after testing. We demonstrate a similar device utilising a refractive index change induced by lattice disorder. Raman data collected suggests this lattice damage is reversible, allowing a laser to subsequently erase the grating coupler.

This paper presents the results of a front-end receiver module integrating GSM/DCS/PCS band select functions and a direct conversion IC on a low temperature cofired ceramic (LTCC) substrate. The front-end-module (FEM) integrated a SP3T GaAs PHEMT switch for band selection, three SAW filters for pre-selection, and a direct conversion IC for down conversion of the RF signal. Integrated passives included a PCS balun, direct conversion IC matching elements and structures to improve the performance of differential SAW filters. The LTCC module contained 24 embedded passives and 15 surface mount components integrated on a 328 mil/spl times/586 mil, 19-layer multi-layer integrated circuit (MLIC). Receiver sensitivity was better than -114 dBm, the system noise figure was less than 9 dB, and the return loss characteristics measured at the antenna input port were better than 10 dB for all three bands. EM simulation was used to achieve first pass design success and the modeling approach yielded excellent agreement between measured and simulated results.

Grating coupling is the waveguide access technology which in principle allows for the integration of the access function together with the integrated optical processing functions on a monolithic planar substrate. The fundamental merit of grating coupling technology is its geometrical and, to a large extent, its technological compatibility with the planar processes which define the integrated signal processing waveguide circuit. However, poor coupling efficiency, highly dispersive character, absence of user friendly modelling tools, fabrication difficulties have long prevented this technology from being implemented into practical sensor and microsystem designs. Most of these difficulties are being overcome and grating couplers are envisaged as part of commercial system applications. This contribution will review the points where recent technological progress are decisive, illustrate for the future users some attractive features of waveguide coupling gratings and also underline for the designer some of the traps that may be encountered.

We present our approach to a low-cost, highly scalable opto-electronic integration platform based on a commercial CMOS process. In this talk, we detail the performance of the device library elements and highlight performance trade-offs encountered in monolithically integrating optical and electronic circuits. We describe an opto-electronic integrated circuit (OEIC) design toolkit modeled after the standard electronic design flow, which includes automated design rule checking (DRC) and layout-versus-schematic (LVS) checks covering all types of circuit elements. As an example of integration, we detail the design of a multi-channel transceiver chip with 10 Gbps/channel optical data transmission speed and report on its performance.

Silicon photonics (Si-photonics) is a potential technology that integrates the electronic and optical circuits on a single chip, in order to satisfy the increasing demand of highspeed and low-power dissipation in the current very-large-scale integration circuits. It has opened up the research directions in the domain of design automation for photonic integrated circuits. While deciding the physical layout of the optical circuits on the substrate, it is crucial to obtain the optimal routing of optical waveguides. The optical channel routing problem is a multiobjective optimization problem, in which all the parameters like the total bend loss, the total propagation loss, the total crossing loss, and the total number of tracks are required to be minimized. However, in comparison to propagation and crossing loss, the bending loss has a higher impact on the total signal loss. In this paper, a grid-based method has been proposed for optical waveguide channel routing (OWCR) while reducing the total bend loss and the total number of tracks. Simulation results reveals that OWCR can reduce the total bend loss by 25.82 % and 36.57 % over the state-of-the-art technique for h = 1 and h = 1.732, respectively, while increasing the total number of tracks by 18.68 %.

We report a grating coupler capable to efficiently project a constant-intensity free-space beam due to exceptional points in a photonic band diagram. Our device enables a new route to project arbitrarily wide free-space top-hat beams.

Subpicosecond Photonic Switching Based on Bacteriorhodopsin

We present the results on fabrication of plastic integrated optical elements using molding, liquid jet delineation, and UV irradiation. Coupling gratings with a period of 620 mm<SUP>-1</SUP> and a diffraction efficiency of 3.3 percent were molded in a preheated poly(methyl methacrylate) planar waveguide using master saw shaped grating. An experimental device is also described which uses computer controlled micro syringe to dispense polymer solution onto a moving substrate. This device consumes thousand times less material to produce integrated optical circuits than equivalent spin- casting equipment.We have made various structures such as Y- branches and Mach-Zehnder interferometers. All the structures demonstrated good performance. The same device was also equipped with a microscope-type UV illuminator for noncontact delineation of optical structures in polyimide films. The operation is based on the refractive index increase due to photo-oxidative decomposition of the material. The index difference 0.02 between exposed and unexposed regions is sufficient to define light guiding channels in polyimide without using liquid developing. UV radiation was also used to make graded-index polyimide waveguides. Their refractive index profile was successfully reconstructed by a specially developed calculation technique. All the techniques combined together give us the cost efficient tool for the fabrication of plastic integrated optics.

With the rapid deployment of artificial intelligence (AI) data centers, demand for optical modules surges-alongside faster upgrades and stricter low-power requirements. However, traditional optical driver integrated circuits (ICs) rely on device-specific customization, which lengthens driver design cycles, delays module deployment, and raises costs, becoming a bottleneck for optical module evolution. To address these issues, this work proposes a unified optical transmitter electronic integrated circuit (EIC) design approach featuring synergistic driver-laser/modulator co-design and a versatile output driver (VOD). The VOD can be configured into three output impedance states (open-drain, differential 50-Ω, or differential 100-Ω), enabling it to drive various optical devices like distributed feedback lasers (DFBs), vertical-cavity surface-emitting lasers (VCSELs), electro-absorption modulated lasers (EMLs), and Mach-Zehnder modulators (MZMs) with a single design, minimizing device-specific customization. Meanwhile, its power consumption is also adjustable to maximize the power efficiency. The proposed design approach demonstrates the potential to address the critical interoperability, cost, and power challenges faced by AI data centers, providing a scalable template for next-generation coherent and 4-level pulse amplitude modulation systems and facilitating rapid deployment.

In this article, we propose a fast thermal modeling tool, 3DSim, using a Green's-function-based approach. Green's-function-based approaches have been shown to be faster than the traditional finite-difference-based techniques. Our proposed tool can model steady-state and transient thermal profiles for both 2-D and 3-D chips, which may contain multiple active layers and fluid-carrying microchannels for heat removal. The unique advantage of our tool is that it models leakage power analytically using a piecewise-linear leakage model, thereby eliminating the need to iterate multiple times through the leakage-temperature feedback loop. We use several algebraic techniques and transforms to compute the thermal profile analytically and thereby speedup the process of calculation. To the best of our knowledge, transform-based approaches have not been used before to model the temperature in 3-D chips with microchannels. Our approach provides a 150× speedup over state-of-the-art thermal simulators, with an error limited to 5%.

Today’s electronic technology is based on the design and manufacture of integrated circuits. The concept of the integrated circuit comes from the work of 2000 Nobel Prize winner J.S. Kilby [1]. Its origins can be dated to February 1959. In his patent declaration, Kilby defines the integrated circuit with the following statement: “this invention relates to miniature electronic circuits, and more particularly to unique integrated electronic circuits fabricated from semiconductor material”.