Institut für Solartechnologien (Germany)

This article presents the design and prototyping of components for a modular multiple-input-multiple-output (MIMO) millimeter-wave radar for space applications. A single radar panel consists of 8 transmitters (TX) and 8 receivers (RX), which can be placed several times on the satellite to realize application-specific radar apertures and hence different cross-range resolutions. The radar chirp signals are generated by SiGe:C BiCMOS direct-digital-synthesizers (DDS) in the frequency range of 1 to 10.5GHz with a chirp repetition rate of 30dB gain with noise figure values of 9dB, respectively. The MIMO radar utilizes patch antenna arrays on organic multilayer printed circuit boards (PCB) with 18dBi gain and 18∘ half power beamwidth (HPBW). Generation of power supply and control signals, analog-to-digital conversion (ADC), and radar signal processing are provided centrally to each panel. The radar supports detection and tracking of satellites in distances up to 1000m and image generation up to 20m, which is required to support orbital maneuvers like satellite rendezvous and docking for non-cooperative satellites.

Some carnivores are known to survive well in urban habitats, yet the underlying behavioral tactics are poorly understood. One likely explanation for the success in urban habitats might be that carnivores are generalist consumers. However, urban populations of carnivores could as well consist of specialist feeders. Here, we compared the isotopic specialization of red foxes in urban and rural environments, using both a population and an individual level perspective. We measured stable isotope ratios in increments of red fox whiskers and potential food sources. Our results reveal that red foxes have a broad isotopic dietary niche and a large variation in resource use. Despite this large variation, we found significant differences between the variance of the urban and rural population for δ13C as well as δ15N values, suggesting a habitat‐specific foraging behavior. Although urban regions are more heterogeneous regarding land cover (based on the Shannon index) than rural regions, the dietary range of urban foxes was smaller compared with that of rural conspecifics. Moreover, the higher δ13C values and lower δ15N values of urban foxes suggest a relatively high input of anthropogenic food sources. The diet of most individuals remained largely constant over a longer period. The low intraindividual variability of urban and rural red foxes suggests a relatively constant proportion of food items consumed by individuals. Urban and rural foxes utilized a small proportion of the potentially available isotopic dietary niche as indicated by the low within‐individual variation compared to the between‐individual variation. We conclude that generalist fox populations consist of individual food specialists in urban and rural populations at least over those periods covered by our study.

The optimum optical characterization method suitable for wafer level waveguide testing is an important issue for silicon photonic methodology. In this paper we focus on comparing the two most widespread measurement techniques: cut-back and optical backscatter reflectometry.

In this paper a 60 GHz monolithic bistatic interferometric radar transceiver for high precision measuring is presented. The integrated transceiver has been designed using a 0.13 μm SiGe BiCMOS process from IHP (SG13G2) and includes a LNA, a passive six-port structure, detectors, multiplier, multiplexer, power amplifier and a digital interface. The chip has a size of 2330 μm x 1360 μm and a maximum power consumption of 533 mW from a 3.3 V power supply. The circuit provides two frequency inputs of 7.5 and 15 GHz and multiplies them up to 60 GHz at a minimum input power of -20 dBm. The chip delivers a maximum output power of 9 dBm at 61 GHz. The input path is selectable and the output power is adjustable by a digital interface between -23 and 9 dBm at 60 GHz. Also the reference input power of the six-port and the RF input power can be adjusted in a range of 13.2 dB. The minimum input referred P1dB is -24.1 dBm. With a multiplexer, the receiver reference can be separated from the transmitter, which allows the use of both independently from each other. The serial interface is realized in 0.13 μm CMOS logic and consists of a 20 bit shift register, decoder and an analog interface.

We present an accurate, easy-to-use large-signal SPICE circuit model for depletion-type silicon ring modulators (Si RMs). Our model includes both the electrical and optical characteristics of the Si RM and consists of circuit elements whose values change depending on modulation voltages. The accuracy of our model is confirmed by comparing the SPICE simulation results of 25 Gb/s non-return-to-zero (NRZ) modulation with the measurement. The model is used for performance optimization of monolithically integrated Si photonic NRZ and pulse-amplitude-modulation 4 transmitters in the standard SPICE circuit design environment.

This paper demonstrates planar designs of a microstrip-to-waveguide transition as well as a 4x1 patch antenna array at 79 GHz to investigate utilizing a new low-loss substrate material in radar applications. The planar transition enables direct surface-mounting of the standard waveguide flange without additional mechanical parts. It comprises of microstrip-to-substrate integrated waveguide (SIW) transition and SIW-WR12 transition. The patch antenna array is employed in a two-channel radar sensor where its radiation pattern is measured and verified.

In this paper we describe our flexible ECDSA design for elliptic curve over binary extended fields GF(2l). We investigated its resistance against Horizontal Collision Correlation Attacks (HCCA). Due to the fact that our design is based on the Montgomery kP algorithm using Lopez-Dahab projective coordinates the scalar k cannot be successful revealed using HCCA, but this kind of attacks can be helpful to divide the measured traces into parts that correspond to processing of a single bit of the scalar k. The most important contribution of this paper is that our flexible field multiplier is resistant against horizontal attacks. This inherent resistance makes it a valuable building block for designing unified field multipliers.

The influence of annealing conditions on the crystallinity of Ge deposited on Si(001) is investigated. Ge deposited with postannealing at 800 °C and 850 °C, five cycles of postannealing at 750 °C and 850 °C (temperature-swing postannealing) and several cycles of annealing at 800 °C or 850 °C during the Ge growth by interrupting the deposition step (cyclic annealing) are compared. To check the threading dislocation density (TDD) of the deeper part of the Ge, thinning by HCl vapor phase etching (VPE) followed by Secco defect etching is performed for 5 μm thick Ge of all three annealing variants. By comparing the TDD of the same Ge thickness with and without HCl VPE, TDD reduction by VPE is observed for the sample using the cyclic annealing process only. Lower TDD is observed at higher postannealing temperature. By the five cycles of temperature swinging, TDD becomes around a half compared to conventional postannealing at 850 °C. In the case of the cyclic annealing process significant improvement of TDD is observed with increasing Ge thickness. Even at a maximum temperature of 800 °C, the same or lower TDD levels were observed for higher than 2 μm thick Ge compared to that with five cycles of temperature-swing postannealing. For the sample with cyclic annealing at 800 °C, a lower Si diffusion length into Ge is also observed for the cyclic annealing process indicating a lower thermal budget. A lower amount of tilted Ge planes at the interface is confirmed showing higher crystal quality also in the deeper part of the Ge layer.

A hybrid design approach of the hierarchical physical implementation design flow is presented and demonstrated on a fault-tolerant low-power multiprocessor system. The proposed flow allows to implement selected submodules in parallel with contrary requirements such as identical placement and individual block implementation. The overall system contains four Leon2 cores and communicates via the Waterbear framework and supports Adaptive Voltage Scaling (AVS) functionality. Three of the processor core variants are derived from the first baseline reference core but implemented individually at block level based on their clock tree specification. The chip is prepared for space applications and designed with triple modular redundancy (TMR) for control parts. The low-power performance is enabled by contemporary power and clock management control. An ASIC is fabricated in a low-power $0.13 \mu \mathrm{m}$ BiCMOS technology process node.

We investigate the distribution of Sn in GeSn nano-heteroepitaxial clusters deposited at temperatures well exceeding the eutectic temperature of the GeSn system. The 600 °C molecular beam epitaxy on Si-patterned substrates results in the selective growth of GeSn nano-clusters having a 1.4 ± 0.5 at% Sn content. These nano-clusters feature Sn droplets on their faceted surfaces. The subsequent deposition of a thin Ge cap layer induced the incorporation of the Sn atoms segregated on the surface in a thin layer wetting the nano-dots surface with 8 ± 0.5 at% Sn. The presence of this wetting layer is associated with a relatively strong photoluminescence emission that we attribute to the direct recombination occurring in the GeSn nano-dots outer region.