A Low Input Voltage Charge Pump for Energy Harvesting

A low voltage charge pump with high pumping efficiency is proposed in this paper. To get high pumping efficiency, the proposed circuit uses 2 branches cross coupled structure. To eliminate the body effect and threshold voltage drops, PMOS transistors are used as Charge Transfer Switch (CTS). The inverters below and above the CTS PMOS for controlling the gate of CTS PMOS properly. Undesired charge transfer flows higher voltage node voltage to lower voltage node is removed as the NMOS transistor and PMOS transistor below and above the CTS PMOS turn off during the clock transition. Furthermore, the time when those NMOS transistor and PMOS transistor are both off is short and due to the cross coupled wiring, the fast gate control would be able to made by present and previous stage. So that the cross coupled CTS charge pump has higher pumping efficiency than conventional circuits. The simulation results show that the proposed circuit's performance is better than other circuits.

This letter presents a millimeter-wave (mm-wave) two-stage rectifier. It is designed to power a backscattering low voltage RFID tag system providing the maximum power conversion efficiency (PCE) at low output voltages. It utilizes the internal voltage cancellation (IVC) scheme as well as forward body-biasing (BB) for internal MOS transistors' threshold compensation. A low voltage charge pump is used to generate the differential body bias voltages. An oscillator with regulated power supply is designed to provide a clock signal to the charge pump at very low voltages. It provides 9% PCE at -13-dBm input power and 33- kΩ equivalent loading. It has also -13-dBm sensitivity for 1-V output voltage for the open load condition.

A new low voltage charge pump is developed to help start up a step-up converter in energy harvesting applications. The proposed charge pump is the first to utilize both backward control scheme and two branches of charge transfer switches (CTSs) to direct charge flow. The backward control scheme uses the internal boosted voltage to dynamically control the CTSs' gate, and the two branches utilize both NMOS and PMOS to implement their switching structure. The combination of backward control scheme and two-branch operation allows the CTSs to be completely turned on and off. Thus, the reverse charge sharing phenomenon and switching loss are significantly reduced, which effectively improves pumping efficiency. The last stage is specially designed to improve the charge pump's charge and capacitance drivability. Using subthreshold operation and body-bias technique, the charge pump and its clock generator can operate under a low voltage supply. The proposed charge pump circuit is designed in a standard 0.18 $\mu$ m CMOS process. It consists of 6 stages, each with a 24 pF pumping capacitor (total 288 pF pumping capacitance area). Under a 320 mV supply, the measured output voltage of the proposed charge pump can rise from 0 to 2.04 V within 0.1 milliseconds.

A high current driving capability charge pump circuit is proposed. By adopting the dynamic boosting circuit, the overdrive voltages of all the charge transfer switches (CTS's) in the charge pump are maintained for a large loading current. In addition, the largest voltage difference between any of the terminals of all the transistors does not exceed the supply voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> , and solves the gate-oxide overstress problem in the conventional charge pump circuits and enhances the reliability. Other advantages of the proposed charge pump include high pumping efficiency because of no threshold voltage drop and 2-phase operation, without the need of extra power consumption on the logic circuits and drivers. The proposed charge pump circuit is designed and simulated based on a low voltage process. Results show that the charge pump can operate in a wide output current range.

A low-voltage charge pump, having a symmetrical structure, is proposed. In this charge pump, enhanced switches are used instead of diode-configured MOSTs. The switch-controlling voltage is mutually offered by the two symmetrical branches, which makes the enhanced switches turn on/off alternatively during the designated cycles. Consequently, the voltage drop due to the threshold voltage of MOSTs is eliminated, exhibiting gain in die area, rise time and maximum output voltage.

This paper presents a charge pump based on voltage doublers, which can operate at very low input voltages. The proposed design uses dedicated boosting circuits and dynamic body biasing of the pass transistors. Driving capability, voltage gain, and conversion efficiency are demonstrated through simulations.

Based on the magnetic coupling resonant wireless power transmission technology, how to improve the efficiency of the system under the condition of low voltage and high current input is studied. In this paper, a wireless power transfer system based on Z-source inverter is proposed. In the environment of low voltage and high current input, the input voltage is low, and the increase of DC-DC link will increase the loss of the system. Therefore, this paper analyzes the circuit of the magnetically coupled resonant wireless power transmission system in the low-voltage input and high-current output environment, and applies the Z-source inverter to the low-voltage and high-current input environment to improve the performance of the system.

We present a study of current mirror topologies for reference sources and PLL charge pumps, where the objective is to achieve excellent input to output DC matching over almost the whole available power supply range, while maintaining a very high output resistance. From the ideal requirements, we contrast existing designs and develop new topologies which come close to the ideal in terms of available range and resistance, by using regulation at the input as well as output. We consider noise, systematic and random and matching penalties in each circuit. It is shown that mirrors operating in the triode region exhibit lower random mismatch compared with the equivalent conventional mirrors. Measured results are presented from a 0.25 /spl mu/m 2.5 V CMOS test-chip.

An operation of electronic equipment is dependent on a power supply. Today, a trend of only one AC/DC adapter is used for supplying an electronic system. Thus, an electronic equipment with various power supply requirements uses some internal DC/DC converters. These DC/DC converters adjust input voltage to lower or/and higher value or generate a negative voltage. The classical DC/DC converters are based on inductors or transformers. These converters are too large and suitable for a higher output power. A charge pumps are a sufficient alternative to classical DC/DC converters for a lower output power and a smaller dimension. A well-known variant of a charge pump is Dickson charge pump. The output to input voltage ratio is a directly proportional to the number of Dickson charge pump stages. Thus, the number of stages can be a relatively high for low input voltage and required high output voltage. The Fibonacci charge pump is a suitable alternative to Dickson charge pump especially for a higher output to input voltage ratio. This article describes practical circuit solution of the Fibonacci charge pump. The key properties of the Dickson and the Fibonacci pumps are compared in this article, too.

This paper proposes a complete design and simulation of a charge pumping system using a voltage regulator. The system has been implemented using a 6 stage Dickson Charge Pump with an operating frequency of 582 MHz and a maximum pumped-up voltage of 5.32 volts. The voltage level can be fixed to lower user-defined values utilizing the proposed regulatory components in the system. The generated output voltage of the charge pump is compared with a reference voltage produced from a low leakage on-chip Voltage Regulator thus forming a closed loop system. This feedback system allows the user to get the preferred output voltage from the Charge pump system. In this work, the targeted output voltage is 2.65 volts. The whole system is designed using CMOS 180nm process technology.

This paper presents a high gain programmable 1.2V to 18V, 25-stage Charge Pump (CP) system with an on-chip generated clock signal for MEMS sensors biasing applications. This CP features an innovative structure to bootstrap the pumping switches that allows the use of specific high-voltage transistors to be avoided, since the voltage drop across any device is never higher than the supply voltage. The output voltage of the CP can be trimmed by varying its input voltage, provided through an Operational Transconductance Amplifier (OTA) feedbacked with a digitally programmable resistive divider, designed in such a way to get the regulated voltage to be an exponential function of the 6-bit trimming code. The clock signal to drive the CP is generated on-chip by a low-voltage and low-power Relaxation Oscillator (RxO). The proposed Charge Pump system reaches a maximum output voltage of 18V, draining from the 1.2V supply a total power of 2.6µW and using a total silicon area of 0.06mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.

An integrated high voltage charge pump circuit utilising intrinsic process features is introduced. It can produce +20 V to +50 V output from a typical 5 V input. The reported charge pumps achieved the highest density and highest output voltages of the industry. Measurements show output ripples of 400 mV for frequencies around 10 MHz and output load of 28 pF. The reported integrated high voltage charge pump circuits was implemented on 0.8 /spl mu/m DALSA semiconductor technology using standard CMOS devices.

The emerging Phase Change Memory (PCM) technology exhibits excellent scalability and density potentials. At the same time, they require high current and high voltages to switch cell states. Their working voltages are provided by CMOS-compatible on-chip charge pumps (CPs). Unfortunately, CPs and particularly those for RESET, have a large parasitic power (a dominant component in total power loss) during operations, which significantly degrades their energy efficiency. In addition, CPs seriously suffer from the Time-Dependent Dielectric Breakdown (TDDB) problem due to their boosted operation voltage. To maintain a reasonable lifetime of CPs, existing solutions actively switch them on per-operation basis, resulting in large performance degradation. In this paper, we address the above issues through two designs - Reset_Sch (RESET scheduling) and CP_Sch (CP scheduling). Reset_Sch schedules when to perform a RESET for different cells upon writing a PCM line. It significantly reduces the power loss, and peak working power of RESET CP. CP_Sch incorporates a fast READ CP design to provide fast charge-up time for reads and minimize performance penalty. Our experimental results show that on average, 70%of power loss for RESET CP can be reduced; and performance loss can be reduced from 16% to 2% while achieving a 16% improvement in reliability.

Design of low-voltage and efficient energy-harvesting circuits is becoming increasingly important, particularly, for autonomous systems. Since the amount of energy that can be harvested from the surrounding environment is limited, the available output voltage of a harvester is low. Therefore, the design of a low-input-voltage (low-VIN) up-converter is critical to self-powered systems [1-3]. Moreover, the form factor is very constrained in applications such as wearable electronic devices and sensor networks. Recently, low-VIN charge pumps (CPs) for energy harvesting has been compared with DC-DC converters using a large inductor [1-3]. CPs introduced in [1] and [2] use the advanced process technology to push VIN down to the subthreshold region. The CP in [1] introduces a forward-body-biasing (FBB) technique, which improves the voltage conversion efficiency (VCE) for low VIN but shows poor power conversion efficiency (PCE). The CP in [2] achieves the lowest operation voltage. However, the design with a 10-stage CP provides low output power. This paper presents a CP with switching-body-biasing (SBB), adaptive-dead-time (AD), and switch-conductance (SW-G) enhancement techniques to improve the PCE for low VIN as well as to extend the maximum load current.

With recent advancements in thermoelectric material performance, thermoelectric generators have become a viable alternative for power generation using small temperature differentials with benefits that can not be found in other energy conversion methods. The power generated by a thermoelectric generator, using a small /spl Delta/T, is characterized by a relatively high current (-/spl sim/5 A), but a relatively low voltage (<0.3 V), which is often not suited for many practical applications. In order to make use of the thermoelectric generated power in applications requiring a higher voltage, a DC-DC step up converter that can handle low input voltage is needed. Commercial available DC step up converters require an input voltage of at least 0.7 volts, which is the minimal voltage required for operating a bipolar junction switch. Several novel approaches for low input voltage DC-DC converter concepts have been studied and proved to be feasible. Their operations are based on some unconventional methods achieving DC to AC conversion for low input voltage. In one solid state approach, a normally-on transistor and a tunnel diode were utilized to achieve low voltage oscillation. A conversion concept was also developed which is based on an electromagnetic actuated mechanical switch. Operating principles and measured performance of these approaches will be reported.